utility.hh

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/*
 * Copyright (c) 2007 The Hewlett-Packard Development Company
 * All rights reserved.
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
 * unmodified and in its entirety in all distributions of the software,
 * modified or unmodified, in source code or in binary form.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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#ifndef __ARCH_X86_UTILITY_HH__
#define __ARCH_X86_UTILITY_HH__
 
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "sim/full_system.hh"
 
namespace X86ISA
{
 
    inline PCState
    buildRetPC(const PCState &curPC, const PCState &callPC)
    {
        PCState retPC = callPC;
        retPC.uEnd();
        return retPC;
    }
 
    uint64_t
    getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
 
    static inline bool
    inUserMode(ThreadContext *tc)
    {
        if (!FullSystem) {
            return true;
        } else {
            HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
            return m5reg.cpl == 3;
        }
    }
 
    void copyRegs(ThreadContext *src, ThreadContext *dest);
 
    void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
 
    inline void
    advancePC(PCState &pc, const StaticInstPtr &inst)
    {
        inst->advancePC(pc);
    }
 
    inline uint64_t
    getExecutingAsid(ThreadContext *tc)
    {
        return 0;
    }
 
 
    uint64_t getRFlags(ThreadContext *tc);
 
    void setRFlags(ThreadContext *tc, uint64_t val);
 
    uint8_t convX87TagsToXTags(uint16_t ftw);
 
    uint16_t convX87XTagsToTags(uint8_t ftwx);
 
    uint16_t genX87Tags(uint16_t ftw, uint8_t top, int8_t spm);
 
    double loadFloat80(const void *mem);
 
    void storeFloat80(void *mem, double value);
}
 
#endif // __ARCH_X86_UTILITY_HH__