gem5
v21.0.0.0
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Implementaton of AArch64 TLBI ALLE(1,2,3)(IS) instructions. More...
#include <tlbi_op.hh>
Public Member Functions | |
TLBIALLEL (ExceptionLevel _targetEL, bool _secure) | |
void | operator() (ThreadContext *tc) override |
TLBIALLEL | makeStage2 () const |
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TLBIOp (ExceptionLevel _targetEL, bool _secure) | |
virtual | ~TLBIOp () |
void | broadcast (ThreadContext *tc) |
Broadcast the TLB Invalidate operation to all TLBs in the Arm system. More... | |
Public Attributes | |
bool | inHost |
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bool | secureLookup |
ExceptionLevel | targetEL |
Implementaton of AArch64 TLBI ALLE(1,2,3)(IS) instructions.
Definition at line 126 of file tlbi_op.hh.
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inline |
Definition at line 129 of file tlbi_op.hh.
Referenced by makeStage2().
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inline |
Definition at line 136 of file tlbi_op.hh.
References ArmISA::EL1, ArmISA::TLBIOp::secureLookup, and TLBIALLEL().
Referenced by ArmISA::TLB::flush().
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overridevirtual |
Reimplemented from ArmISA::TLBIOp.
Definition at line 76 of file tlbi_op.cc.
References ArmISA::MMU::flush(), ThreadContext::getCheckerCpuPtr(), ArmISA::getMMUPtr(), inHost, ArmISA::MISCREG_HCR_EL2, and ThreadContext::readMiscReg().
bool ArmISA::TLBIALLEL::inHost |
Definition at line 141 of file tlbi_op.hh.
Referenced by ArmISA::TLB::flush(), and operator()().