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ThreadContext Class Referenceabstract

ThreadContext is the external interface to all thread state for anything outside of the CPU. More...

#include <thread_context.hh>

Inheritance diagram for ThreadContext:
PCEventScope CheckerThreadContext< TC > Iris::ThreadContext SimpleThread FastModel::CortexA76TC FastModel::CortexR52TC

Public Types

enum  Status { Active, Suspended, Halting, Halted }
 

Public Member Functions

bool getUseForClone ()
 
void setUseForClone (bool new_val)
 
virtual ~ThreadContext ()
 
virtual BaseCPU * getCpuPtr ()=0
 
virtual int cpuId () const =0
 
virtual uint32_t socketId () const =0
 
virtual int threadId () const =0
 
virtual void setThreadId (int id)=0
 
virtual ContextID contextId () const =0
 
virtual void setContextId (ContextID id)=0
 
virtual BaseMMU * getMMUPtr ()=0
 
virtual CheckerCPU * getCheckerCpuPtr ()=0
 
virtual BaseISA * getIsaPtr ()=0
 
virtual TheISA::Decoder * getDecoderPtr ()=0
 
virtual System * getSystemPtr ()=0
 
virtual PortProxy & getPhysProxy ()=0
 
virtual PortProxy & getVirtProxy ()=0
 
virtual void initMemProxies (ThreadContext *tc)=0
 Initialise the physical and virtual port proxies and tie them to the data port of the CPU. More...
 
virtual Process * getProcessPtr ()=0
 
virtual void setProcessPtr (Process *p)=0
 
virtual Status status () const =0
 
virtual void setStatus (Status new_status)=0
 
virtual void activate ()=0
 Set the status to Active. More...
 
virtual void suspend ()=0
 Set the status to Suspended. More...
 
virtual void halt ()=0
 Set the status to Halted. More...
 
void quiesce ()
 Quiesce thread context. More...
 
void quiesceTick (Tick resume)
 Quiesce, suspend, and schedule activate at resume. More...
 
virtual void takeOverFrom (ThreadContext *old_context)=0
 
virtual void regStats (const std::string &name)
 
virtual void scheduleInstCountEvent (Event *event, Tick count)=0
 
virtual void descheduleInstCountEvent (Event *event)=0
 
virtual Tick getCurrentInstCount ()=0
 
virtual Tick readLastActivate ()=0
 
virtual Tick readLastSuspend ()=0
 
virtual void copyArchRegs (ThreadContext *tc)=0
 
virtual void clearArchRegs ()=0
 
virtual RegVal readIntReg (RegIndex reg_idx) const =0
 
virtual RegVal readFloatReg (RegIndex reg_idx) const =0
 
virtual const TheISA::VecRegContainer & readVecReg (const RegId &reg) const =0
 
virtual TheISA::VecRegContainer & getWritableVecReg (const RegId &reg)=0
 
virtual const TheISA::VecElem & readVecElem (const RegId &reg) const =0
 
virtual const TheISA::VecPredRegContainer & readVecPredReg (const RegId &reg) const =0
 
virtual TheISA::VecPredRegContainer & getWritableVecPredReg (const RegId &reg)=0
 
virtual RegVal readCCReg (RegIndex reg_idx) const =0
 
virtual void setIntReg (RegIndex reg_idx, RegVal val)=0
 
virtual void setFloatReg (RegIndex reg_idx, RegVal val)=0
 
virtual void setVecReg (const RegId &reg, const TheISA::VecRegContainer &val)=0
 
virtual void setVecElem (const RegId &reg, const TheISA::VecElem &val)=0
 
virtual void setVecPredReg (const RegId &reg, const TheISA::VecPredRegContainer &val)=0
 
virtual void setCCReg (RegIndex reg_idx, RegVal val)=0
 
virtual TheISA::PCState pcState () const =0
 
virtual void pcState (const TheISA::PCState &val)=0
 
void setNPC (Addr val)
 
virtual void pcStateNoRecord (const TheISA::PCState &val)=0
 
virtual Addr instAddr () const =0
 
virtual Addr nextInstAddr () const =0
 
virtual MicroPC microPC () const =0
 
virtual RegVal readMiscRegNoEffect (RegIndex misc_reg) const =0
 
virtual RegVal readMiscReg (RegIndex misc_reg)=0
 
virtual void setMiscRegNoEffect (RegIndex misc_reg, RegVal val)=0
 
virtual void setMiscReg (RegIndex misc_reg, RegVal val)=0
 
virtual RegId flattenRegId (const RegId &reg_id) const =0
 
virtual unsigned readStCondFailures () const =0
 
virtual void setStCondFailures (unsigned sc_failures)=0
 
virtual Counter readFuncExeInst () const =0
 
virtual int exit ()
 
virtual void htmAbortTransaction (uint64_t htm_uid, HtmFailureFaultCause cause)=0
 
virtual BaseHTMCheckpointPtr & getHtmCheckpointPtr ()=0
 
virtual void setHtmCheckpointPtr (BaseHTMCheckpointPtr cpt)=0
 
virtual ConstVecLane8 readVec8BitLaneReg (const RegId &reg) const =0
 Vector Register Lane Interfaces. More...
 
virtual ConstVecLane16 readVec16BitLaneReg (const RegId &reg) const =0
 Reads source vector 16bit operand. More...
 
virtual ConstVecLane32 readVec32BitLaneReg (const RegId &reg) const =0
 Reads source vector 32bit operand. More...
 
virtual ConstVecLane64 readVec64BitLaneReg (const RegId &reg) const =0
 Reads source vector 64bit operand. More...
 
virtual void setVecLane (const RegId &reg, const LaneData< LaneSize::Byte > &val)=0
 Write a lane of the destination vector register. More...
 
virtual void setVecLane (const RegId &reg, const LaneData< LaneSize::TwoByte > &val)=0
 
virtual void setVecLane (const RegId &reg, const LaneData< LaneSize::FourByte > &val)=0
 
virtual void setVecLane (const RegId &reg, const LaneData< LaneSize::EightByte > &val)=0
 
virtual RegVal readIntRegFlat (RegIndex idx) const =0
 Flat register interfaces. More...
 
virtual void setIntRegFlat (RegIndex idx, RegVal val)=0
 
virtual RegVal readFloatRegFlat (RegIndex idx) const =0
 
virtual void setFloatRegFlat (RegIndex idx, RegVal val)=0
 
virtual const TheISA::VecRegContainer & readVecRegFlat (RegIndex idx) const =0
 
virtual TheISA::VecRegContainer & getWritableVecRegFlat (RegIndex idx)=0
 
virtual void setVecRegFlat (RegIndex idx, const TheISA::VecRegContainer &val)=0
 
virtual const TheISA::VecElem & readVecElemFlat (RegIndex idx, const ElemIndex &elem_idx) const =0
 
virtual void setVecElemFlat (RegIndex idx, const ElemIndex &elem_idx, const TheISA::VecElem &val)=0
 
virtual const TheISA::VecPredRegContainer & readVecPredRegFlat (RegIndex idx) const =0
 
virtual TheISA::VecPredRegContainer & getWritableVecPredRegFlat (RegIndex idx)=0
 
virtual void setVecPredRegFlat (RegIndex idx, const TheISA::VecPredRegContainer &val)=0
 
virtual RegVal readCCRegFlat (RegIndex idx) const =0
 
virtual void setCCRegFlat (RegIndex idx, RegVal val)=0
 
- Public Member Functions inherited from PCEventScope
virtual bool remove (PCEvent *event)=0
 
virtual bool schedule (PCEvent *event)=0
 

Static Public Member Functions

static void compare (ThreadContext *one, ThreadContext *two)
 function to compare two thread contexts (for debugging) More...
 

Public Attributes

int intResult = DefaultIntResult
 
double floatResult = DefaultFloatResult
 
int intOffset = 0
 

Static Public Attributes

static const int ints []
 
static const double floats []
 
static const int DefaultIntResult = 0
 
static const double DefaultFloatResult = 0.0
 

Protected Attributes

bool useForClone = false
 

Detailed Description

ThreadContext is the external interface to all thread state for anything outside of the CPU.

It provides all accessor methods to state that might be needed by external objects, ranging from register values to things such as kernel stats. It is an abstract base class; the CPU can create its own ThreadContext by deriving from it.

The ThreadContext is slightly different than the ExecContext. The ThreadContext provides access to an individual thread's state; an ExecContext provides ISA access to the CPU (meaning it is implicitly multithreaded on SMT systems). Additionally the ThreadState is an abstract class that exactly defines the interface; the ExecContext is a more implicit interface that must be implemented so that the ISA can access whatever state it needs.

Definition at line 88 of file thread_context.hh.

Member Enumeration Documentation

◆ Status

enum ThreadContext::Status
Enumerator
Active 

Running.

Instructions should be executed only when the context is in this state.

Suspended 

Temporarily inactive.

Entered while waiting for synchronization, etc.

Halting 

Trying to exit and waiting for an event to completely exit.

Entered when target executes an exit syscall.

Halted 

Permanently shut down.

Entered when target executes m5exit pseudo-instruction. When all contexts enter this state, the simulation will terminate.

Definition at line 99 of file thread_context.hh.

Constructor & Destructor Documentation

◆ ~ThreadContext()

virtual ThreadContext::~ThreadContext ( )
inlinevirtual

Reimplemented in Iris::ThreadContext.

Definition at line 119 of file thread_context.hh.

Member Function Documentation

◆ activate()

virtual void ThreadContext::activate ( )
pure virtual

Set the status to Active.

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by cloneFunc(), execveFunc(), Process::initState(), System::Threads::Thread::resume(), HSADriver::signalWakeupEvent(), FVPBasePwrCtrl::startCoreUp(), PseudoInst::wakeCPU(), and FutexMap::wakeup_bitset().

◆ clearArchRegs()

virtual void ThreadContext::clearArchRegs ( )
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by cloneFunc(), execveFunc(), and ArmISA::Reset::invoke().

◆ compare()

void ThreadContext::compare ( ThreadContext *  one,
ThreadContext *  two 
)
static

function to compare two thread contexts (for debugging)

Definition at line 55 of file thread_context.cc.

References contextId(), cpuId(), DPRINTF, ArmISA::i, ArmISA::NumCCRegs, ArmISA::NumFloatRegs, ArmISA::NumIntRegs, ArmISA::NumMiscRegs, ArmISA::NumVecPredRegs, ArmISA::NumVecRegs, Ps2::one, panic, pcState(), readCCReg(), readFloatReg(), readIntReg(), readMiscRegNoEffect(), readVecPredReg(), readVecReg(), ArmISA::t1, ArmISA::t2, VecPredRegClass, and VecRegClass.

◆ contextId()

virtual ContextID ThreadContext::contextId ( ) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by ArmISA::ISA::addressTranslation(), ArmISA::ISA::addressTranslation64(), FVPBasePwrCtrl::clearStandByWfi(), FVPBasePwrCtrl::clearWakeRequest(), cloneFunc(), compare(), SimpleThread::copyState(), BaseKvmCPU::doMMIOAccess(), execveFunc(), X86ISA::TLB::finalizePhysical(), CheckerCPU::genMemFragmentRequest(), ArmPPIGen::get(), FVPBasePwrCtrl::getCorePwrStatus(), getcpuFunc(), ArmISA::ISA::getGenericTimer(), X86KvmCPU::handleKvmExitIO(), FVPBasePwrCtrl::powerCoreOff(), FVPBasePwrCtrl::powerCoreOn(), quiesce(), quiesceTick(), SparcISA::ISA::readFSReg(), X86ISA::ISA::readMiscReg(), RiscvISA::ISA::readMiscReg(), BaseCPU::registerThreadContexts(), FVPBasePwrCtrl::setStandByWfi(), ArmISA::PMU::setThreadContext(), ArmISA::ISA::setupThreadContext(), FVPBasePwrCtrl::setWakeRequest(), FVPBasePwrCtrl::startCoreUp(), BaseCPU::takeOverFrom(), takeOverFrom(), ArmInterruptPin::targetContext(), X86ISA::GpuTLB::translate(), TranslatingPortProxy::tryMemsetBlob(), TranslatingPortProxy::tryReadBlob(), TranslatingPortProxy::tryWriteBlob(), and ArmISA::TLB::updateMiscReg().

◆ copyArchRegs()

virtual void ThreadContext::copyArchRegs ( ThreadContext *  tc)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by takeOverFrom().

◆ cpuId()

virtual int ThreadContext::cpuId ( ) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by cloneFunc(), compare(), ArmISA::getAff0(), ArmISA::getAff1(), ArmISA::getMPIDR(), GPUComputeDriver::ioctl(), ArmISA::DumpStats::process(), X86ISA::Interrupts::setThreadContext(), HSADriver::signalWakeupEvent(), GPUComputeDriver::sleepCPU(), and Trace::InstPBTrace::traceInst().

◆ descheduleInstCountEvent()

virtual void ThreadContext::descheduleInstCountEvent ( Event *  event)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by BaseRemoteGDB::descheduleInstCommitEvent().

◆ exit()

virtual int ThreadContext::exit ( )
inlinevirtual

Definition at line 302 of file thread_context.hh.

◆ flattenRegId()

virtual RegId ThreadContext::flattenRegId ( const RegId &  reg_id) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by Minor::flattenRegIndex(), DefaultRename< Impl >::renameDestRegs(), and DefaultRename< Impl >::renameSrcRegs().

◆ getCheckerCpuPtr()

virtual CheckerCPU* ThreadContext::getCheckerCpuPtr ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by BaseCPU::flushTLBs(), ArmISA::TLBIALL::operator()(), ArmISA::TLBIALLEL::operator()(), ArmISA::TLBIVMALL::operator()(), ArmISA::TLBIASID::operator()(), ArmISA::TLBIALLN::operator()(), ArmISA::TLBIMVAA::operator()(), ArmISA::TLBIMVA::operator()(), ArmISA::TLBIIPA::operator()(), ArmISA::SkipFunc::returnFromFuncIn(), ArmISA::ISA::setMiscReg(), and BaseCPU::takeOverFrom().

◆ getCpuPtr()

virtual BaseCPU* ThreadContext::getCpuPtr ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by SparcISA::ISA::checkSoftInt(), Linux::devRandom(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), BaseStackTrace::dump(), PseudoInst::dumpresetstats(), PseudoInst::dumpstats(), ArmISA::TableWalker::fetchDescriptor(), ArmISA::Stage2MMU::Stage2Translation::finish(), PseudoInst::initParam(), RiscvISA::RiscvFault::invoke(), ArmISA::Reset::invoke(), ArmISA::AbortFault< DataAbort >::invoke(), ArmISA::SystemError::invoke(), ArmISA::ArmSev::invoke(), PseudoInst::loadsymbol(), PseudoInst::m5checkpoint(), Linux::openSpecialFile(), FVPBasePwrCtrl::powerCoreOff(), FVPBasePwrCtrl::powerCoreOn(), ArmISA::DumpStats::process(), SparcISA::ISA::processHSTickCompare(), SparcISA::ISA::processSTickCompare(), PseudoInst::quiesceCycles(), PseudoInst::quiesceSkip(), X86ISA::ISA::readMiscReg(), RiscvISA::ISA::readMiscReg(), SparcISA::ISA::readMiscReg(), ArmISA::ISA::readMiscReg(), MipsISA::readRegOtherThread(), System::Threads::replace(), PseudoInst::resetstats(), System::Threads::Thread::resume(), ArmISA::sendEvent(), SparcISA::ISA::setFSReg(), X86ISA::ISA::setMiscReg(), RiscvISA::ISA::setMiscReg(), MipsISA::ISA::setMiscReg(), SparcISA::ISA::setMiscReg(), MipsISA::setRegOtherThread(), Trace::TarmacContext::tarmacCpuName(), PseudoInst::workbegin(), and PseudoInst::workend().

◆ getCurrentInstCount()

virtual Tick ThreadContext::getCurrentInstCount ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by BaseRemoteGDB::scheduleInstCommitEvent().

◆ getDecoderPtr()

virtual TheISA::Decoder* ThreadContext::getDecoderPtr ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by Minor::Fetch2::evaluate(), GenericHtmFailureFault::invoke(), SparcISA::ISA::setMiscReg(), ArmISA::ISA::setMiscReg(), X86ISA::ISA::setThreadContext(), SimpleThread::takeOverFrom(), O3ThreadContext< Impl >::takeOverFrom(), and X86ISA::ISA::updateHandyM5Reg().

◆ getHtmCheckpointPtr()

virtual BaseHTMCheckpointPtr& ThreadContext::getHtmCheckpointPtr ( )
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by SimpleExecContext::getHtmTransactionUid(), GenericHtmFailureFault::invoke(), and SimpleExecContext::newHtmTransactionUid().

◆ getIsaPtr()

virtual BaseISA* ThreadContext::getIsaPtr ( )
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by MiscRegOp64::checkEL2Trap(), X86ISA::doCpuid(), ArmISA::ArmStaticInst::getCurSveVecLenInBits(), ArmISA::ISA::getSelfDebug(), ArmISA::mcrMrc15TrapToHyp(), BaseCPU::registerThreadContexts(), ArmISA::snsBankedIndex64(), and BaseCPU::takeOverFrom().

◆ getMMUPtr()

virtual BaseMMU* ThreadContext::getMMUPtr ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by RiscvISA::RemoteGDB::acc(), X86ISA::RemoteGDB::acc(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), BaseKvmCPU::doMMIOAccess(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), BaseCPU::flushTLBs(), SparcISA::TLB::GetTsbPtr(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), X86ISA::PageFault::invoke(), Trace::TarmacParserRecord::readMemNoEffect(), Minor::LSQ::SplitDataRequest::sendNextFragmentToTranslation(), X86ISA::ISA::setMiscReg(), Minor::LSQ::SingleDataRequest::startAddrTranslation(), BaseCPU::takeOverFrom(), Trace::TarmacTracerRecordV8::TraceInstEntryV8::TraceInstEntryV8(), Trace::TarmacTracerRecordV8::TraceMemEntryV8::TraceMemEntryV8(), RiscvISA::TLB::translateFunctional(), TranslatingPortProxy::tryTLBsOnce(), and tryTranslate().

◆ getPhysProxy()

virtual PortProxy& ThreadContext::getPhysProxy ( )
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by SparcISA::TLB::translateFunctional().

◆ getProcessPtr()

virtual Process* ThreadContext::getProcessPtr ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by _llseekFunc(), SparcISA::RemoteGDB::acc(), PowerISA::RemoteGDB::acc(), MipsISA::RemoteGDB::acc(), RiscvISA::RemoteGDB::acc(), X86ISA::RemoteGDB::acc(), ArmISA::RemoteGDB::acc(), acceptFunc(), accessFunc(), bindFunc(), brkFunc(), chdirFunc(), chmodFunc(), chownFunc(), cloneFunc(), closeFunc(), connectFunc(), dup2Func(), dupFunc(), X86ISA::EmuLinux::event(), eventfdFunc(), execveFunc(), exitImpl(), fallocateFunc(), fchmodFunc(), fchownFunc(), fcntl64Func(), fcntlFunc(), SETranslatingPortProxy::fixupAddr(), fstat64Func(), fstatat64Func(), fstatfsFunc(), fstatFunc(), ftruncate64Func(), ftruncateFunc(), futexFunc(), getcwdFunc(), getegidFunc(), geteuidFunc(), getgidFunc(), getpagesizeFunc(), getpeernameFunc(), getpgrpFunc(), getpidFunc(), getppidFunc(), getsocknameFunc(), getsockoptFunc(), gettidFunc(), getuidFunc(), GenericPageTableFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), SparcISA::SpillNNormal::invoke(), SparcISA::FillNNormal::invoke(), SparcISA::TrapInstruction::invoke(), X86ISA::PageFault::invoke(), ioctlFunc(), SparcISA::SEWorkload::is64(), X86ISA::GpuTLB::issueTLBLookup(), linkFunc(), listenFunc(), lseekFunc(), lstat64Func(), lstatFunc(), mkdirFunc(), mknodFunc(), HSADriver::mmap(), Shader::mmap(), mmap2Func(), mmapFunc(), mremapFunc(), munmapFunc(), HSADriver::open(), openatFunc(), X86ISA::EmuLinux::pageFault(), pipe2Func(), pollFunc(), pread64Func(), pwrite64Func(), readFunc(), readlinkFunc(), readvFunc(), recvfromFunc(), X86ISA::GpuTLB::CpuSidePort::recvFunctional(), recvmsgFunc(), BaseCPU::registerThreadContexts(), renameFunc(), rmdirFunc(), selectFunc(), sendmsgFunc(), ComputeUnit::sendRequest(), sendtoFunc(), setpgidFunc(), setsockoptFunc(), X86ISA::setThreadArea32Func(), setTidAddressFunc(), shutdownFunc(), socketFunc(), socketpairFunc(), stat64Func(), statfsFunc(), statFunc(), symlinkFunc(), MipsISA::EmuLinux::syscall(), PowerISA::EmuLinux::syscall(), ArmISA::EmuLinux::syscall(), RiscvISA::EmuLinux::syscall(), X86ISA::EmuLinux::syscall(), ArmISA::EmuFreebsd::syscall(), SEWorkload::syscall(), SparcISA::EmuLinux::syscall32(), SparcISA::EmuLinux::syscall64(), sysinfoFunc(), takeOverFrom(), tgkillFunc(), X86ISA::TLB::translate(), RiscvISA::TLB::translate(), X86ISA::GpuTLB::translate(), MipsISA::TLB::translateAtomic(), PowerISA::TLB::translateData(), MipsISA::TLB::translateFunctional(), RiscvISA::TLB::translateFunctional(), X86ISA::TLB::translateFunctional(), PowerISA::TLB::translateFunctional(), SparcISA::TLB::translateFunctional(), PowerISA::TLB::translateInst(), ArmISA::TLB::translateSe(), X86ISA::GpuTLB::translationReturn(), truncate64Func(), truncateFunc(), SparcISA::unameFunc(), X86ISA::unameFunc(), MipsISA::unameFunc(), PowerISA::unameFunc(), ArmISA::unameFunc32(), RiscvISA::unameFunc32(), RiscvISA::unameFunc64(), ArmISA::unameFunc64(), unlinkFunc(), utimesFunc(), wait4Func(), writeFunc(), and writevFunc().

◆ getSystemPtr()

virtual System* ThreadContext::getSystemPtr ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by _llseekFunc(), PseudoInst::addsymbol(), PseudoInst::arm(), ArmISA::TLBIOp::broadcast(), cloneFunc(), Linux::cpuOnline(), SparcISA::TLB::doMmuRegWrite(), BaseStackTrace::dump(), exitFutexWake(), exitImpl(), futexFunc(), ArmSemihosting::gatherHeapInfo(), ArmSystem::getArmSystem(), getcpuFunc(), getrlimitFunc(), System::Threads::insert(), SESyscallFault::invoke(), RiscvISA::Reset::invoke(), SparcISA::TrapInstruction::invoke(), ArmISA::Reset::invoke(), ArmISA::SupervisorCall::invoke(), RiscvISA::SyscallFault::invokeSE(), PseudoInst::loadsymbol(), pollFunc(), ArmSemihosting::portProxy(), ArmISA::DumpStats::process(), quiesce(), quiesceTick(), PseudoInst::readfile(), SparcISA::ISA::readFSReg(), ArmISA::ISA::readMiscReg(), selectFunc(), SparcISA::ISA::setFSReg(), setpgidFunc(), takeOverFrom(), tgkillFunc(), DistIface::toggleSync(), PseudoInst::triggerWorkloadEvent(), wait4Func(), PseudoInst::wakeCPU(), PseudoInst::workbegin(), and PseudoInst::workend().

◆ getUseForClone()

bool ThreadContext::getUseForClone ( )
inline

Definition at line 95 of file thread_context.hh.

References useForClone.

◆ getVirtProxy()

virtual PortProxy& ThreadContext::getVirtProxy ( )
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by _llseekFunc(), acceptFunc(), accessFunc(), PseudoInst::addsymbol(), X86ISA::archPrctlFunc(), bindFunc(), chdirFunc(), chmodFunc(), chownFunc(), cloneFunc(), connectFunc(), Linux::ThreadInfo::curTaskInfo(), Linux::ThreadInfo::curTaskMmFromTaskStruct(), Linux::ThreadInfo::curTaskNameFromTaskStruct(), Linux::ThreadInfo::curTaskPIDFromTaskStruct(), Linux::ThreadInfo::curTaskStartFromTaskStruct(), Linux::ThreadInfo::curTaskTGIDFromTaskStruct(), execveFunc(), exitFutexWake(), SparcISA::SEWorkload::flushWindows(), fstatat64Func(), futexFunc(), GuestABI::Argument< Aapcs32, Composite, typename std::enable_if_t< IsAapcs32Composite< Composite >::value > >::get(), Linux::ThreadInfo::get_data(), getcwdFunc(), gethostnameFunc(), getpeernameFunc(), SparcISA::getresuidFunc(), getsocknameFunc(), getsockoptFunc(), ArmLinuxProcess32::initState(), GPUComputeDriver::ioctl(), ioctlFunc(), linkFunc(), lstat64Func(), lstatFunc(), mkdirFunc(), mknodFunc(), openatFunc(), X86ISA::EmuLinux::pageFault(), pipe2Func(), pollFunc(), ArmSemihosting::portProxy(), pread64Func(), Linux::printk(), pwrite64Func(), BaseRemoteGDB::read(), PseudoInst::readfile(), readFunc(), readlinkFunc(), Trace::TarmacParserRecord::readMemNoEffect(), readvFunc(), recvfromFunc(), recvmsgFunc(), renameFunc(), Process::replicatePage(), rmdirFunc(), sendmsgFunc(), sendtoFunc(), setsockoptFunc(), X86ISA::setThreadArea32Func(), ArmISA::setTLSFunc32(), socketpairFunc(), stat64Func(), statfsFunc(), statFunc(), symlinkFunc(), ArmISA::sysctlFunc(), timeFunc(), truncate64Func(), truncateFunc(), unlinkFunc(), utimesFunc(), wait4Func(), BaseRemoteGDB::write(), PseudoInst::writefile(), writeFunc(), and writevFunc().

◆ getWritableVecPredReg()

virtual TheISA::VecPredRegContainer& ThreadContext::getWritableVecPredReg ( const RegId &  reg)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ getWritableVecPredRegFlat()

virtual TheISA::VecPredRegContainer& ThreadContext::getWritableVecPredRegFlat ( RegIndex  idx)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

◆ getWritableVecReg()

virtual TheISA::VecRegContainer& ThreadContext::getWritableVecReg ( const RegId &  reg)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), and ArmV8KvmCPU::updateThreadContext().

◆ getWritableVecRegFlat()

virtual TheISA::VecRegContainer& ThreadContext::getWritableVecRegFlat ( RegIndex  idx)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

◆ halt()

virtual void ThreadContext::halt ( )
pure virtual

Set the status to Halted.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by exitImpl().

◆ htmAbortTransaction()

virtual void ThreadContext::htmAbortTransaction ( uint64_t  htm_uid,
HtmFailureFaultCause  cause 
)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by GenericHtmFailureFault::invoke().

◆ initMemProxies()

virtual void ThreadContext::initMemProxies ( ThreadContext *  tc)
pure virtual

Initialise the physical and virtual port proxies and tie them to the data port of the CPU.

tc ThreadContext for the virtual-to-physical translation

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by BaseKvmCPU::init(), and MinorCPU::init().

◆ instAddr()

virtual Addr ThreadContext::instAddr ( ) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by BaseKvmCPU::doMMIOAccess(), RiscvISA::RiscvFault::invoke(), BaseCPU::mwaitAtomic(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), Minor::Execute::tryPCEvents(), ArmV8KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmStateCore(), and X86KvmCPU::updateKvmStateRegs().

◆ microPC()

virtual MicroPC ThreadContext::microPC ( ) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

◆ nextInstAddr()

virtual Addr ThreadContext::nextInstAddr ( ) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by Trace::ArmNativeTrace::check().

◆ pcState() [1/2]

virtual TheISA::PCState ThreadContext::pcState ( ) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by ArmISA::ISA::addressTranslation(), ArmISA::ISA::addressTranslation64(), GenericISA::M5DebugFault::advancePC(), ArmISA::SoftwareStep::advanceSS(), MipsProcess::argsInit(), PowerProcess::argsInit(), RiscvProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), Trace::SparcNativeTrace::check(), cloneFunc(), BaseRemoteGDB::cmd_async_cont(), BaseRemoteGDB::cmd_async_step(), BaseRemoteGDB::cmd_cont(), BaseRemoteGDB::cmd_step(), Minor::Execute::commit(), Minor::Execute::commitInst(), compare(), O3ThreadContext< Impl >::copyArchRegs(), PowerISA::copyRegs(), X86ISA::copyRegs(), ArmISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), MipsISA::copyRegs(), ArmISA::copyVecRegs(), SparcISA::doNormalFault(), SparcISA::doREDFault(), X86ISA::EmuLinux::event(), Minor::Execute::executeMemRefInst(), execveFunc(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), SparcISA::SEWorkload::handleTrap(), X86ISA::FsWorkload::initState(), FullO3CPU< O3CPUImpl >::insertThread(), FaultBase::invoke(), X86ISA::X86FaultBase::invoke(), SparcISA::SparcFaultBase::invoke(), SESyscallFault::invoke(), ReExec::invoke(), MipsISA::MipsFaultBase::invoke(), X86ISA::X86Trap::invoke(), SparcISA::PowerOnReset::invoke(), SyscallRetryFault::invoke(), RiscvISA::RiscvFault::invoke(), RiscvISA::Reset::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), SparcISA::SpillNNormal::invoke(), MipsISA::TlbFault< TlbInvalidFault >::invoke(), SparcISA::FillNNormal::invoke(), SparcISA::TrapInstruction::invoke(), X86ISA::PageFault::invoke(), ArmISA::Reset::invoke(), ArmISA::SupervisorCall::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::ArmFault::invoke64(), RiscvISA::RiscvFault::invokeSE(), RiscvISA::UnknownInstFault::invokeSE(), RiscvISA::IllegalInstFault::invokeSE(), RiscvISA::UnimplementedFault::invokeSE(), RiscvISA::IllegalFrmFault::invokeSE(), ioctlFunc(), mmapFunc(), SkipFuncBase::process(), PseudoInst::pseudoInstWork(), Trace::TarmacParserRecord::readMemNoEffect(), ArmISA::ISA::readMiscReg(), ArmISA::HTMCheckpoint::restore(), ArmISA::SkipFunc::returnFromFuncIn(), ArmISA::HTMCheckpoint::save(), serialize(), MipsISA::MipsFaultBase::setExceptionState(), RiscvISA::ISA::setMiscReg(), ArmISA::ISA::setMiscReg(), setNPC(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), X86ISA::EmuLinux::syscall(), Minor::Execute::takeInterrupt(), ArmISA::SelfDebug::testBreakPoints(), BaseRemoteGDB::trap(), Minor::Execute::tryPCEvents(), Minor::Execute::tryToBranch(), unserialize(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), ArmKvmCPU::updateTCStateCore(), ArmV8KvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContextRegs(), and Minor::Fetch1::wakeupFetch().

◆ pcState() [2/2]

virtual void ThreadContext::pcState ( const TheISA::PCState &  val)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

◆ pcStateNoRecord()

virtual void ThreadContext::pcStateNoRecord ( const TheISA::PCState &  val)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by ArmISA::SkipFunc::returnFromFuncIn(), and ArmISA::ISA::setMiscReg().

◆ quiesce()

void ThreadContext::quiesce ( )

Quiesce thread context.

Definition at line 129 of file thread_context.cc.

References contextId(), getSystemPtr(), System::Threads::quiesce(), and System::threads.

Referenced by PseudoInst::quiesce(), and DistIface::toggleSync().

◆ quiesceTick()

void ThreadContext::quiesceTick ( Tick  resume)

Quiesce, suspend, and schedule activate at resume.

Definition at line 136 of file thread_context.cc.

References contextId(), getSystemPtr(), System::Threads::quiesceTick(), and System::threads.

Referenced by FreeBSD::onUDelay(), Linux::onUDelay(), PseudoInst::quiesceCycles(), PseudoInst::quiesceNs(), PseudoInst::quiesceSkip(), and DistIface::toggleSync().

◆ readCCReg()

virtual RegVal ThreadContext::readCCReg ( RegIndex  reg_idx) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by compare(), ArmISA::copyRegs(), X86ISA::getRFlags(), ArmISA::ArmFault::invoke(), ArmISA::ArmFault::invoke64(), ArmISA::ISA::readMiscReg(), Trace::ArmNativeTrace::ThreadState::update(), Trace::TarmacTracerRecord::TraceRegEntry::updateCC(), ArmV8KvmCPU::updateKvmState(), and Trace::TarmacTracerRecord::TraceRegEntry::updateMisc().

◆ readCCRegFlat()

virtual RegVal ThreadContext::readCCRegFlat ( RegIndex  idx) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, Iris::ThreadContext, FastModel::CortexA76TC, and FastModel::CortexR52TC.

Referenced by X86ISA::copyRegs(), and serialize().

◆ readFloatReg()

virtual RegVal ThreadContext::readFloatReg ( RegIndex  reg_idx) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by compare(), PowerISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), MipsISA::readRegOtherThread(), Trace::X86NativeTrace::ThreadState::update(), Trace::TarmacTracerRecord::TraceRegEntry::updateFloat(), and updateKvmStateFPUCommon().

◆ readFloatRegFlat()

virtual RegVal ThreadContext::readFloatRegFlat ( RegIndex  idx) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by X86ISA::copyRegs(), ArmISA::copyRegs(), MipsISA::copyRegs(), serialize(), and ArmKvmCPU::updateKvmStateVFP().

◆ readFuncExeInst()

virtual Counter ThreadContext::readFuncExeInst ( ) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by O3ThreadContext< Impl >::copyArchRegs(), SimpleThread::copyState(), SimpleThread::takeOverFrom(), and O3ThreadContext< Impl >::takeOverFrom().

◆ readIntReg()

virtual RegVal ThreadContext::readIntReg ( RegIndex  reg_idx) const
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, CheckerThreadContext< TC >, and FastModel::CortexR52TC.

Referenced by PowerISA::BranchRegCond::branchTarget(), ArmSemihosting::call32(), ArmSemihosting::call64(), Trace::SparcNativeTrace::check(), compare(), PowerISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), SparcISA::doNormalFault(), SparcISA::doREDFault(), TimingExprReadIntReg::eval(), SparcISA::SEWorkload::flushWindows(), GuestABI::Argument< X86PseudoInstABI, uint64_t >::get(), GuestABI::Argument< ABI, Arg, typename std::enable_if_t< std::is_base_of< GenericSyscallABI64, ABI >::value &&std::is_integral< Arg >::value > >::get(), GuestABI::Argument< ABI, Arg, typename std::enable_if_t< std::is_integral< Arg >::value &&!ABI::template IsWide< Arg >::value > >::get(), GuestABI::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)<=sizeof(uint32_t)) > >::get(), GuestABI::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)<=8)> >::get(), GuestABI::Argument< Aapcs32, Composite, typename std::enable_if_t< IsAapcs32Composite< Composite >::value > >::get(), GuestABI::Argument< Aapcs64, Composite, typename std::enable_if_t< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value > >::get(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), ArmISA::DumpStats::getTaskDetails(), ArmISA::DumpStats64::getTaskDetails(), ArmISA::ArmFault::invoke(), GenericSyscallABI32::mergeRegs(), GuestABI::Result< Aapcs32, Composite, typename std::enable_if_t< IsAapcs32Composite< Composite >::value > >::prepare(), ArmISA::ISA::readMiscReg(), MipsISA::readRegOtherThread(), ArmISA::SkipFunc::returnFromFuncIn(), ArmISA::HTMCheckpoint::save(), GuestABI::Result< PowerISA::SEWorkload::SyscallABI, SyscallReturn >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< SparcISA::SEWorkload::BaseSyscallABI, ABI >::value > >::store(), GuestABI::Result< Aapcs64, Composite, typename std::enable_if_t< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value > >::store(), MipsISA::EmuLinux::syscall(), PowerISA::EmuLinux::syscall(), ArmISA::EmuLinux::syscall(), RiscvISA::EmuLinux::syscall(), X86ISA::EmuLinux::syscall(), ArmISA::EmuFreebsd::syscall(), SparcISA::EmuLinux::syscall32(), SparcISA::EmuLinux::syscall64(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), Trace::TarmacTracerRecord::TraceRegEntry::updateInt(), and ArmV8KvmCPU::updateKvmState().

◆ readIntRegFlat()

virtual RegVal ThreadContext::readIntRegFlat ( RegIndex  idx) const
pure virtual

Flat register interfaces.

Some architectures have different registers visible in different modes. Such architectures "flatten" a register (see flattenRegId()) to map it into the gem5 register file. This interface provides a flat interface to the underlying register file, which allows for example serialization code to access all registers.

Implemented in SimpleThread, CheckerThreadContext< TC >, Iris::ThreadContext, FastModel::CortexR52TC, and FastModel::CortexA76TC.

Referenced by X86ISA::copyRegs(), ArmISA::copyRegs(), MipsISA::copyRegs(), FastModel::CortexA76TC::readIntRegFlat(), serialize(), and ArmKvmCPU::updateKvmStateCore().

◆ readLastActivate()

virtual Tick ThreadContext::readLastActivate ( )
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by PseudoInst::quiesceTime().

◆ readLastSuspend()

virtual Tick ThreadContext::readLastSuspend ( )
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by PseudoInst::quiesceTime().

◆ readMiscReg()

virtual RegVal ThreadContext::readMiscReg ( RegIndex  misc_reg)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by ArmISA::AArch32isUndefinedGenericTimer(), RiscvISA::RemoteGDB::acc(), ArmISA::addPAC(), ArmISA::addPACDA(), ArmISA::addPACDB(), ArmISA::addPACGA(), ArmISA::addPACIA(), ArmISA::addPACIB(), ArmISA::VectorCatch::addressMatching(), ArmProcess64::armHwcapImpl(), ArmISA::authDA(), ArmISA::authDB(), ArmISA::authIA(), ArmISA::authIB(), MipsISA::MipsFaultBase::base(), ArmISA::calculateBottomPACBit(), ArmISA::calculateTBI(), ArmISA::canReadAArch64SysReg(), ArmISA::canWriteAArch64SysReg(), ArmISA::ArmStaticInst::checkAdvSIMDOrFPEnabled32(), MiscRegOp64::checkEL1Trap(), MiscRegOp64::checkEL2Trap(), MiscRegOp64::checkEL3Trap(), ArmISA::ArmStaticInst::checkFPAdvSIMDTrap64(), ArmISA::Interrupts::checkInterrupts(), ArmISA::TLB::checkPAN(), ArmISA::ArmStaticInst::checkSveEnabled(), ArmISA::computeAddrTop(), ArmISA::condGenericTimerCommonEL0SystemAccessTrapEL2(), ArmISA::condGenericTimerCommonEL1SystemAccessTrapEL2(), ArmISA::condGenericTimerPhysEL1SystemAccessTrapEL2(), ArmISA::condGenericTimerPhysHypTrap(), ArmISA::condGenericTimerSystemAccessTrapEL1(), X86ISA::copyMiscRegs(), ArmISA::debugTargetFrom(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), RiscvISA::TLB::doTranslate(), ArmKvmCPU::dumpKvmStateCoProc(), ArmISA::PrefetchAbort::ec(), ArmISA::DataAbort::ec(), ArmISA::EL2Enabled(), ArmISA::ELIsInHost(), ArmISA::ELStateUsingAArch32K(), ArmISA::VectorCatch::exceptionTrapping(), MiscRegImplDefined64::execute(), SparcISA::SEWorkload::flushWindows(), SparcISA::RemoteGDB::gdbRegs(), ArmISA::ArmStaticInst::generalExceptionsToAArch64(), ArmISA::BrkPoint::getAddrfromReg(), ArmISA::WatchPoint::getAddrfromReg(), ArmISA::BrkPoint::getContextfromReg(), ArmISA::BrkPoint::getControlReg(), ArmISA::Interrupts::getInterrupt(), RiscvISA::TLB::getMemPriv(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), ArmISA::getRestoredITBits(), ArmISA::ArmFault::getVector(), ArmISA::Reset::getVector(), ArmISA::ArmFault::getVector64(), ArmISA::VectorCatch::getVectorBase(), ArmISA::BrkPoint::getVMIDfromReg(), RiscvISA::Interrupts::globalMask(), ArmISA::HaveLVA(), ArmISA::HavePACExt(), ArmISA::HaveSecureEL2Ext(), ArmISA::HaveVirtHostExt(), ArmISA::illegalExceptionReturn(), ArmISA::inAArch64(), ArmISA::SelfDebug::init(), ArmProcess32::initState(), ArmProcess64::initState(), RiscvISA::RiscvFault::invoke(), RiscvISA::Reset::invoke(), MipsISA::CoprocessorUnusableFault::invoke(), ArmISA::ArmFault::invoke(), ArmISA::Reset::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::AbortFault< DataAbort >::invoke(), ArmISA::ArmFault::invoke64(), ArmISA::SelfDebug::isDebugEnabled(), ArmISA::SelfDebug::isDebugEnabledForEL32(), ArmISA::isGenericTimerCommonEL0HypTrap(), ArmISA::isGenericTimerCommonEL0SystemAccessTrapEL2(), ArmISA::isGenericTimerPhysEL0SystemAccessTrapEL2(), ArmISA::isGenericTimerPhysEL1SystemAccessTrapEL2(), ArmISA::isGenericTimerSystemAccessTrapEL1(), ArmISA::isGenericTimerSystemAccessTrapEL3(), ArmISA::isGenericTimerVirtSystemAccessTrapEL2(), ArmISA::isSecure(), ArmISA::isSecureBelowEL3(), ArmISA::IsSecureEL2Enabled(), ArmISA::isUnpriviledgeAccess(), ArmISA::ArmStaticInst::isWFxTrapping(), X86KvmCPU::kvmRunWrapper(), ArmISA::longDescFormatInUse(), ArmISA::mcrMrc15TrapToHyp(), ArmISA::mcrrMrrc15TrapToHyp(), ArmISA::TableWalker::memAttrs(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::TableWalker::memAttrsLPAE(), ArmISA::ArmFaultVals< FastInterrupt >::offset(), MipsISA::TlbRefillFault::offset(), ArmISA::TLBIALL::operator()(), ArmISA::TLBIALLEL::operator()(), ArmISA::TLBIVMALL::operator()(), ArmISA::TLBIASID::operator()(), ArmISA::TLBIMVAA::operator()(), ArmISA::TLBIMVA::operator()(), X86ISA::EmuLinux::pageFault(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkAArch64(), ArmISA::TableWalker::processWalkLPAE(), ArmISA::purifyTaggedAddr(), ArmISA::readMPIDR(), MipsISA::readRegOtherThread(), ArmISA::s1TranslationRegime(), ArmISA::HTMCheckpoint::save(), ArmISA::sendEvent(), Iris::Interrupts::serialize(), MipsISA::MipsFaultBase::setExceptionState(), ArmISA::ISA::setMiscReg(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), MipsISA::TlbFault< TlbInvalidFault >::setTlbExceptionState(), ArmISA::snsBankedIndex(), ArmISA::snsBankedIndex64(), ArmISA::ArmStaticInst::softwareBreakpoint32(), ArmISA::SPAlignmentCheckEnabled(), ArmV8KvmCPU::startup(), ArmISA::stripPAC(), ArmISA::Interrupts::takeInt(), ArmISA::WatchPoint::test(), ArmISA::BrkPoint::testAddrMatch(), ArmISA::BrkPoint::testAddrMissMatch(), ArmISA::BrkPoint::testContextMatch(), ArmISA::BrkPoint::testVMIDMatch(), RiscvISA::TLB::translate(), RiscvISA::TLB::translateFunctional(), ArmISA::TLB::translateMmuOff(), Trace::ArmNativeTrace::ThreadState::update(), ArmISA::ArmFault::update(), ArmV8KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmStateCore(), updateKvmStateFPUCommon(), X86KvmCPU::updateKvmStateMSRs(), X86KvmCPU::updateKvmStateRegs(), X86KvmCPU::updateKvmStateSRegs(), ArmKvmCPU::updateKvmStateVFP(), ArmISA::TLB::updateMiscReg(), ArmISA::upperAndLowerRange(), and ArmISA::TableWalker::walk().

◆ readMiscRegNoEffect()

virtual RegVal ThreadContext::readMiscRegNoEffect ( RegIndex  misc_reg) const
pure virtual

Implemented in FastModel::CortexR52TC, SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by ArmISA::AbortFault< DataAbort >::abortDisable(), ArmISA::Interrupt::abortDisable(), ArmISA::FastInterrupt::abortDisable(), X86ISA::archPrctlFunc(), MipsISA::Interrupts::checkInterrupts(), SparcISA::Interrupts::checkInterrupts(), ArmISA::ArmStaticInst::checkSETENDEnabled(), compare(), ArmISA::condGenericTimerCommonEL1SystemAccessTrapEL2(), SparcISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), MipsISA::copyRegs(), ArmISA::currOpMode(), ArmISA::debugTargetFrom(), SparcISA::doNormalFault(), SparcISA::doREDFault(), ArmKvmCPU::dumpKvmStateCoProc(), SparcISA::enterREDState(), X86ISA::TLB::finalizePhysical(), ArmISA::FastInterrupt::fiqDisable(), X86ISA::RemoteGDB::gdbRegs(), MipsISA::getCauseIP(), SparcISA::getHyperVector(), MipsISA::Interrupts::getInterrupt(), SparcISA::Interrupts::getInterrupt(), SparcISA::getPrivVector(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), X86ISA::getRFlags(), ArmISA::ArmFault::getVector(), ArmISA::Reset::getVector(), X86KvmCPU::handleIOMiscReg32(), X86KvmCPU::handleKvmExitIO(), ArmISA::SelfDebug::init(), X86ISA::FsWorkload::initState(), MipsISA::Interrupts::interruptsPending(), Iris::ISA::inUserMode(), SparcISA::SparcFaultBase::invoke(), X86ISA::X86FaultBase::invoke(), SparcISA::PowerOnReset::invoke(), MipsISA::ResetFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), ArmISA::ArmFault::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), X86ISA::PageFault::invoke(), ArmISA::VirtualDataAbort::invoke(), ArmISA::isBigEndian64(), MipsISA::InterruptFault::offset(), MipsISA::Interrupts::onCpuTimerInterrupt(), X86ISA::GpuTLB::pagingProtectionChecks(), SparcISA::ISA::processHSTickCompare(), SparcISA::ISA::processSTickCompare(), ArmISA::UndefinedInstruction::routeToHyp(), ArmISA::SupervisorCall::routeToHyp(), ArmISA::SupervisorTrap::routeToHyp(), ArmISA::PrefetchAbort::routeToHyp(), ArmISA::DataAbort::routeToHyp(), ArmISA::Interrupt::routeToHyp(), ArmISA::FastInterrupt::routeToHyp(), ArmISA::PCAlignmentFault::routeToHyp(), ArmISA::SPAlignmentFault::routeToHyp(), ArmISA::SystemError::routeToHyp(), ArmISA::SoftwareBreakpoint::routeToHyp(), ArmISA::HardwareBreakpoint::routeToHyp(), ArmISA::Watchpoint::routeToHyp(), ArmISA::SoftwareStepFault::routeToHyp(), ArmISA::IllegalInstSetStateFault::routeToHyp(), ArmISA::PrefetchAbort::routeToMonitor(), ArmISA::DataAbort::routeToMonitor(), ArmISA::Interrupt::routeToMonitor(), ArmISA::FastInterrupt::routeToMonitor(), ArmISA::SystemError::routeToMonitor(), Iris::ISA::serialize(), Iris::Interrupts::serialize(), MipsISA::setCauseIP(), setKvmDTableReg(), setKvmSegmentReg(), ArmISA::ISA::setMiscReg(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< SparcISA::SEWorkload::BaseSyscallABI, ABI >::value > >::store(), X86ISA::GpuTLB::tlbLookup(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), SparcISA::TLB::translateData(), SparcISA::TLB::translateFunctional(), SparcISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), Trace::ArmNativeTrace::ThreadState::update(), ArmISA::ArmFault::update(), Trace::TarmacTracerRecord::TraceRegEntry::updateInt(), ArmKvmCPU::updateKvmStateCoProc(), updateKvmStateFPUCommon(), X86KvmCPU::updateKvmStateFPULegacy(), X86KvmCPU::updateKvmStateFPUXSave(), Trace::TarmacTracerRecord::TraceRegEntry::updateMisc(), and ArmKvmCPU::updateTCStateCore().

◆ readStCondFailures()

virtual unsigned ThreadContext::readStCondFailures ( ) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

◆ readVec16BitLaneReg()

virtual ConstVecLane16 ThreadContext::readVec16BitLaneReg ( const RegId &  reg) const
pure virtual

Reads source vector 16bit operand.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVec32BitLaneReg()

virtual ConstVecLane32 ThreadContext::readVec32BitLaneReg ( const RegId &  reg) const
pure virtual

Reads source vector 32bit operand.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVec64BitLaneReg()

virtual ConstVecLane64 ThreadContext::readVec64BitLaneReg ( const RegId &  reg) const
pure virtual

Reads source vector 64bit operand.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVec8BitLaneReg()

virtual ConstVecLane8 ThreadContext::readVec8BitLaneReg ( const RegId &  reg) const
pure virtual

Vector Register Lane Interfaces.

Reads source vector 8bit operand.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVecElem()

virtual const TheISA::VecElem& ThreadContext::readVecElem ( const RegId &  reg) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVecElemFlat()

virtual const TheISA::VecElem& ThreadContext::readVecElemFlat ( RegIndex  idx,
const ElemIndex &  elem_idx 
) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by ArmISA::copyVecRegs().

◆ readVecPredReg()

virtual const TheISA::VecPredRegContainer& ThreadContext::readVecPredReg ( const RegId &  reg) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by compare(), ArmISA::HTMCheckpoint::save(), and Trace::TarmacTracerRecordV8::TraceRegEntryV8::updatePred().

◆ readVecPredRegFlat()

virtual const TheISA::VecPredRegContainer& ThreadContext::readVecPredRegFlat ( RegIndex  idx) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by serialize().

◆ readVecReg()

virtual const TheISA::VecRegContainer& ThreadContext::readVecReg ( const RegId &  reg) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, CheckerThreadContext< TC >, and FastModel::CortexR52TC.

Referenced by compare(), GuestABI::Argument< Aapcs32Vfp, Float, typename std::enable_if_t< std::is_floating_point< Float >::value > >::get(), GuestABI::Argument< Aapcs32Vfp, HA, typename std::enable_if_t< IsAapcs32HomogeneousAggregate< HA >::value > >::get(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), ArmISA::HTMCheckpoint::save(), GuestABI::Result< Aapcs32Vfp, Float, typename std::enable_if_t< std::is_floating_point< Float >::value > >::store(), GuestABI::Result< Aapcs32Vfp, HA, typename std::enable_if_t< IsAapcs32HomogeneousAggregate< HA >::value > >::store(), Trace::ArmNativeTrace::ThreadState::update(), ArmV8KvmCPU::updateKvmState(), and Trace::TarmacTracerRecordV8::TraceRegEntryV8::updateVec().

◆ readVecRegFlat()

virtual const TheISA::VecRegContainer& ThreadContext::readVecRegFlat ( RegIndex  idx) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by ArmISA::copyVecRegs(), and serialize().

◆ regStats()

virtual void ThreadContext::regStats ( const std::string &  name)
inlinevirtual

Reimplemented in Iris::ThreadContext, and CheckerThreadContext< TC >.

Definition at line 182 of file thread_context.hh.

Referenced by CheckerThreadContext< TC >::regStats().

◆ scheduleInstCountEvent()

virtual void ThreadContext::scheduleInstCountEvent ( Event *  event,
Tick  count 
)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by ElasticTrace::regProbeListeners(), and BaseRemoteGDB::scheduleInstCommitEvent().

◆ setCCReg()

virtual void ThreadContext::setCCReg ( RegIndex  reg_idx,
RegVal  val 
)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by ArmISA::copyRegs(), ArmISA::ISA::setMiscReg(), X86ISA::setRFlags(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< ArmISA::EmuFreebsd::BaseSyscallABI, ABI >::value > >::store(), and ArmV8KvmCPU::updateThreadContext().

◆ setCCRegFlat()

virtual void ThreadContext::setCCRegFlat ( RegIndex  idx,
RegVal  val 
)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, Iris::ThreadContext, FastModel::CortexA76TC, and FastModel::CortexR52TC.

Referenced by X86ISA::copyRegs(), and unserialize().

◆ setContextId()

virtual void ThreadContext::setContextId ( ContextID  id)
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by BaseCPU::registerThreadContexts(), and takeOverFrom().

◆ setFloatReg()

virtual void ThreadContext::setFloatReg ( RegIndex  reg_idx,
RegVal  val 
)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by PowerISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), MipsISA::setRegOtherThread(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), and updateThreadContextFPUCommon().

◆ setFloatRegFlat()

virtual void ThreadContext::setFloatRegFlat ( RegIndex  idx,
RegVal  val 
)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by X86ISA::copyRegs(), ArmISA::copyRegs(), MipsISA::copyRegs(), unserialize(), and ArmKvmCPU::updateTCStateVFP().

◆ setHtmCheckpointPtr()

virtual void ThreadContext::setHtmCheckpointPtr ( BaseHTMCheckpointPtr  cpt)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by ArmISA::ISA::startup().

◆ setIntReg()

virtual void ThreadContext::setIntReg ( RegIndex  reg_idx,
RegVal  val 
)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, CheckerThreadContext< TC >, and FastModel::CortexR52TC.

Referenced by X86Linux::archClone(), RiscvLinux64::archClone(), SparcLinux::archClone(), ArmLinux32::archClone(), RiscvLinux32::archClone(), ArmLinux64::archClone(), MipsProcess::argsInit(), PowerProcess::argsInit(), RiscvProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), PowerISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), SparcISA::SEWorkload::flushWindows(), SparcProcess::initState(), X86ISA::X86FaultBase::invoke(), ArmISA::ArmFault::invoke(), X86ISA::InitInterrupt::invoke(), ArmISA::HTMCheckpoint::restore(), ArmISA::ISA::setMiscReg(), MipsISA::setRegOtherThread(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), GuestABI::Result< X86PseudoInstABI, T >::store(), GuestABI::Result< RiscvISA::SEWorkload::SyscallABI, SyscallReturn >::store(), GuestABI::Result< PowerISA::SEWorkload::SyscallABI, SyscallReturn >::store(), GuestABI::Result< MipsISA::SEWorkload::SyscallABI, SyscallReturn >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< ArmISA::EmuLinux::BaseSyscallABI, ABI >::value > >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< ArmISA::EmuFreebsd::BaseSyscallABI, ABI >::value > >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< SparcISA::SEWorkload::BaseSyscallABI, ABI >::value > >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of< X86Linux::SyscallABI, ABI >::value > >::store(), GuestABI::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)< sizeof(uint32_t))> >::store(), GuestABI::Result< Aapcs32, Integer, typename std::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)==sizeof(uint32_t))> >::store(), GuestABI::Result< Aapcs32, Integer, typename std::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)==sizeof(uint64_t))> >::store(), GuestABI::enable_if_t< std::is_integral< Integer >::value &&(sizeof(Integer)<=8)> >::store(), GuestABI::Result< Aapcs32, Composite, typename std::enable_if_t< IsAapcs32Composite< Composite >::value > >::store(), GuestABI::Result< Aapcs64, Composite, typename std::enable_if_t< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value > >::store(), GuestABI::Result< ArmSemihosting::Abi32, ArmSemihosting::RetErrno >::store(), GuestABI::Result< ArmSemihosting::Abi64, ArmSemihosting::RetErrno >::store(), and ArmV8KvmCPU::updateThreadContext().

◆ setIntRegFlat()

virtual void ThreadContext::setIntRegFlat ( RegIndex  idx,
RegVal  val 
)
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, CheckerThreadContext< TC >, FastModel::CortexR52TC, and FastModel::CortexA76TC.

Referenced by X86ISA::copyRegs(), ArmISA::copyRegs(), MipsISA::copyRegs(), FastModel::CortexA76TC::setIntRegFlat(), unserialize(), ArmKvmCPU::updateTCStateCore(), and ArmV8KvmCPU::updateThreadContext().

◆ setMiscReg()

virtual void ThreadContext::setMiscReg ( RegIndex  misc_reg,
RegVal  val 
)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by ArmLinux::archClone(), SparcLinux::archClone(), SparcISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), SparcISA::TLB::doMmuRegWrite(), SparcISA::doNormalFault(), SparcISA::doREDFault(), SparcISA::enterREDState(), SparcISA::SEWorkload::flushWindows(), X86KvmCPU::handleIOMiscReg32(), SparcProcess::initState(), Sparc32Process::initState(), X86ISA::FsWorkload::initState(), ArmProcess32::initState(), ArmProcess64::initState(), Sparc64Process::initState(), X86ISA::X86_64Process::initState(), X86ISA::I386Process::initState(), X86ISA::installSegDesc(), SparcISA::PowerOnReset::invoke(), RiscvISA::RiscvFault::invoke(), RiscvISA::Reset::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), X86ISA::PageFault::invoke(), ArmISA::Reset::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::AbortFault< DataAbort >::invoke(), ArmISA::PCAlignmentFault::invoke(), ArmISA::HardwareBreakpoint::invoke(), ArmISA::Watchpoint::invoke(), ArmISA::ArmSev::invoke(), ArmISA::ArmFault::invoke64(), X86KvmCPU::kvmRunWrapper(), ArmISA::HTMCheckpoint::restore(), Iris::Interrupts::serialize(), setContextSegment(), GenericTimer::setMiscReg(), ArmISA::ISA::setMiscReg(), MipsISA::setRegOtherThread(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), X86ISA::setRFlags(), ArmISA::ArmFault::setSyndrome(), ArmISA::setTLSFunc32(), ArmISA::setTLSFunc64(), ArmKvmCPU::updateTCStateCore(), ArmKvmCPU::updateTCStateVFP(), ArmV8KvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContext(), and X86KvmCPU::updateThreadContextMSRs().

◆ setMiscRegNoEffect()

virtual void ThreadContext::setMiscRegNoEffect ( RegIndex  misc_reg,
RegVal  val 
)
pure virtual

Implemented in FastModel::CortexR52TC, SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by X86Linux::archClone(), SparcLinux::archClone(), X86ISA::archPrctlFunc(), SparcISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), MipsISA::copyRegs(), SparcISA::doNormalFault(), SparcISA::doREDFault(), SparcProcess::initState(), X86ISA::X86_64Process::initState(), X86ISA::I386Process::initState(), SparcISA::PowerOnReset::invoke(), MipsISA::CoprocessorUnusableFault::invoke(), MipsISA::AddressFault< TlbInvalidFault >::invoke(), ArmISA::ArmFault::invoke(), ArmISA::VirtualDataAbort::invoke(), MipsISA::setCauseIP(), MipsISA::MipsFaultBase::setExceptionState(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), MipsISA::setThreadAreaFunc(), MipsISA::TlbFault< TlbInvalidFault >::setTlbExceptionState(), ArmKvmCPU::updateTCStateCoProc(), ArmKvmCPU::updateTCStateCore(), ArmV8KvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContextFPU(), updateThreadContextFPUCommon(), and X86KvmCPU::updateThreadContextXSave().

◆ setNPC()

void ThreadContext::setNPC ( Addr  val)
inline

Definition at line 265 of file thread_context.hh.

References pcState(), and X86ISA::val.

Referenced by BaseKvmCPU::doMMIOAccess(), execveFunc(), and CheckerThreadContext< TC >::setNPC().

◆ setProcessPtr()

virtual void ThreadContext::setProcessPtr ( Process *  p)
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by cloneFunc(), and execveFunc().

◆ setStatus()

virtual void ThreadContext::setStatus ( Status  new_status)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by FullO3CPU< O3CPUImpl >::exitThreads(), FullO3CPU< O3CPUImpl >::insertThread(), and takeOverFrom().

◆ setStCondFailures()

virtual void ThreadContext::setStCondFailures ( unsigned  sc_failures)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

◆ setThreadId()

virtual void ThreadContext::setThreadId ( int  id)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by takeOverFrom().

◆ setUseForClone()

void ThreadContext::setUseForClone ( bool  new_val)
inline

Definition at line 97 of file thread_context.hh.

References useForClone.

Referenced by cloneFunc().

◆ setVecElem()

virtual void ThreadContext::setVecElem ( const RegId &  reg,
const TheISA::VecElem &  val 
)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

◆ setVecElemFlat()

virtual void ThreadContext::setVecElemFlat ( RegIndex  idx,
const ElemIndex &  elem_idx,
const TheISA::VecElem &  val 
)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by ArmISA::copyVecRegs().

◆ setVecLane() [1/4]

virtual void ThreadContext::setVecLane ( const RegId &  reg,
const LaneData< LaneSize::Byte > &  val 
)
pure virtual

Write a lane of the destination vector register.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ setVecLane() [2/4]

virtual void ThreadContext::setVecLane ( const RegId &  reg,
const LaneData< LaneSize::EightByte > &  val 
)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ setVecLane() [3/4]

virtual void ThreadContext::setVecLane ( const RegId &  reg,
const LaneData< LaneSize::FourByte > &  val 
)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ setVecLane() [4/4]

virtual void ThreadContext::setVecLane ( const RegId &  reg,
const LaneData< LaneSize::TwoByte > &  val 
)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ setVecPredReg()

virtual void ThreadContext::setVecPredReg ( const RegId &  reg,
const TheISA::VecPredRegContainer &  val 
)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by ArmISA::HTMCheckpoint::restore().

◆ setVecPredRegFlat()

virtual void ThreadContext::setVecPredRegFlat ( RegIndex  idx,
const TheISA::VecPredRegContainer &  val 
)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by unserialize().

◆ setVecReg()

virtual void ThreadContext::setVecReg ( const RegId &  reg,
const TheISA::VecRegContainer &  val 
)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by ArmISA::HTMCheckpoint::restore(), GuestABI::Result< Aapcs32Vfp, Float, typename std::enable_if_t< std::is_floating_point< Float >::value > >::store(), and GuestABI::Result< Aapcs32Vfp, HA, typename std::enable_if_t< IsAapcs32HomogeneousAggregate< HA >::value > >::store().

◆ setVecRegFlat()

virtual void ThreadContext::setVecRegFlat ( RegIndex  idx,
const TheISA::VecRegContainer &  val 
)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by ArmISA::copyVecRegs(), and unserialize().

◆ socketId()

virtual uint32_t ThreadContext::socketId ( ) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by ArmISA::getAff1(), ArmISA::getAff2(), FVPBasePwrCtrl::getCorePwrStatus(), ArmISA::getMPIDR(), FVPBasePwrCtrl::powerCoreOff(), FVPBasePwrCtrl::powerCoreOn(), and FVPBasePwrCtrl::write().

◆ status()

virtual Status ThreadContext::status ( ) const
pure virtual

Implemented in Iris::ThreadContext, SimpleThread, and CheckerThreadContext< TC >.

Referenced by Minor::Execute::commitInst(), SimpleThread::copyState(), BaseKvmCPU::drainResume(), exitImpl(), System::Threads::findFree(), Minor::Fetch1::getScheduledThread(), Minor::Execute::issue(), System::Threads::numRunning(), SparcISA::ISA::processHSTickCompare(), SparcISA::ISA::processSTickCompare(), setpgidFunc(), takeOverFrom(), DistIface::toggleSync(), Minor::Execute::tryToBranch(), and PseudoInst::wakeCPU().

◆ suspend()

virtual void ThreadContext::suspend ( )
pure virtual

Set the status to Suspended.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by SparcISA::ISA::setFSReg(), GPUComputeDriver::sleepCPU(), and FutexMap::suspend_bitset().

◆ takeOverFrom()

virtual void ThreadContext::takeOverFrom ( ThreadContext *  old_context)
pure virtual

Implemented in CheckerThreadContext< TC >, and SimpleThread.

Referenced by BaseCPU::takeOverFrom().

◆ threadId()

virtual int ThreadContext::threadId ( ) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by cloneFunc(), SimpleThread::copyState(), ArmISA::getAff0(), ArmISA::Reset::invoke(), ArmISA::AbortFault< DataAbort >::invoke(), ArmISA::SystemError::invoke(), ArmISA::ArmSev::invoke(), RiscvISA::ISA::readMiscReg(), ArmISA::ISA::readMiscReg(), ArmISA::sendEvent(), RiscvISA::ISA::setMiscReg(), BaseCPU::takeOverFrom(), and takeOverFrom().

Member Data Documentation

◆ DefaultFloatResult

const double ThreadContext::DefaultFloatResult = 0.0
static

Definition at line 43 of file guest_abi.test.cc.

Referenced by TEST().

◆ DefaultIntResult

const int ThreadContext::DefaultIntResult = 0
static

Definition at line 42 of file guest_abi.test.cc.

Referenced by TEST().

◆ floatResult

double ThreadContext::floatResult = DefaultFloatResult

Definition at line 46 of file guest_abi.test.cc.

Referenced by GuestABI::Result< TestABI_1D, Ret, typename std::enable_if_t< std::is_floating_point< Ret >::value > >::store(), GuestABI::Result< TestABI_2D, Ret, typename std::enable_if_t< std::is_floating_point< Ret >::value > >::store(), and TEST().

◆ floats

const double ThreadContext::floats
static
Initial value:
= {
10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0
}

Definition at line 40 of file guest_abi.test.cc.

Referenced by GuestABI::Argument< TestABI_1D, Arg, typename std::enable_if_t< std::is_floating_point< Arg >::value > >::get(), GuestABI::Argument< TestABI_2D, Arg, typename std::enable_if_t< std::is_floating_point< Arg >::value > >::get(), test2DVoid(), and testIntVoid().

◆ intOffset

int ThreadContext::intOffset = 0

Definition at line 48 of file guest_abi.test.cc.

Referenced by TEST(), and testTcInit().

◆ intResult

int ThreadContext::intResult = DefaultIntResult

Definition at line 45 of file guest_abi.test.cc.

Referenced by GuestABI::Result< TestABI_1D, int >::store(), GuestABI::Result< TestABI_2D, int >::store(), and TEST().

◆ ints

const int ThreadContext::ints
static
Initial value:
= {
0, 1, 2, 3, 4, 5, 6, 7
}

Definition at line 39 of file guest_abi.test.cc.

Referenced by GuestABI::Argument< TestABI_1D, int >::get(), GuestABI::Argument< TestABI_Prepare, int >::get(), GuestABI::Argument< TestABI_2D, int >::get(), GuestABI::Argument< TestABI_TcInit, int >::get(), test2DVoid(), testIntVoid(), testPrepareInt(), testPrepareVoid(), and testTcInit().

◆ useForClone

bool ThreadContext::useForClone = false
protected

Definition at line 91 of file thread_context.hh.

Referenced by getUseForClone(), and setUseForClone().

The documentation for this class was generated from the following files:
Generated on Tue Mar 23 2021 19:41:42 for gem5 by doxygen 1.8.17