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trace_cpu.hh
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37 
38 #ifndef __CPU_TRACE_TRACE_CPU_HH__
39 #define __CPU_TRACE_TRACE_CPU_HH__
40 
41 #include <cstdint>
42 #include <list>
43 #include <queue>
44 #include <set>
45 #include <unordered_map>
46 
47 #include "arch/registers.hh"
48 #include "base/statistics.hh"
49 #include "cpu/base.hh"
50 #include "debug/TraceCPUData.hh"
51 #include "debug/TraceCPUInst.hh"
52 #include "params/TraceCPU.hh"
53 #include "proto/inst_dep_record.pb.h"
54 #include "proto/packet.pb.h"
55 #include "proto/protoio.hh"
56 #include "sim/sim_events.hh"
57 
140 class TraceCPU : public BaseCPU
141 {
142 
143  public:
144  TraceCPU(const TraceCPUParams &params);
145 
146  void init();
147 
155  Counter totalInsts() const { return 0; }
156 
163  Counter totalOps() const { return traceStats.numOps.value(); }
164 
165  /*
166  * Set the no. of ops when elastic data generator completes executing a
167  * node.
168  */
169  void updateNumOps(uint64_t rob_num);
170 
171  /* Pure virtual function in BaseCPU. Do nothing. */
172  void wakeup(ThreadID tid=0) { return; }
173 
174  /*
175  * When resuming from checkpoint in FS mode, the TraceCPU takes over from
176  * the old cpu. This function overrides the takeOverFrom() function in the
177  * BaseCPU. It unbinds the ports of the old CPU and binds the ports of the
178  * TraceCPU.
179  */
180  void takeOverFrom(BaseCPU *oldCPU);
181 
186  void icacheRetryRecvd();
187 
192  void dcacheRetryRecvd();
193 
201 
207  void schedDcacheNextEvent(Tick when);
208 
209  protected:
210 
214  class IcachePort : public RequestPort
215  {
216  public:
219  RequestPort(_cpu->name() + ".icache_port", _cpu), owner(_cpu)
220  {}
221 
222  public:
231  bool recvTimingResp(PacketPtr pkt);
232 
239 
244  void recvReqRetry();
245 
246  private:
248  };
249 
253  class DcachePort : public RequestPort
254  {
255 
256  public:
259  RequestPort(_cpu->name() + ".dcache_port", _cpu), owner(_cpu)
260  {}
261 
262  public:
263 
271  bool recvTimingResp(PacketPtr pkt);
272 
279 
286 
291  void recvReqRetry();
292 
298  bool isSnooping() const { return true; }
299 
300  private:
302  };
303 
306 
309 
312 
315 
318 
326  {
327 
328  private:
329 
334  {
335 
338 
341 
344 
347 
350 
353 
359  bool isValid() const { return cmd != MemCmd::InvalidCmd; }
360 
365  };
366 
373  {
374  private:
375  // Input file stream for the protobuf trace
377 
378  public:
384  InputStream(const std::string& filename);
385 
390  void reset();
391 
400  bool read(TraceElement* element);
401  };
402 
403  public:
404  /* Constructor */
405  FixedRetryGen(TraceCPU& _owner, const std::string& _name,
406  RequestPort& _port, RequestorID requestor_id,
407  const std::string& trace_file) :
408  owner(_owner),
409  port(_port),
410  requestorId(requestor_id),
411  trace(trace_file),
412  genName(owner.name() + ".fixedretry." + _name),
413  retryPkt(nullptr),
414  delta(0),
415  traceComplete(false), fixedStats(&_owner, _name)
416  {
417  }
418 
425  Tick init();
426 
433  bool tryNext();
434 
436  const std::string& name() const { return genName; }
437 
451  bool send(Addr addr, unsigned size, const MemCmd& cmd,
452  Request::FlagsType flags, Addr pc);
453 
455  void exit();
456 
464  bool nextExecute();
465 
472  bool isTraceComplete() { return traceComplete; }
473 
474  int64_t tickDelta() { return delta; }
475 
476  private:
479 
482 
485 
488 
490  std::string genName;
491 
494 
500  int64_t delta;
501 
506 
509  protected:
511  {
514  const std::string& _name);
522  } fixedStats;
523 
524  };
525 
538  {
539  private:
541  typedef uint64_t NodeSeqNum;
542 
544  typedef uint64_t NodeRobNum;
545 
546  typedef ProtoMessage::InstDepRecord::RecordType RecordType;
547  typedef ProtoMessage::InstDepRecord Record;
548 
555  class GraphNode
556  {
557  public:
560 
563 
566 
569 
575 
578 
581 
583  uint32_t size;
584 
587 
590 
593 
595  uint64_t compDelay;
596 
602 
609 
611  bool isLoad() const { return (type == Record::LOAD); }
612 
614  bool isStore() const { return (type == Record::STORE); }
615 
617  bool isComp() const { return (type == Record::COMP); }
618 
620  bool removeRegDep(NodeSeqNum reg_dep);
621 
623  bool removeRobDep(NodeSeqNum rob_dep);
624 
626  bool removeDepOnInst(NodeSeqNum done_seq_num);
627 
629  bool
631  {
633  }
638  void writeElementAsTrace() const;
639 
641  std::string typeToStr() const;
642  };
643 
645  struct ReadyNode
646  {
649 
652  };
653 
660  {
661  public:
669  HardwareResource(uint16_t max_rob, uint16_t max_stores,
670  uint16_t max_loads);
671 
677  void occupy(const GraphNode* new_node);
678 
684  void release(const GraphNode* done_node);
685 
687  void releaseStoreBuffer();
688 
695  bool isAvailable(const GraphNode* new_node) const;
696 
704  bool awaitingResponse() const;
705 
707  void printOccupancy();
708 
709  private:
714  const uint16_t sizeROB;
715 
720  const uint16_t sizeStoreBuffer;
721 
726  const uint16_t sizeLoadBuffer;
727 
738  std::map<NodeSeqNum, NodeRobNum> inFlightNodes;
739 
742 
747 
752  };
753 
760  {
761  private:
764 
771  const double timeMultiplier;
772 
774  uint64_t microOpCount;
775 
780  uint32_t windowSize;
781 
782  public:
789  InputStream(const std::string& filename,
790  const double time_multiplier);
791 
796  void reset();
797 
807  bool read(GraphNode* element);
808 
810  uint32_t getWindowSize() const { return windowSize; }
811 
813  uint64_t getMicroOpCount() const { return microOpCount; }
814  };
815 
816  public:
817  /* Constructor */
818  ElasticDataGen(TraceCPU& _owner, const std::string& _name,
819  RequestPort& _port, RequestorID requestor_id,
820  const std::string& trace_file,
821  const TraceCPUParams &params) :
822  owner(_owner),
823  port(_port),
824  requestorId(requestor_id),
825  trace(trace_file, 1.0 / params.freqMultiplier),
826  genName(owner.name() + ".elastic." + _name),
827  retryPkt(nullptr),
828  traceComplete(false),
829  nextRead(false),
830  execComplete(false),
831  windowSize(trace.getWindowSize()),
832  hwResource(params.sizeROB, params.sizeStoreBuffer,
833  params.sizeLoadBuffer), elasticStats(&_owner, _name)
834  {
835  DPRINTF(TraceCPUData, "Window size in the trace is %d.\n",
836  windowSize);
837  }
838 
845  Tick init();
846 
854 
856  const std::string& name() const { return genName; }
857 
859  void exit();
860 
868  bool readNextWindow();
869 
878  template<typename T>
879  void addDepsOnParent(GraphNode *new_node, T& dep_list);
880 
890  void execute();
891 
902  PacketPtr executeMemReq(GraphNode* node_ptr);
903 
911  void addToSortedReadyList(NodeSeqNum seq_num, Tick exec_tick);
912 
914  void printReadyList();
915 
921  void completeMemAccess(PacketPtr pkt);
922 
929  bool isExecComplete() const { return execComplete; }
930 
941  bool checkAndIssue(const GraphNode* node_ptr, bool first=true);
942 
944  uint64_t getMicroOpCount() const { return trace.getMicroOpCount(); }
945 
946  private:
949 
952 
955 
958 
960  std::string genName;
961 
964 
967 
969  bool nextRead;
970 
973 
983  const uint32_t windowSize;
984 
990 
992  std::unordered_map<NodeSeqNum, GraphNode*> depGraph;
993 
1001  std::queue<const GraphNode*> depFreeQueue;
1002 
1005 
1006  protected:
1007  // Defining the a stat group
1009  {
1012  const std::string& _name);
1025  } elasticStats;
1026  };
1027 
1030 
1033 
1040  void schedIcacheNext();
1041 
1047  void schedDcacheNext();
1048 
1051 
1054 
1059  void checkAndSchedExitEvent();
1060 
1063 
1071 
1078  static int numTraceCPUs;
1079 
1086 
1091  const bool enableEarlyExit;
1092 
1097  const uint64_t progressMsgInterval;
1098 
1099  /*
1100  * The progress msg threshold is kept updated to the next multiple of the
1101  * progress msg interval. As soon as the threshold is reached, an info
1102  * message is printed.
1103  */
1105  struct TraceStats : public Stats::Group
1106  {
1107  TraceStats(TraceCPU *trace);
1110 
1116  } traceStats;
1117 
1118  public:
1119 
1121  Port &getInstPort() { return icachePort; }
1122 
1124  Port &getDataPort() { return dcachePort; }
1125 
1126 };
1127 #endif // __CPU_TRACE_TRACE_CPU_HH__
TraceCPU::ElasticDataGen::completeMemAccess
void completeMemAccess(PacketPtr pkt)
When a load writeback is received, that is when the load completes, release the dependents on it.
Definition: trace_cpu.cc:677
TraceCPU::progressMsgInterval
const uint64_t progressMsgInterval
Interval of committed instructions specified by the user at which a progress info message is printed.
Definition: trace_cpu.hh:1097
TraceCPU::ElasticDataGen::InputStream::getWindowSize
uint32_t getWindowSize() const
Get window size from trace.
Definition: trace_cpu.hh:810
TraceCPU::schedIcacheNext
void schedIcacheNext()
This is the control flow that uses the functionality of the icacheGen to replay the trace.
Definition: trace_cpu.cc:144
TraceCPU::ElasticDataGen::HardwareResource
The HardwareResource class models structures that hold the in-flight nodes.
Definition: trace_cpu.hh:659
TraceCPU::ElasticDataGen::execute
void execute()
This is the main execute function which consumes nodes from the sorted readyList.
Definition: trace_cpu.cc:365
TraceCPU::ElasticDataGen::GraphNode::removeRobDep
bool removeRobDep(NodeSeqNum rob_dep)
Remove completed instruction from order dependency array.
Definition: trace_cpu.cc:1302
TraceCPU::ElasticDataGen::GraphNode::removeDepOnInst
bool removeDepOnInst(NodeSeqNum done_seq_num)
Check for all dependencies on completed inst.
Definition: trace_cpu.cc:1318
TraceCPU::TraceStats::TraceStats
TraceStats(TraceCPU *trace)
Definition: trace_cpu.cc:203
TraceCPU::takeOverFrom
void takeOverFrom(BaseCPU *oldCPU)
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be sw...
Definition: trace_cpu.cc:93
TraceCPU::ElasticDataGen::HardwareResource::sizeROB
const uint16_t sizeROB
The size of the ROB used to throttle the max.
Definition: trace_cpu.hh:714
TraceCPU::TraceCPU
TraceCPU(const TraceCPUParams &params)
Definition: trace_cpu.cc:45
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup
Definition: trace_cpu.hh:510
TraceCPU::icachePort
IcachePort icachePort
Port to connect to L1 instruction cache.
Definition: trace_cpu.hh:305
TraceCPU::traceStats
TraceCPU::TraceStats traceStats
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSendSucceeded
Stats::Scalar numSendSucceeded
Definition: trace_cpu.hh:1017
TraceCPU::TraceStats::numSchedDcacheEvent
Stats::Scalar numSchedDcacheEvent
Definition: trace_cpu.hh:1108
TraceCPU::TraceStats::numSchedIcacheEvent
Stats::Scalar numSchedIcacheEvent
Definition: trace_cpu.hh:1109
TraceCPU::ElasticDataGen::GraphNode::robDep
RobDepList robDep
List of order dependencies.
Definition: trace_cpu.hh:592
TraceCPU::ElasticDataGen::GraphNode::typeToStr
std::string typeToStr() const
Return string specifying the type of the node.
Definition: trace_cpu.cc:1364
Request::FlagsType
uint64_t FlagsType
Definition: request.hh:94
TraceCPU::ElasticDataGen::InputStream::reset
void reset()
Reset the stream such that it can be played once again.
Definition: trace_cpu.cc:1208
sim_events.hh
TraceCPU::FixedRetryGen::init
Tick init()
Called from TraceCPU init().
Definition: trace_cpu.cc:977
ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:233
TraceCPU::ElasticDataGen::InputStream::trace
ProtoInputStream trace
Input file stream for the protobuf trace.
Definition: trace_cpu.hh:763
Flags< FlagsType >
TraceCPU::ElasticDataGen::HardwareResource::inFlightNodes
std::map< NodeSeqNum, NodeRobNum > inFlightNodes
A map from the sequence number to the ROB number of the in- flight nodes.
Definition: trace_cpu.hh:738
TraceCPU::ElasticDataGen::addToSortedReadyList
void addToSortedReadyList(NodeSeqNum seq_num, Tick exec_tick)
Add a ready node to the readyList.
Definition: trace_cpu.cc:744
TraceCPU::ElasticDataGen::addDepsOnParent
void addDepsOnParent(GraphNode *new_node, T &dep_list)
Iterate over the dependencies of a new node and add the new node to the list of dependents of the par...
Definition: trace_cpu.cc:340
TraceCPU::FixedRetryGen::TraceElement::flags
Request::FlagsType flags
Potential request flags to use.
Definition: trace_cpu.hh:349
TraceCPU::execCompleteEvent
CountedExitEvent * execCompleteEvent
A CountedExitEvent which when serviced decrements the counter.
Definition: trace_cpu.hh:1085
TraceCPU::ElasticDataGen::HardwareResource::HardwareResource
HardwareResource(uint16_t max_rob, uint16_t max_stores, uint16_t max_loads)
Constructor that initializes the sizes of the structures.
Definition: trace_cpu.cc:821
TraceCPU::ElasticDataGen::genName
std::string genName
String to store the name of the FixedRetryGen.
Definition: trace_cpu.hh:960
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:59
TraceCPU::oneTraceComplete
bool oneTraceComplete
Set to true when one of the generators finishes replaying its trace.
Definition: trace_cpu.hh:1062
TraceCPU::FixedRetryGen::tickDelta
int64_t tickDelta()
Definition: trace_cpu.hh:474
protoio.hh
TraceCPU::FixedRetryGen::owner
TraceCPU & owner
Reference of the TraceCPU.
Definition: trace_cpu.hh:478
TraceCPU::getInstPort
Port & getInstPort()
Used to get a reference to the icache port.
Definition: trace_cpu.hh:1121
TraceCPU::DcachePort::isSnooping
bool isSnooping() const
Required functionally.
Definition: trace_cpu.hh:298
TraceCPU::ElasticDataGen::GraphNode::physAddr
Addr physAddr
The address for the request if any.
Definition: trace_cpu.hh:577
TraceCPU::schedDcacheNext
void schedDcacheNext()
This is the control flow that uses the functionality of the dcacheGen to replay the trace.
Definition: trace_cpu.cc:170
TraceCPU::DcachePort::DcachePort
DcachePort(TraceCPU *_cpu)
Default constructor.
Definition: trace_cpu.hh:258
TraceCPU::ElasticDataGen::requestorId
const RequestorID requestorId
RequestorID used for the requests being sent.
Definition: trace_cpu.hh:954
TraceCPU::checkAndSchedExitEvent
void checkAndSchedExitEvent()
This is called when either generator finishes executing from the trace.
Definition: trace_cpu.cc:184
TraceCPU::ElasticDataGen::HardwareResource::awaitingResponse
bool awaitingResponse() const
Check if there are any outstanding requests, i.e.
Definition: trace_cpu.cc:945
TraceCPU::ElasticDataGen::InputStream::timeMultiplier
const double timeMultiplier
A multiplier for the compute delays in the trace to modulate the Trace CPU frequency either up or dow...
Definition: trace_cpu.hh:771
TraceCPU::IcachePort
IcachePort class that interfaces with L1 Instruction Cache.
Definition: trace_cpu.hh:214
std::vector
STL vector class.
Definition: stl.hh:37
TraceCPU::ElasticDataGen::trace
InputStream trace
Input stream used for reading the input trace file.
Definition: trace_cpu.hh:957
TraceCPU::ElasticDataGen::GraphNode::robNum
NodeRobNum robNum
ROB occupancy number.
Definition: trace_cpu.hh:568
TraceCPU::init
void init()
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: trace_cpu.cc:101
TraceCPU::ElasticDataGen::readyList
std::list< ReadyNode > readyList
List of nodes that are ready to execute.
Definition: trace_cpu.hh:1004
TraceCPU::ElasticDataGen::ReadyNode
Struct to store a ready-to-execute node and its execution tick.
Definition: trace_cpu.hh:645
TraceCPU::DcachePort
DcachePort class that interfaces with L1 Data Cache.
Definition: trace_cpu.hh:253
TraceCPU::FixedRetryGen::FixedRetryGen
FixedRetryGen(TraceCPU &_owner, const std::string &_name, RequestPort &_port, RequestorID requestor_id, const std::string &trace_file)
Definition: trace_cpu.hh:405
TraceCPU::FixedRetryGen::genName
std::string genName
String to store the name of the FixedRetryGen.
Definition: trace_cpu.hh:490
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSendFailed
Stats::Scalar numSendFailed
Definition: trace_cpu.hh:1018
TraceCPU::ElasticDataGen::hwResource
HardwareResource hwResource
Hardware resources required to contain in-flight nodes and to throttle issuing of new nodes when reso...
Definition: trace_cpu.hh:989
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::instLastTick
Stats::Scalar instLastTick
Last simulated tick by the FixedRetryGen.
Definition: trace_cpu.hh:521
TraceCPU::icacheGen
FixedRetryGen icacheGen
Instance of FixedRetryGen to replay instruction read requests.
Definition: trace_cpu.hh:1029
TraceCPU::FixedRetryGen::TraceElement
This struct stores a line in the trace file.
Definition: trace_cpu.hh:333
EventFunctionWrapper
Definition: eventq.hh:1112
TraceCPU::ElasticDataGen::adjustInitTraceOffset
void adjustInitTraceOffset(Tick &offset)
Adjust traceOffset based on what TraceCPU init() determines on comparing the offsets in the fetch req...
Definition: trace_cpu.cc:273
TraceCPU::FixedRetryGen::traceComplete
bool traceComplete
Set to true when end of trace is reached.
Definition: trace_cpu.hh:505
TraceCPU::ElasticDataGen::GraphNode::seqNum
NodeSeqNum seqNum
Instruction sequence number.
Definition: trace_cpu.hh:565
TraceCPU::IcachePort::recvTimingSnoopReq
void recvTimingSnoopReq(PacketPtr pkt)
Required functionally but do nothing.
Definition: trace_cpu.hh:238
TraceCPU::FixedRetryGen::InputStream::read
bool read(TraceElement *element)
Attempt to read a trace element from the stream, and also notify the caller if the end of the file wa...
Definition: trace_cpu.cc:1391
TraceCPU::ElasticDataGen::GraphNode::isStrictlyOrdered
bool isStrictlyOrdered() const
Return true if node has a request which is strictly ordered.
Definition: trace_cpu.hh:630
TraceCPU::FixedRetryGen::port
RequestPort & port
Reference of the port to be used to issue memory requests.
Definition: trace_cpu.hh:481
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::numSendAttempted
Stats::Scalar numSendAttempted
Stats for instruction accesses replayed.
Definition: trace_cpu.hh:516
TraceCPU::FixedRetryGen::exit
void exit()
Exit the FixedRetryGen.
Definition: trace_cpu.cc:1039
Stats::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:1933
TraceCPU::ElasticDataGen::HardwareResource::sizeLoadBuffer
const uint16_t sizeLoadBuffer
The size of load buffer.
Definition: trace_cpu.hh:726
TraceCPU::FixedRetryGen::isTraceComplete
bool isTraceComplete()
Returns the traceComplete variable which is set when end of the input trace file is reached.
Definition: trace_cpu.hh:472
RequestorID
uint16_t RequestorID
Definition: request.hh:89
TraceCPU::ElasticDataGen::HardwareResource::numInFlightStores
uint16_t numInFlightStores
Number of ready stores for which request may or may not be sent.
Definition: trace_cpu.hh:751
Counter
int64_t Counter
Statistics counter type.
Definition: types.hh:54
MemCmd::InvalidCmd
@ InvalidCmd
Definition: packet.hh:82
TraceCPU::ElasticDataGen::GraphNode::RegDepList
std::list< NodeSeqNum > RegDepList
Typedef for the list containing the register dependencies.
Definition: trace_cpu.hh:562
TraceCPU::ElasticDataGen::InputStream::getMicroOpCount
uint64_t getMicroOpCount() const
Get number of micro-ops modelled in the TraceCPU replay.
Definition: trace_cpu.hh:813
TraceCPU::wakeup
void wakeup(ThreadID tid=0)
Definition: trace_cpu.hh:172
TraceCPU::ElasticDataGen::NodeRobNum
uint64_t NodeRobNum
Node ROB number type.
Definition: trace_cpu.hh:544
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::FixedRetryGenStatGroup
FixedRetryGenStatGroup(Stats::Group *parent, const std::string &_name)
name is the extension to the name for these stats
Definition: trace_cpu.cc:961
TraceCPU::dcacheRetryRecvd
void dcacheRetryRecvd()
When data cache port receives a retry, schedule event dcacheNextEvent.
Definition: trace_cpu.cc:1118
TraceCPU::ElasticDataGen::port
RequestPort & port
Reference of the port to be used to issue memory requests.
Definition: trace_cpu.hh:951
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::numSendSucceeded
Stats::Scalar numSendSucceeded
Definition: trace_cpu.hh:517
TraceCPU::FixedRetryGen::nextExecute
bool nextExecute()
Reads a line of the trace file.
Definition: trace_cpu.cc:1045
Stats::ScalarBase::value
Counter value() const
Return the current value of this stat as its base type.
Definition: statistics.hh:603
TraceCPU::ElasticDataGen::owner
TraceCPU & owner
Reference of the TraceCPU.
Definition: trace_cpu.hh:948
TraceCPU::FixedRetryGen::InputStream::InputStream
InputStream(const std::string &filename)
Create a trace input stream for a given file name.
Definition: trace_cpu.cc:1369
TraceCPU::FixedRetryGen::TraceElement::cmd
MemCmd cmd
Specifies if the request is to be a read or a write.
Definition: trace_cpu.hh:337
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::numRetrySucceeded
Stats::Scalar numRetrySucceeded
Definition: trace_cpu.hh:519
TraceCPU::ElasticDataGen
The elastic data memory request generator to read protobuf trace containing execution trace annotated...
Definition: trace_cpu.hh:537
TraceCPU::DcachePort::recvReqRetry
void recvReqRetry()
Handle a retry signalled by the cache if data access failed in the first attempt.
Definition: trace_cpu.cc:1180
TraceCPU::DcachePort::owner
TraceCPU * owner
Definition: trace_cpu.hh:301
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup
Definition: trace_cpu.hh:1008
TraceCPU::DcachePort::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Receive the timing reponse and call dcacheRecvTimingResp() method of the dcacheGen to handle completi...
Definition: trace_cpu.cc:1167
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:237
TraceCPU::ElasticDataGen::elasticStats
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup elasticStats
MemCmd
Definition: packet.hh:72
TraceCPU::FixedRetryGen::currElement
TraceElement currElement
Store an element read from the trace to send as the next packet.
Definition: trace_cpu.hh:508
TraceCPU::FixedRetryGen::TraceElement::pc
Addr pc
Instruction PC.
Definition: trace_cpu.hh:352
TraceCPU::ElasticDataGen::RecordType
ProtoMessage::InstDepRecord::RecordType RecordType
Definition: trace_cpu.hh:546
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
TraceCPU::IcachePort::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Receive the timing reponse and simply delete the packet since instruction fetch requests are issued a...
Definition: trace_cpu.cc:1144
statistics.hh
TraceCPU::ElasticDataGen::GraphNode::flags
Request::Flags flags
Request flags if any.
Definition: trace_cpu.hh:586
TraceCPU::ElasticDataGen::execComplete
bool execComplete
Set true when execution of trace is complete.
Definition: trace_cpu.hh:972
TraceCPU::FixedRetryGen::TraceElement::tick
Tick tick
The time at which the request should be sent.
Definition: trace_cpu.hh:346
Port
Ports are used to interface objects to each other.
Definition: port.hh:56
TraceCPU::ElasticDataGen::GraphNode::removeRegDep
bool removeRegDep(NodeSeqNum reg_dep)
Remove completed instruction from register dependency array.
Definition: trace_cpu.cc:1284
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSOStores
Stats::Scalar numSOStores
Definition: trace_cpu.hh:1022
TraceCPU::ElasticDataGen::printReadyList
void printReadyList()
Print readyList for debugging using debug flag TraceCPUData.
Definition: trace_cpu.cc:804
TraceCPU::FixedRetryGen
Generator to read protobuf trace containing memory requests at fixed timestamps, perform flow control...
Definition: trace_cpu.hh:325
TraceCPU::ElasticDataGen::GraphNode::dependents
std::vector< GraphNode * > dependents
A vector of nodes dependent (outgoing) on this node.
Definition: trace_cpu.hh:608
Request::STRICT_ORDER
@ STRICT_ORDER
The request is required to be strictly ordered by CPU models and is non-speculative.
Definition: request.hh:128
TraceCPU::DcachePort::recvFunctionalSnoop
void recvFunctionalSnoop(PacketPtr pkt)
Required functionally but do nothing.
Definition: trace_cpu.hh:285
TraceCPU::FixedRetryGen::InputStream
The InputStream encapsulates a trace file and the internal buffers and populates TraceElements based ...
Definition: trace_cpu.hh:372
TraceCPU::ElasticDataGen::GraphNode::compDelay
uint64_t compDelay
Computational delay.
Definition: trace_cpu.hh:595
TraceCPU::ElasticDataGen::HardwareResource::isAvailable
bool isAvailable(const GraphNode *new_node) const
Check if structures required to issue a node are free.
Definition: trace_cpu.cc:901
TraceCPU::ElasticDataGen::GraphNode
The struct GraphNode stores an instruction in the trace file.
Definition: trace_cpu.hh:555
TraceCPU::ElasticDataGen::init
Tick init()
Called from TraceCPU init().
Definition: trace_cpu.cc:242
TraceCPU::progressMsgThreshold
uint64_t progressMsgThreshold
Definition: trace_cpu.hh:1104
TraceCPU::ElasticDataGen::GraphNode::pc
Addr pc
Instruction PC.
Definition: trace_cpu.hh:589
TraceCPU::ElasticDataGen::GraphNode::isStore
bool isStore() const
Is the node a store.
Definition: trace_cpu.hh:614
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSplitReqs
Stats::Scalar numSplitReqs
Definition: trace_cpu.hh:1020
TraceCPU::totalInsts
Counter totalInsts() const
This is a pure virtual function in BaseCPU.
Definition: trace_cpu.hh:155
TraceCPU::ElasticDataGen::readNextWindow
bool readNextWindow()
Reads a line of the trace file.
Definition: trace_cpu.cc:287
RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:74
TraceCPU::enableEarlyExit
const bool enableEarlyExit
Exit when any one Trace CPU completes its execution.
Definition: trace_cpu.hh:1091
Flags::isSet
bool isSet(Type mask) const
Verifies whether any bit matching the given mask is set.
Definition: flags.hh:80
TraceCPU::ElasticDataGen::depGraph
std::unordered_map< NodeSeqNum, GraphNode * > depGraph
Store the depGraph of GraphNodes.
Definition: trace_cpu.hh:992
TraceCPU::icacheNextEvent
EventFunctionWrapper icacheNextEvent
Event for the control flow method schedIcacheNext()
Definition: trace_cpu.hh:1050
TraceCPU::schedDcacheNextEvent
void schedDcacheNextEvent(Tick when)
Schedule event dcacheNextEvent at the given tick.
Definition: trace_cpu.cc:1128
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:148
TraceCPU::ElasticDataGen::GraphNode::isComp
bool isComp() const
Is the node a compute (non load/store) node.
Definition: trace_cpu.hh:617
TraceCPU::ElasticDataGen::InputStream::InputStream
InputStream(const std::string &filename, const double time_multiplier)
Create a trace input stream for a given file name.
Definition: trace_cpu.cc:1185
Port::name
const std::string name() const
Return port name (for DPRINTF).
Definition: port.hh:106
TraceCPU::ElasticDataGen::HardwareResource::releaseStoreBuffer
void releaseStoreBuffer()
Release store buffer entry for a completed store.
Definition: trace_cpu.cc:894
TraceCPU::ElasticDataGen::ElasticDataGen
ElasticDataGen(TraceCPU &_owner, const std::string &_name, RequestPort &_port, RequestorID requestor_id, const std::string &trace_file, const TraceCPUParams &params)
Definition: trace_cpu.hh:818
TraceCPU::ElasticDataGen::InputStream
The InputStream encapsulates a trace file and the internal buffers and populates GraphNodes based on ...
Definition: trace_cpu.hh:759
TraceCPU::IcachePort::IcachePort
IcachePort(TraceCPU *_cpu)
Default constructor.
Definition: trace_cpu.hh:218
TraceCPU::FixedRetryGen::TraceElement::clear
void clear()
Make this element invalid.
Definition: trace_cpu.hh:364
TraceCPU::ElasticDataGen::GraphNode::type
RecordType type
Type of the node corresponding to the instruction modeled by it.
Definition: trace_cpu.hh:574
TraceCPU::FixedRetryGen::trace
InputStream trace
Input stream used for reading the input trace file.
Definition: trace_cpu.hh:487
TraceCPU::ElasticDataGen::Record
ProtoMessage::InstDepRecord Record
Definition: trace_cpu.hh:547
TraceCPU::ElasticDataGen::HardwareResource::oldestInFlightRobNum
NodeRobNum oldestInFlightRobNum
The ROB number of the oldest in-flight node.
Definition: trace_cpu.hh:741
TraceCPU::dcachePort
DcachePort dcachePort
Port to connect to L1 data cache.
Definition: trace_cpu.hh:308
TraceCPU::ElasticDataGen::HardwareResource::numInFlightLoads
uint16_t numInFlightLoads
Number of ready loads for which request may or may not be sent.
Definition: trace_cpu.hh:746
X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:80
BaseCPU
Definition: base.hh:104
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numRetrySucceeded
Stats::Scalar numRetrySucceeded
Definition: trace_cpu.hh:1019
TraceCPU::ElasticDataGen::InputStream::microOpCount
uint64_t microOpCount
Count of committed ops read from trace plus the filtered ops.
Definition: trace_cpu.hh:774
TraceCPU::ElasticDataGen::InputStream::read
bool read(GraphNode *element)
Attempt to read a trace element from the stream, and also notify the caller if the end of the file wa...
Definition: trace_cpu.cc:1214
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSOLoads
Stats::Scalar numSOLoads
Definition: trace_cpu.hh:1021
TraceCPU::FixedRetryGen::send
bool send(Addr addr, unsigned size, const MemCmd &cmd, Request::FlagsType flags, Addr pc)
Creates a new request assigning the request parameters passed by the arguments.
Definition: trace_cpu.cc:1076
TraceCPU::ElasticDataGen::GraphNode::size
uint32_t size
Size of request if any.
Definition: trace_cpu.hh:583
TraceCPU::ElasticDataGen::ReadyNode::seqNum
NodeSeqNum seqNum
The sequence number of the ready node.
Definition: trace_cpu.hh:648
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::dataLastTick
Stats::Scalar dataLastTick
Tick when ElasticDataGen completes execution.
Definition: trace_cpu.hh:1024
TraceCPU::dcacheRecvTimingResp
void dcacheRecvTimingResp(PacketPtr pkt)
When data cache port receives a response, this calls the dcache generator method handle to complete t...
Definition: trace_cpu.cc:1160
TraceCPU::FixedRetryGen::InputStream::reset
void reset()
Reset the stream such that it can be played once again.
Definition: trace_cpu.cc:1385
base.hh
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::ElasticDataGenStatGroup
ElasticDataGenStatGroup(Stats::Group *parent, const std::string &_name)
name is the extension to the name for these stats
Definition: trace_cpu.cc:220
TraceCPU::ElasticDataGen::HardwareResource::release
void release(const GraphNode *done_node)
Release appropriate structures for a completed node.
Definition: trace_cpu.cc:851
TraceCPU::FixedRetryGen::name
const std::string & name() const
Returns name of the FixedRetryGen instance.
Definition: trace_cpu.hh:436
TraceCPU::ElasticDataGen::exit
void exit()
Exit the ElasticDataGen.
Definition: trace_cpu.cc:281
TraceCPU::ElasticDataGen::executeMemReq
PacketPtr executeMemReq(GraphNode *node_ptr)
Creates a new request for a load or store assigning the request parameters.
Definition: trace_cpu.cc:561
TraceCPU::ElasticDataGen::GraphNode::regDep
RegDepList regDep
List of register dependencies (incoming) if any.
Definition: trace_cpu.hh:601
TraceCPU::FixedRetryGen::fixedStats
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup fixedStats
TraceCPU::ElasticDataGen::HardwareResource::occupy
void occupy(const GraphNode *new_node)
Occupy appropriate structures for an issued node.
Definition: trace_cpu.cc:832
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::maxReadyListSize
Stats::Scalar maxReadyListSize
Definition: trace_cpu.hh:1015
Stats::Formula
A formula for statistics that is calculated when printed.
Definition: statistics.hh:2538
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:258
Stats::Group
Statistics container.
Definition: group.hh:87
TraceCPU::ElasticDataGen::depFreeQueue
std::queue< const GraphNode * > depFreeQueue
Queue of dependency-free nodes that are pending issue because resources are not available.
Definition: trace_cpu.hh:1001
TraceCPU::TraceStats::numOps
Stats::Scalar numOps
Stat for number of simulated micro-ops.
Definition: trace_cpu.hh:1112
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSendAttempted
Stats::Scalar numSendAttempted
Definition: trace_cpu.hh:1016
TraceCPU::ElasticDataGen::GraphNode::RobDepList
std::list< NodeSeqNum > RobDepList
Typedef for the list containing the ROB dependencies.
Definition: trace_cpu.hh:559
TraceCPU::FixedRetryGen::TraceElement::isValid
bool isValid() const
Check validity of this element.
Definition: trace_cpu.hh:359
CountedExitEvent
Definition: sim_events.hh:101
TraceCPU::dataTraceFile
std::string dataTraceFile
Definition: trace_cpu.hh:317
TraceCPU::ElasticDataGen::NodeSeqNum
uint64_t NodeSeqNum
Node sequence number type.
Definition: trace_cpu.hh:541
TraceCPU::numTraceCPUs
static int numTraceCPUs
Number of Trace CPUs in the system used as a shared variable and passed to the CountedExitEvent event...
Definition: trace_cpu.hh:1078
TraceCPU::ElasticDataGen::GraphNode::isLoad
bool isLoad() const
Is the node a load.
Definition: trace_cpu.hh:611
TraceCPU::ElasticDataGen::retryPkt
PacketPtr retryPkt
PacketPtr used to store the packet to retry.
Definition: trace_cpu.hh:963
TraceCPU::TraceStats
Definition: trace_cpu.hh:1105
TraceCPU::ElasticDataGen::GraphNode::virtAddr
Addr virtAddr
The virtual address for the request if any.
Definition: trace_cpu.hh:580
TraceCPU::DcachePort::recvTimingSnoopReq
void recvTimingSnoopReq(PacketPtr pkt)
Required functionally but do nothing.
Definition: trace_cpu.hh:278
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::maxDependents
Stats::Scalar maxDependents
Stats for data memory accesses replayed.
Definition: trace_cpu.hh:1014
TraceCPU::ElasticDataGen::HardwareResource::sizeStoreBuffer
const uint16_t sizeStoreBuffer
The size of store buffer.
Definition: trace_cpu.hh:720
TraceCPU::ElasticDataGen::name
const std::string & name() const
Returns name of the ElasticDataGen instance.
Definition: trace_cpu.hh:856
TraceCPU::ElasticDataGen::traceComplete
bool traceComplete
Set to true when end of trace is reached.
Definition: trace_cpu.hh:966
TraceCPU::ElasticDataGen::checkAndIssue
bool checkAndIssue(const GraphNode *node_ptr, bool first=true)
Attempts to issue a node once the node's source dependencies are complete.
Definition: trace_cpu.cc:637
TraceCPU::FixedRetryGen::tryNext
bool tryNext()
This tries to send current or retry packet and returns true if successfull.
Definition: trace_cpu.cc:992
TraceCPU::ElasticDataGen::windowSize
const uint32_t windowSize
Window size within which to check for dependencies.
Definition: trace_cpu.hh:983
SimObject::params
const Params & params() const
Definition: sim_object.hh:168
TraceCPU::dcacheNextEvent
EventFunctionWrapper dcacheNextEvent
Event for the control flow method schedDcacheNext()
Definition: trace_cpu.hh:1053
std::list< NodeSeqNum >
TraceCPU::IcachePort::owner
TraceCPU * owner
Definition: trace_cpu.hh:247
TraceCPU::totalOps
Counter totalOps() const
Return totalOps as the number of committed micro-ops plus the speculatively issued loads that are mod...
Definition: trace_cpu.hh:163
TraceCPU::FixedRetryGen::TraceElement::addr
Addr addr
The address for the request.
Definition: trace_cpu.hh:340
TraceCPU::FixedRetryGen::InputStream::trace
ProtoInputStream trace
Definition: trace_cpu.hh:376
TraceCPU::ElasticDataGen::nextRead
bool nextRead
Set to true when the next window of instructions need to be read.
Definition: trace_cpu.hh:969
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::numSendFailed
Stats::Scalar numSendFailed
Definition: trace_cpu.hh:518
TraceCPU::IcachePort::recvReqRetry
void recvReqRetry()
Handle a retry signalled by the cache if instruction read failed in the first attempt.
Definition: trace_cpu.cc:1154
TraceCPU::FixedRetryGen::requestorId
const RequestorID requestorId
RequestorID used for the requests being sent.
Definition: trace_cpu.hh:484
TraceCPU::getDataPort
Port & getDataPort()
Used to get a reference to the dcache port.
Definition: trace_cpu.hh:1124
TraceCPU::ElasticDataGen::HardwareResource::printOccupancy
void printOccupancy()
Print resource occupancy for debugging.
Definition: trace_cpu.cc:952
TraceCPU::icacheRetryRecvd
void icacheRetryRecvd()
When instruction cache port receives a retry, schedule event icacheNextEvent.
Definition: trace_cpu.cc:1108
TraceCPU::FixedRetryGen::retryPkt
PacketPtr retryPkt
PacketPtr used to store the packet to retry.
Definition: trace_cpu.hh:493
TraceCPU::updateNumOps
void updateNumOps(uint64_t rob_num)
Definition: trace_cpu.cc:82
TraceCPU::TraceStats::cpi
Stats::Formula cpi
Stat for the CPI.
Definition: trace_cpu.hh:1115
TraceCPU::ElasticDataGen::InputStream::windowSize
uint32_t windowSize
The window size that is read from the header of the protobuf trace and used to process the dependency...
Definition: trace_cpu.hh:780
ProtoInputStream
A ProtoInputStream wraps a coded stream, potentially with decompression, based on looking at the file...
Definition: protoio.hh:140
TraceCPU::FixedRetryGen::TraceElement::blocksize
Addr blocksize
The size of the access for the request.
Definition: trace_cpu.hh:343
TraceCPU::dcacheGen
ElasticDataGen dcacheGen
Instance of ElasticDataGen to replay data read and write requests.
Definition: trace_cpu.hh:1032
TraceCPU::traceOffset
Tick traceOffset
This stores the time offset in the trace, which is taken away from the ready times of requests.
Definition: trace_cpu.hh:1070
TraceCPU::ElasticDataGen::getMicroOpCount
uint64_t getMicroOpCount() const
Get number of micro-ops modelled in the TraceCPU replay.
Definition: trace_cpu.hh:944
TraceCPU::instRequestorID
const RequestorID instRequestorID
Requestor id for instruction read requests.
Definition: trace_cpu.hh:311
TraceCPU::ElasticDataGen::ReadyNode::execTick
Tick execTick
The tick at which the ready node must be executed.
Definition: trace_cpu.hh:651
TraceCPU::FixedRetryGen::delta
int64_t delta
Stores the difference in the send ticks of the current and last packets.
Definition: trace_cpu.hh:500
TraceCPU::instTraceFile
std::string instTraceFile
File names for input instruction and data traces.
Definition: trace_cpu.hh:317
TraceCPU
The trace cpu replays traces generated using the elastic trace probe attached to the O3 CPU model.
Definition: trace_cpu.hh:140
TraceCPU::ElasticDataGen::GraphNode::writeElementAsTrace
void writeElementAsTrace() const
Write out element in trace-compatible format using debug flag TraceCPUData.
Definition: trace_cpu.cc:1333
ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:153
TraceCPU::dataRequestorID
const RequestorID dataRequestorID
Requestor id for data read and write requests.
Definition: trace_cpu.hh:314
TraceCPU::ElasticDataGen::isExecComplete
bool isExecComplete() const
Returns the execComplete variable which is set when the last node is executed.
Definition: trace_cpu.hh:929

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