gem5
v21.0.1.0
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#include <iostream>
#include "arch/generic/types.hh"
#include "base/bitunion.hh"
#include "base/cprintf.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
Go to the source code of this file.
Classes | |
struct | X86ISA::ExtMachInst |
class | X86ISA::PCState |
struct | std::hash< X86ISA::ExtMachInst > |
Namespaces | |
X86ISA | |
This is exposed globally, independent of the ISA. | |
std | |
Overload hash function for BasicBlockRange type. | |
Typedefs | |
typedef uint64_t | X86ISA::MachInst |
Functions | |
X86ISA::BitUnion8 (LegacyPrefixVector) Bitfield< 7 | |
X86ISA::EndBitUnion (LegacyPrefixVector) BitUnion8(ModRM) Bitfield< 7 | |
X86ISA::EndBitUnion (ModRM) BitUnion8(Sib) Bitfield< 7 | |
X86ISA::EndBitUnion (Sib) BitUnion8(Rex) Bitfield< 6 > present | |
X86ISA::EndBitUnion (Rex) BitUnion8(Vex2Of3) Bitfield< 7 > r | |
X86ISA::EndBitUnion (Vex2Of3) BitUnion8(Vex3Of3) Bitfield< 7 > w | |
X86ISA::EndBitUnion (Vex3Of3) BitUnion8(Vex2Of2) Bitfield< 7 > r | |
X86ISA::EndBitUnion (Vex2Of2) BitUnion8(VexInfo) Bitfield< 6 | |
X86ISA::EndBitUnion (VexInfo) enum OpcodeType | |
static const char * | X86ISA::opcodeTypeToStr (OpcodeType type) |
X86ISA::BitUnion8 (Opcode) Bitfield< 7 | |
X86ISA::EndBitUnion (Opcode) BitUnion8(OperatingMode) Bitfield< 3 > mode | |
X86ISA::EndBitUnion (OperatingMode) enum X86Mode | |
static std::ostream & | X86ISA::operator<< (std::ostream &os, const ExtMachInst &emi) |
static bool | X86ISA::operator== (const ExtMachInst &emi1, const ExtMachInst &emi2) |
template<> | |
void | paramOut (CheckpointOut &cp, const std::string &name, const X86ISA::ExtMachInst &machInst) |
template<> | |
void | paramIn (CheckpointIn &cp, const std::string &name, X86ISA::ExtMachInst &machInst) |
Variables | |
X86ISA::decodeVal | |
Bitfield< 7 > | X86ISA::repne |
Bitfield< 6 > | X86ISA::rep |
Bitfield< 5 > | X86ISA::lock |
Bitfield< 4 > | X86ISA::op |
Bitfield< 3 > | X86ISA::addr |
Bitfield< 2, 0 > | X86ISA::seg |
X86ISA::mod | |
Bitfield< 5, 3 > | X86ISA::reg |
Bitfield< 2, 0 > | X86ISA::rm |
X86ISA::scale | |
Bitfield< 5, 3 > | X86ISA::index |
Bitfield< 1 > | X86ISA::x |
Bitfield< 4, 0 > | X86ISA::m |
Bitfield< 6, 3 > | X86ISA::v |
X86ISA::top5 | |
Bitfield< 2, 0 > | X86ISA::bottom3 |
void paramIn | ( | CheckpointIn & | cp, |
const std::string & | name, | ||
X86ISA::ExtMachInst & | machInst | ||
) |
Definition at line 69 of file types.cc.
References X86ISA::ExtMachInst::addrSize, X86ISA::ExtMachInst::displacement, X86ISA::ExtMachInst::dispSize, X86ISA::ExtMachInst::immediate, X86ISA::ExtMachInst::legacy, X86ISA::ExtMachInst::mode, X86ISA::ExtMachInst::modRM, name(), X86ISA::ExtMachInst::op, X86ISA::ExtMachInst::opcode, X86ISA::ExtMachInst::opSize, paramIn(), X86ISA::ExtMachInst::rex, X86ISA::ExtMachInst::sib, X86ISA::ExtMachInst::stackSize, X86ISA::ExtMachInst::type, and X86ISA::ExtMachInst::vex.
Referenced by ArmSemihosting::FileBase::create(), paramIn(), Pl011::unserialize(), FlashDevice::unserialize(), PacketFifoEntry::unserialize(), EthPacketData::unserialize(), Globals::unserialize(), ArmISA::PMU::unserialize(), EtherLink::Link::unserialize(), CopyEngineReg::Regs::unserialize(), Plic::unserialize(), Pl050::unserialize(), Iob::unserialize(), Clint::unserialize(), IdeController::Channel::unserialize(), EmulationPageTable::unserialize(), Loader::SymbolTable::unserialize(), MC146818::unserialize(), SparcISA::TLB::unserialize(), Intel8254Timer::Counter::unserialize(), Time::unserialize(), MemState::unserialize(), PacketFifo::unserialize(), CopyEngineReg::ChanRegs::unserialize(), Uart8250::unserialize(), ArmSemihosting::unserialize(), ArchTimer::unserialize(), MultiLevelPageTable< EntryTypes >::unserialize(), Sinic::Device::unserialize(), VirtQueue::unserialize(), ArmISA::TlbEntry::unserialize(), PciDevice::unserialize(), and iGbReg::Regs::unserialize().
void paramOut | ( | CheckpointOut & | cp, |
const std::string & | name, | ||
const X86ISA::ExtMachInst & | machInst | ||
) |
Definition at line 37 of file types.cc.
References X86ISA::ExtMachInst::addrSize, X86ISA::ExtMachInst::displacement, X86ISA::ExtMachInst::dispSize, X86ISA::ExtMachInst::immediate, X86ISA::ExtMachInst::legacy, X86ISA::ExtMachInst::mode, X86ISA::ExtMachInst::modRM, name(), X86ISA::ExtMachInst::op, X86ISA::ExtMachInst::opcode, X86ISA::ExtMachInst::opSize, paramOut(), X86ISA::ExtMachInst::rex, X86ISA::ExtMachInst::sib, X86ISA::ExtMachInst::stackSize, X86ISA::ExtMachInst::type, and X86ISA::ExtMachInst::vex.
Referenced by paramOut(), Pl011::serialize(), FlashDevice::serialize(), PacketFifoEntry::serialize(), EthPacketData::serialize(), Globals::serialize(), Random::serialize(), EtherLink::Link::serialize(), CopyEngineReg::Regs::serialize(), Plic::serialize(), Pl050::serialize(), Iob::serialize(), Ticked::serialize(), Clint::serialize(), IdeController::Channel::serialize(), EmulationPageTable::serialize(), MC146818::serialize(), Loader::SymbolTable::serialize(), Intel8254Timer::Counter::serialize(), MemState::serialize(), Time::serialize(), CopyEngineReg::ChanRegs::serialize(), PacketFifo::serialize(), Uart8250::serialize(), ArmSemihosting::serialize(), ArchTimer::serialize(), MultiLevelPageTable< EntryTypes >::serialize(), ArmSemihosting::FileBase::serialize(), Sinic::Device::serialize(), GenericTimer::serialize(), ArmISA::TlbEntry::serialize(), PciDevice::serialize(), System::serialize(), and iGbReg::Regs::serialize().