gem5
v21.0.1.0
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This is the complete list of members for ArmISA::MMU, including all inherited members.
_drainManager | Drainable | private |
_drainState | Drainable | mutableprivate |
_params | SimObject | protected |
addStat(Stats::Info *info) | Stats::Group | |
addStatGroup(const char *name, Group *block) | Stats::Group | |
ALL_TLBS enum value | ArmISA::MMU | |
BaseMMU(const Params &p) | BaseMMU | inlineprotected |
currentSection() | Serializable | static |
D_TLBS enum value | ArmISA::MMU | |
demapPage(Addr vaddr, uint64_t asn) | BaseMMU | inline |
deschedule(Event &event) | EventManager | inline |
deschedule(Event *event) | EventManager | inline |
dflush(const OP &tlbi_op) | ArmISA::MMU | inline |
dmDrain() | Drainable | private |
dmDrainResume() | Drainable | private |
drain() override | SimObject | inlinevirtual |
Drainable() | Drainable | protected |
drainResume() | Drainable | inlineprotectedvirtual |
drainState() const | Drainable | inline |
dtb | BaseMMU | |
EventManager(EventManager &em) | EventManager | inline |
EventManager(EventManager *em) | EventManager | inline |
EventManager(EventQueue *eq) | EventManager | inline |
eventq | EventManager | protected |
eventQueue() const | EventManager | inline |
finalizePhysical(const RequestPtr &req, ThreadContext *tc, BaseTLB::Mode mode) const | BaseMMU | inline |
find(const char *name) | SimObject | static |
flush(const OP &tlbi_op) | ArmISA::MMU | inline |
flushAll() | BaseMMU | inline |
getAttr() const | ArmISA::MMU | inline |
getDTBPtr() const | ArmISA::MMU | inlineprotected |
getITBPtr() const | ArmISA::MMU | inlineprotected |
getPort(const std::string &if_name, PortID idx=InvalidPortID) | SimObject | virtual |
getProbeManager() | SimObject | |
getStatGroups() const | Stats::Group | |
getStats() const | Stats::Group | |
getTlb(BaseTLB::Mode mode) const | BaseMMU | inlineprotected |
Group()=delete | Stats::Group | |
Group(const Group &)=delete | Stats::Group | |
Group(Group *parent, const char *name=nullptr) | Stats::Group | |
I_TLBS enum value | ArmISA::MMU | |
iflush(const OP &tlbi_op) | ArmISA::MMU | inline |
init() | SimObject | virtual |
initState() | SimObject | virtual |
invalidateMiscReg(TLBType type=ALL_TLBS) | ArmISA::MMU | |
itb | BaseMMU | |
loadState(CheckpointIn &cp) | SimObject | virtual |
memInvalidate() | SimObject | inlinevirtual |
memWriteback() | SimObject | inlinevirtual |
mergedParent | Stats::Group | private |
mergedStatGroups | Stats::Group | private |
mergeStatGroup(Group *block) | Stats::Group | |
MMU(const ArmMMUParams &p) | ArmISA::MMU | inline |
name() const | SimObject | inlinevirtual |
notifyFork() | Drainable | inlinevirtual |
operator=(const Group &)=delete | Stats::Group | |
Params typedef | BaseMMU | protected |
params() const | SimObject | inline |
path | Serializable | privatestatic |
preDumpStats() | Stats::Group | virtual |
probeManager | SimObject | private |
regProbeListeners() | SimObject | virtual |
regProbePoints() | SimObject | virtual |
regStats() | Stats::Group | virtual |
reschedule(Event &event, Tick when, bool always=false) | EventManager | inline |
reschedule(Event *event, Tick when, bool always=false) | EventManager | inline |
resetStats() | Stats::Group | virtual |
resolveStat(std::string name) const | Stats::Group | |
schedule(Event &event, Tick when) | EventManager | inline |
schedule(Event *event, Tick when) | EventManager | inline |
Serializable() | Serializable | |
serialize(CheckpointOut &cp) const override | SimObject | inlinevirtual |
serializeAll(CheckpointOut &cp) | SimObject | static |
Serializable::serializeAll(const std::string &cpt_dir) | Serializable | static |
serializeSection(CheckpointOut &cp, const char *name) const | Serializable | |
serializeSection(CheckpointOut &cp, const std::string &name) const | Serializable | inline |
setCurTick(Tick newVal) | EventManager | inline |
signalDrainDone() const | Drainable | inlineprotected |
SimObject(const Params &p) | SimObject | |
simObjectList | SimObject | privatestatic |
SimObjectList typedef | SimObject | private |
startup() | SimObject | virtual |
statGroups | Stats::Group | private |
stats | Stats::Group | private |
takeOverFrom(BaseMMU *old_mmu) | BaseMMU | virtual |
TLBType enum name | ArmISA::MMU | |
translateAtomic(const RequestPtr &req, ThreadContext *tc, BaseTLB::Mode mode) | BaseMMU | inline |
translateFunctional(ThreadContext *tc, Addr vaddr, Addr &paddr) | ArmISA::MMU | |
translateFunctional(const RequestPtr &req, ThreadContext *tc, BaseTLB::Mode mode, TLB::ArmTranslationType tran_type) | ArmISA::MMU | |
BaseMMU::translateFunctional(const RequestPtr &req, ThreadContext *tc, BaseTLB::Mode mode) | BaseMMU | inline |
translateTiming(const RequestPtr &req, ThreadContext *tc, BaseTLB::Translation *translation, BaseTLB::Mode mode) | BaseMMU | inline |
unserialize(CheckpointIn &cp) override | SimObject | inlinevirtual |
unserializeGlobals(CheckpointIn &cp) | Serializable | static |
unserializeSection(CheckpointIn &cp, const char *name) | Serializable | |
unserializeSection(CheckpointIn &cp, const std::string &name) | Serializable | inline |
wakeupEventQueue(Tick when=(Tick) -1) | EventManager | inline |
~Drainable() | Drainable | protectedvirtual |
~Group() | Stats::Group | virtual |
~Serializable() | Serializable | virtual |
~SimObject() | SimObject | virtual |