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gem5 [DEVELOP-FOR-25.1]
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Fetch class handles both single threaded and SMT fetch. More...
#include <fetch.hh>
Classes | |
| struct | FetchStatGroup |
| class | FetchTranslation |
| class | FinishTranslationEvent |
| class | IcachePort |
| IcachePort class for instruction fetch. More... | |
| struct | Stalls |
| Source of possible stalls. More... | |
Public Types | |
| enum | FetchStatus { Active , Inactive } |
| Overall fetch status. More... | |
| enum | ThreadStatus { Running , Idle , Squashing , Blocked , Fetching , TrapPending , QuiescePending , ItlbWait , IcacheWaitResponse , IcacheWaitRetry , IcacheAccessComplete , FTQEmpty , NoGoodAddr } |
| Individual thread status. More... | |
Public Member Functions | |
| Fetch (CPU *_cpu, const BaseO3CPUParams ¶ms) | |
| Fetch constructor. | |
| std::string | name () const |
| Returns the name of fetch. | |
| void | regProbePoints () |
| Registers probes. | |
| void | setTimeBuffer (TimeBuffer< TimeStruct > *time_buffer) |
| Sets the main backwards communication time buffer pointer. | |
| void | setActiveThreads (std::list< ThreadID > *at_ptr) |
| Sets pointer to list of active threads. | |
| void | setFetchQueue (TimeBuffer< FetchStruct > *fq_ptr) |
| Sets pointer to time buffer used to communicate to the next stage. | |
| void | setBACandFTQPtr (BAC *bac_ptr, FTQ *ftq_ptr) |
| Sets pointer to branch address calculation stage and FTQ. | |
| void | startupStage () |
| Initialize stage. | |
| void | clearStates (ThreadID tid) |
| Clear all thread-specific states. | |
| void | recvReqRetry () |
| Handles retrying the fetch access. | |
| void | processCacheCompletion (PacketPtr pkt) |
| Processes cache completion event. | |
| void | drainResume () |
| Resume after a drain. | |
| void | drainSanityCheck () const |
| Perform sanity checks after a drain. | |
| bool | isDrained () const |
| Has the stage drained? | |
| void | takeOverFrom () |
| Takes over from another CPU's thread. | |
| void | drainStall (ThreadID tid) |
| Stall the fetch stage after reaching a safe drain point. | |
| void | wakeFromQuiesce () |
| Tells fetch to wake up from a quiesce instruction. | |
| void | deactivateThread (ThreadID tid) |
| For priority-based fetch policies, need to keep update priorityList. | |
| void | squashFromCommit (const PCStateBase &new_pc, const InstSeqNum seq_num, DynInstPtr squashInst, ThreadID tid) |
| Squashes a specific thread and resets the PC. | |
| void | tick () |
| Ticks the fetch stage, processing all inputs signals and fetching as many instructions as possible. | |
| bool | checkSignalsAndUpdate (ThreadID tid) |
| Checks all input signals and updates the status as necessary. | |
| void | fetch (bool &status_change) |
| Does the actual fetching of instructions and passing them on to the next stage. | |
| Addr | fetchBufferAlignPC (Addr addr) |
| Align a PC to the start of a fetch buffer block. | |
| RequestPort & | getInstPort () |
Public Attributes | |
| InstDecoder * | decoder [MaxThreads] |
| The decoder. | |
Protected Attributes | |
| gem5::o3::Fetch::FetchStatGroup | fetchStats |
Private Member Functions | |
| void | resetStage () |
| Reset this pipeline stage. | |
| void | switchToActive () |
| Changes the status of this stage to active, and indicates this to the CPU. | |
| void | switchToInactive () |
| Changes the status of this stage to inactive, and indicates this to the CPU. | |
| bool | fetchCacheLine (Addr vaddr, ThreadID tid, Addr pc) |
| Fetches the cache line that contains the fetch PC. | |
| void | finishTranslation (const Fault &fault, const RequestPtr &mem_req) |
| bool | checkInterrupt (Addr pc) |
| Check if an interrupt is pending and that we need to handle. | |
| void | doSquash (const PCStateBase &new_pc, const DynInstPtr squashInst, ThreadID tid) |
| Squashes a specific thread and resets the PC. | |
| void | squashFromDecode (const PCStateBase &new_pc, const DynInstPtr squashInst, const InstSeqNum seq_num, ThreadID tid) |
| Squashes a specific thread and resets the PC. | |
| void | bacResteer (const PCStateBase &new_pc, ThreadID tid) |
| Signal BAC to redirect. | |
| bool | checkStall (ThreadID tid) const |
| Checks if a thread is stalled. | |
| bool | ftqReady (ThreadID tid, bool &status_change) |
| Checks if the FTQ is ready. | |
| FetchStatus | updateFetchStatus () |
| Updates overall fetch stage status; to be called at the end of each cycle. | |
| DynInstPtr | buildInst (ThreadID tid, StaticInstPtr staticInst, StaticInstPtr curMacroop, const PCStateBase &this_pc, const PCStateBase &next_pc, bool trace) |
| ThreadID | getFetchingThread () |
| Returns the appropriate thread to fetch, given the fetch policy. | |
| ThreadID | roundRobin () |
| Returns the appropriate thread to fetch using a round robin policy. | |
| ThreadID | iqCount () |
| Returns the appropriate thread to fetch using the IQ count policy. | |
| ThreadID | lsqCount () |
| Returns the appropriate thread to fetch using the LSQ count policy. | |
| ThreadID | branchCount () |
| Returns the appropriate thread to fetch using the branch count policy. | |
| void | pipelineIcacheAccesses (ThreadID tid) |
| Pipeline the next I-cache access to the current one. | |
| void | profileStall (ThreadID tid) |
| Profile the reasons of fetch stall. | |
Private Attributes | |
| FetchStatus | _status |
| Fetch status. | |
| ThreadStatus | fetchStatus [MaxThreads] |
| Per-thread status. | |
| SMTFetchPolicy | fetchPolicy |
| Fetch policy. | |
| std::list< ThreadID > | priorityList |
| List that has the threads organized by priority. | |
| ProbePointArg< DynInstPtr > * | ppFetch |
| Probe points. | |
| ProbePointArg< RequestPtr > * | ppFetchRequestSent |
| To probe when a fetch request is successfully sent. | |
| Random::RandomPtr | rng = Random::genRandom() |
| CPU * | cpu |
| Pointer to the O3CPU. | |
| TimeBuffer< TimeStruct > * | timeBuffer |
| Time buffer interface. | |
| TimeBuffer< TimeStruct >::wire | fromDecode |
| Wire to get decode's information from backwards time buffer. | |
| TimeBuffer< TimeStruct >::wire | fromRename |
| Wire to get rename's information from backwards time buffer. | |
| TimeBuffer< TimeStruct >::wire | fromIEW |
| Wire to get iew's information from backwards time buffer. | |
| TimeBuffer< TimeStruct >::wire | fromCommit |
| Wire to get commit's information from backwards time buffer. | |
| TimeBuffer< TimeStruct >::wire | toBAC |
| Wire used to write any information backward to BAC. | |
| TimeBuffer< FetchStruct >::wire | toDecode |
| Wire used to write any information heading to decode. | |
| BAC * | bac |
| BPredict. | |
| FTQ * | ftq |
| Fetch Target Queue. | |
| std::unique_ptr< PCStateBase > | pc [MaxThreads] |
| Addr | fetchOffset [MaxThreads] |
| StaticInstPtr | macroop [MaxThreads] |
| bool | delayedCommit [MaxThreads] |
| Can the fetch stage redirect from an interrupt on this instruction? | |
| RequestPtr | memReq [MaxThreads] |
| Memory request used to access cache. | |
| bool | wroteToTimeBuffer |
| Variable that tracks if fetch has written to the time buffer this cycle. | |
| int | numInst |
| Tracks how many instructions has been fetched this cycle. | |
| Stalls | stalls [MaxThreads] |
| Tracks which stages are telling fetch to stall. | |
| const bool | decoupledFrontEnd |
| Enables the decoupled front-end. | |
| const Cycles | decodeToFetchDelay |
| Decode to fetch delay. | |
| const Cycles | renameToFetchDelay |
| Rename to fetch delay. | |
| const Cycles | iewToFetchDelay |
| IEW to fetch delay. | |
| const Cycles | commitToFetchDelay |
| Commit to fetch delay. | |
| const unsigned | fetchWidth |
| The width of fetch in instructions. | |
| const unsigned | decodeWidth |
| The width of decode in instructions. | |
| bool | cacheBlocked |
| Is the cache blocked? | |
| PacketPtr | retryPkt |
| The packet that is waiting to be retried. | |
| ThreadID | retryTid |
| The thread that is waiting on the cache to tell fetch to retry. | |
| Addr | cacheBlkSize |
| Cache block size. | |
| unsigned | fetchBufferSize |
| The size of the fetch buffer in bytes. | |
| Addr | fetchBufferMask |
| Mask to align a fetch address to a fetch buffer boundary. | |
| uint8_t * | fetchBuffer [MaxThreads] |
| The fetch data that is being fetched and buffered. | |
| Addr | fetchBufferPC [MaxThreads] |
| The PC of the first instruction loaded into the fetch buffer. | |
| unsigned | fetchQueueSize |
| The size of the fetch queue in micro-ops. | |
| std::deque< DynInstPtr > | fetchQueue [MaxThreads] |
| Queue of fetched instructions. | |
| bool | fetchBufferValid [MaxThreads] |
| Whether or not the fetch buffer data is valid. | |
| int | instSize |
| Size of instructions. | |
| Counter | lastIcacheStall [MaxThreads] |
| Icache stall statistics. | |
| std::list< ThreadID > * | activeThreads |
| List of Active Threads. | |
| ThreadID | numThreads |
| Number of threads. | |
| ThreadID | numFetchingThreads |
| Number of threads that are actively fetching. | |
| ThreadID | threadFetched |
| Thread ID being fetched. | |
| bool | interruptPending |
| Checks if there is an interrupt pending. | |
| IcachePort | icachePort |
| Instruction port. | |
| bool | issuePipelinedIfetch [MaxThreads] |
| Set to true if a pipelined I-cache request should be issued. | |
| FinishTranslationEvent | finishTranslationEvent |
| Event used to delay fault generation of translation faults. | |
| const unsigned | maxFTPerCycle |
| const unsigned | maxTakenPredPerCycle |
Fetch class handles both single threaded and SMT fetch.
Its width is specified by the parameters; each cycle it tries to fetch that many instructions. It supports using a branch predictor to predict direction and targets. It supports the idling functionality of the CPU by indicating to the CPU when it is active and inactive.
| gem5::o3::Fetch::Fetch | ( | CPU * | _cpu, |
| const BaseO3CPUParams & | params ) |
Fetch constructor.
Definition at line 81 of file fetch.cc.
References bac, cacheBlkSize, commitToFetchDelay, cpu, decoder, decodeToFetchDelay, decodeWidth, decoupledFrontEnd, delayedCommit, fatal, fetchBuffer, fetchBufferMask, fetchBufferPC, fetchBufferSize, fetchBufferValid, fetchOffset, fetchPolicy, fetchQueueSize, fetchStats, fetchStatus, fetchWidth, finishTranslationEvent, ftq, gem5::ArmISA::i, icachePort, Idle, iewToFetchDelay, instSize, gem5::InvalidThreadID, issuePipelinedIfetch, lastIcacheStall, macroop, maxFTPerCycle, maxTakenPredPerCycle, gem5::o3::MaxThreads, gem5::o3::MaxWidth, memReq, numFetchingThreads, numThreads, pc, renameToFetchDelay, retryPkt, retryTid, and stalls.
Referenced by bacResteer(), buildInst(), checkSignalsAndUpdate(), checkStall(), doSquash(), fetch(), fetchCacheLine(), gem5::o3::Fetch::FetchStatGroup::FetchStatGroup(), gem5::o3::Fetch::FetchTranslation::FetchTranslation(), finishTranslation(), gem5::o3::Fetch::FinishTranslationEvent::FinishTranslationEvent(), gem5::o3::Fetch::IcachePort::IcachePort(), pipelineIcacheAccesses(), processCacheCompletion(), profileStall(), squashFromCommit(), squashFromDecode(), tick(), and wakeFromQuiesce().
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Returns the appropriate thread to fetch using the branch count policy.
Definition at line 1570 of file fetch.cc.
References gem5::InvalidThreadID, and panic.
Referenced by getFetchingThread().
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Definition at line 1009 of file fetch.cc.
References cpu, gem5::curTick(), delayedCommit, DPRINTF, Fetch(), fetchQueue, fetchQueueSize, fetchWidth, gem5::RefCountingPtr< T >::get(), gem5::PCStateBase::instAddr(), gem5::StaticInst::numDestRegs(), gem5::o3::DynInst::Arrays::numDests, numInst, gem5::StaticInst::numSrcRegs(), and gem5::o3::DynInst::Arrays::numSrcs.
Referenced by fetch(), and finishTranslation().
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Check if an interrupt is pending and that we need to handle.
Definition at line 304 of file fetch.hh.
References interruptPending, and pc.
Referenced by fetch(), and fetchCacheLine().
| bool gem5::o3::Fetch::checkSignalsAndUpdate | ( | ThreadID | tid | ) |
Checks all input signals and updates the status as necessary.
Definition at line 923 of file fetch.cc.
References Blocked, checkStall(), decoupledFrontEnd, DPRINTF, Fetch(), fetchStatus, fromCommit, fromDecode, ftq, FTQEmpty, IcacheWaitResponse, IcacheWaitRetry, ItlbWait, QuiescePending, Running, squashFromCommit(), squashFromDecode(), Squashing, stalls, and TrapPending.
Referenced by tick().
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Checks if a thread is stalled.
Definition at line 777 of file fetch.cc.
References cpu, DPRINTF, Fetch(), and stalls.
Referenced by checkSignalsAndUpdate(), and processCacheCompletion().
| void gem5::o3::Fetch::clearStates | ( | ThreadID | tid | ) |
Clear all thread-specific states.
Definition at line 300 of file fetch.cc.
References cpu, delayedCommit, fetchBufferPC, fetchBufferValid, fetchOffset, fetchQueue, fetchStatus, gem5::ArmISA::i, macroop, memReq, pc, gem5::o3::removeCommThreadInsts(), Running, gem5::ArmISA::set, and stalls.
| void gem5::o3::Fetch::deactivateThread | ( | ThreadID | tid | ) |
For priority-based fetch policies, need to keep update priorityList.
Definition at line 507 of file fetch.cc.
References priorityList.
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Squashes a specific thread and resets the PC.
Definition at line 714 of file fetch.cc.
References cacheBlocked, decoder, delayedCommit, DPRINTF, Fetch(), fetchOffset, fetchQueue, fetchStats, fetchStatus, IcacheWaitResponse, gem5::PCStateBase::instAddr(), gem5::InvalidThreadID, ItlbWait, macroop, memReq, pc, retryPkt, retryTid, gem5::ArmISA::set, and Squashing.
Referenced by squashFromCommit(), and squashFromDecode().
| void gem5::o3::Fetch::drainResume | ( | ) |
Resume after a drain.
Definition at line 403 of file fetch.cc.
References gem5::ArmISA::i, numThreads, and stalls.
| void gem5::o3::Fetch::drainSanityCheck | ( | ) | const |
Perform sanity checks after a drain.
Definition at line 412 of file fetch.cc.
References cacheBlocked, fetchStatus, gem5::ArmISA::i, Idle, interruptPending, gem5::InvalidThreadID, isDrained(), memReq, numThreads, retryPkt, retryTid, and stalls.
| void gem5::o3::Fetch::drainStall | ( | ThreadID | tid | ) |
Stall the fetch stage after reaching a safe drain point.
The CPU uses this method to stop fetching instructions from a thread that has been drained. The drain stall is different from all other stalls in that it is signaled instantly from the commit stage (without the normal communication delay) when it has reached a safe point to drain from.
| void gem5::o3::Fetch::fetch | ( | bool & | status_change | ) |
Does the actual fetching of instructions and passing them on to the next stage.
| status_change | fetch() sets this variable if there was a status change (ie switching to IcacheMissStall). |
Definition at line 1062 of file fetch.cc.
References bac, bacResteer(), gem5::PCStateBase::branching(), buildInst(), checkInterrupt(), gem5::PCStateBase::clone(), cpu, gem5::curTick(), decoder, decoupledFrontEnd, delayedCommit, DPRINTF, Fetch(), fetchBuffer, fetchBufferAlignPC(), fetchBufferPC, fetchBufferSize, fetchBufferValid, fetchCacheLine(), gem5::StaticInst::fetchMicroop(), fetchOffset, fetchQueue, fetchQueueSize, fetchStats, fetchStatus, fetchWidth, ftq, FTQEmpty, ftqReady(), getFetchingThread(), IcacheAccessComplete, IcacheWaitResponse, IcacheWaitRetry, Idle, gem5::PCStateBase::instAddr(), instSize, gem5::InvalidThreadID, gem5::StaticInst::isLastMicroop(), gem5::StaticInst::isMacroop(), gem5::isRomMicroPC(), issuePipelinedIfetch, ItlbWait, macroop, maxFTPerCycle, maxTakenPredPerCycle, gem5::PCStateBase::microPC(), numFetchingThreads, numInst, numThreads, pc, ppFetch, profileStall(), QuiescePending, Running, gem5::ArmISA::set, threadFetched, and wroteToTimeBuffer.
Referenced by gem5::o3::Fetch::FetchStatGroup::FetchStatGroup(), and tick().
Align a PC to the start of a fetch buffer block.
Definition at line 357 of file fetch.hh.
References gem5::X86ISA::addr, and fetchBufferMask.
Referenced by fetch(), fetchCacheLine(), and pipelineIcacheAccesses().
Fetches the cache line that contains the fetch PC.
Returns any fault that happened. Puts the data into the class variable fetchBuffer, which may not hold the entire fetched cache line.
| vaddr | The memory address that is being fetched from. |
| ret_fault | The fault reference that will be set to the result of the icache access. |
| tid | Thread id. |
| pc | The actual PC of the current instruction. |
Definition at line 533 of file fetch.cc.
References cacheBlocked, checkInterrupt(), cpu, delayedCommit, DPRINTF, gem5::BaseMMU::Execute, Fetch(), fetchBufferAlignPC(), fetchBufferSize, fetchStatus, gem5::Request::INST_FETCH, ItlbWait, memReq, gem5::NoFault, pc, and gem5::MipsISA::vaddr.
Referenced by fetch(), and pipelineIcacheAccesses().
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Definition at line 582 of file fetch.cc.
References _status, buildInst(), cacheBlocked, cpu, gem5::curTick(), gem5::Packet::dataDynamic(), DPRINTF, Fetch(), fetchBufferPC, fetchBufferSize, fetchBufferValid, fetchQueue, fetchQueueSize, fetchStats, fetchStatus, fetchWidth, finishTranslationEvent, icachePort, IcacheWaitResponse, IcacheWaitRetry, gem5::InvalidThreadID, ItlbWait, lastIcacheStall, memReq, gem5::NoFault, NoGoodAddr, gem5::nopStaticInstPtr, numInst, pc, ppFetchRequestSent, gem5::MemCmd::ReadReq, retryPkt, retryTid, TrapPending, updateFetchStatus(), warn, and wroteToTimeBuffer.
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Checks if the FTQ is ready.
Always true for coupled frontend.
Definition at line 517 of file fetch.cc.
References decoupledFrontEnd, fetchStatus, ftq, and FTQEmpty.
Referenced by fetch().
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Returns the appropriate thread to fetch, given the fetch policy.
Definition at line 1443 of file fetch.cc.
References activeThreads, branchCount(), fetchPolicy, fetchStatus, IcacheAccessComplete, Idle, gem5::InvalidThreadID, iqCount(), lsqCount(), numThreads, roundRobin(), and Running.
Referenced by fetch().
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Definition at line 365 of file fetch.hh.
References icachePort.
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Returns the appropriate thread to fetch using the IQ count policy.
Definition at line 1507 of file fetch.cc.
References activeThreads, fetchStatus, fromIEW, IcacheAccessComplete, Idle, gem5::InvalidThreadID, iqCount(), and Running.
Referenced by getFetchingThread(), and iqCount().
| bool gem5::o3::Fetch::isDrained | ( | ) | const |
Has the stage drained?
Definition at line 427 of file fetch.cc.
References Blocked, fetchQueue, fetchStatus, finishTranslationEvent, gem5::ArmISA::i, Idle, numThreads, and stalls.
Referenced by drainSanityCheck().
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Returns the appropriate thread to fetch using the LSQ count policy.
Definition at line 1539 of file fetch.cc.
References activeThreads, fetchStatus, fromIEW, IcacheAccessComplete, Idle, gem5::InvalidThreadID, and Running.
Referenced by getFetchingThread().
| std::string gem5::o3::Fetch::name | ( | ) | const |
Returns the name of fetch.
Definition at line 152 of file fetch.cc.
References cpu.
Referenced by gem5::o3::Fetch::IcachePort::IcachePort().
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Pipeline the next I-cache access to the current one.
Definition at line 1577 of file fetch.cc.
References decoder, DPRINTF, Fetch(), fetchBufferAlignPC(), fetchBufferPC, fetchBufferValid, fetchCacheLine(), fetchOffset, gem5::PCStateBase::instAddr(), gem5::isRomMicroPC(), issuePipelinedIfetch, gem5::PCStateBase::microPC(), and pc.
Referenced by tick().
| void gem5::o3::Fetch::processCacheCompletion | ( | PacketPtr | pkt | ) |
Processes cache completion event.
Definition at line 360 of file fetch.cc.
References Blocked, checkStall(), cpu, DPRINTF, Fetch(), fetchBuffer, fetchBufferSize, fetchBufferValid, fetchStats, fetchStatus, gem5::Packet::getConstPtr(), IcacheAccessComplete, IcacheWaitResponse, memReq, gem5::Packet::req, and switchToActive().
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Profile the reasons of fetch stall.
Definition at line 1606 of file fetch.cc.
References activeThreads, Blocked, cpu, DPRINTF, Fetch(), fetchStats, fetchStatus, FTQEmpty, IcacheWaitResponse, IcacheWaitRetry, ItlbWait, NoGoodAddr, QuiescePending, Squashing, stalls, and TrapPending.
Referenced by fetch().
| void gem5::o3::Fetch::recvReqRetry | ( | ) |
Handles retrying the fetch access.
Definition at line 1406 of file fetch.cc.
References cacheBlocked, fetchStatus, icachePort, IcacheWaitResponse, IcacheWaitRetry, gem5::InvalidThreadID, ppFetchRequestSent, retryPkt, retryTid, and TrapPending.
| void gem5::o3::Fetch::regProbePoints | ( | ) |
Registers probes.
Definition at line 155 of file fetch.cc.
References cpu, ppFetch, and ppFetchRequestSent.
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Reset this pipeline stage.
Definition at line 326 of file fetch.cc.
References _status, cacheBlocked, cpu, delayedCommit, fetchBufferPC, fetchBufferValid, fetchOffset, fetchQueue, fetchStatus, Inactive, interruptPending, macroop, memReq, numInst, numThreads, pc, priorityList, Running, gem5::ArmISA::set, stalls, and wroteToTimeBuffer.
Referenced by startupStage(), and takeOverFrom().
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Returns the appropriate thread to fetch using a round robin policy.
Definition at line 1478 of file fetch.cc.
References fetchStatus, IcacheAccessComplete, Idle, gem5::InvalidThreadID, numThreads, priorityList, and Running.
Referenced by getFetchingThread().
Sets pointer to list of active threads.
Definition at line 266 of file fetch.cc.
References activeThreads.
| void gem5::o3::Fetch::setFetchQueue | ( | TimeBuffer< FetchStruct > * | fq_ptr | ) |
Sets pointer to time buffer used to communicate to the next stage.
Definition at line 280 of file fetch.cc.
References gem5::TimeBuffer< T >::getWire(), and toDecode.
| void gem5::o3::Fetch::setTimeBuffer | ( | TimeBuffer< TimeStruct > * | time_buffer | ) |
Sets the main backwards communication time buffer pointer.
Definition at line 249 of file fetch.cc.
References commitToFetchDelay, decodeToFetchDelay, fromCommit, fromDecode, fromIEW, fromRename, iewToFetchDelay, renameToFetchDelay, timeBuffer, and toBAC.
| void gem5::o3::Fetch::squashFromCommit | ( | const PCStateBase & | new_pc, |
| const InstSeqNum | seq_num, | ||
| DynInstPtr | squashInst, | ||
| ThreadID | tid ) |
Squashes a specific thread and resets the PC.
Also tells the CPU to remove any instructions that are not in the ROB. The source of this squash should be the commit stage.
Definition at line 702 of file fetch.cc.
References cpu, doSquash(), DPRINTF, and Fetch().
Referenced by checkSignalsAndUpdate().
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Squashes a specific thread and resets the PC.
Also tells the CPU to remove any instructions between fetch and decode that should be sqaushed.
Definition at line 689 of file fetch.cc.
References cpu, doSquash(), DPRINTF, and Fetch().
Referenced by checkSignalsAndUpdate().
| void gem5::o3::Fetch::startupStage | ( | ) |
Initialize stage.
Definition at line 287 of file fetch.cc.
References bac, ftq, priorityList, resetStage(), and switchToActive().
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Changes the status of this stage to active, and indicates this to the CPU.
Definition at line 483 of file fetch.cc.
References _status, Active, cpu, DPRINTF, gem5::o3::CPU::FetchIdx, and Inactive.
Referenced by processCacheCompletion(), and startupStage().
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| void gem5::o3::Fetch::takeOverFrom | ( | ) |
Takes over from another CPU's thread.
Definition at line 457 of file fetch.cc.
References cpu, and resetStage().
| void gem5::o3::Fetch::tick | ( | ) |
Ticks the fetch stage, processing all inputs signals and fetching as many instructions as possible.
Definition at line 825 of file fetch.cc.
References _status, activeThreads, checkSignalsAndUpdate(), cpu, decodeWidth, DPRINTF, Fetch(), fetch(), fetchQueue, fetchStats, fromCommit, gem5::FullSystem, gem5::ArmISA::i, interruptPending, issuePipelinedIfetch, numFetchingThreads, numInst, numThreads, pipelineIcacheAccesses(), rng, stalls, threadFetched, toDecode, updateFetchStatus(), and wroteToTimeBuffer.
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Updates overall fetch stage status; to be called at the end of each cycle.
Definition at line 791 of file fetch.cc.
References _status, Active, activeThreads, cpu, DPRINTF, gem5::o3::CPU::FetchIdx, fetchStatus, IcacheAccessComplete, Inactive, Running, and Squashing.
Referenced by finishTranslation(), and tick().
| void gem5::o3::Fetch::wakeFromQuiesce | ( | ) |
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Fetch status.
Definition at line 192 of file fetch.hh.
Referenced by finishTranslation(), resetStage(), switchToActive(), switchToInactive(), tick(), and updateFetchStatus().
List of Active Threads.
Definition at line 519 of file fetch.hh.
Referenced by getFetchingThread(), iqCount(), lsqCount(), profileStall(), setActiveThreads(), tick(), and updateFetchStatus().
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BPredict.
Definition at line 421 of file fetch.hh.
Referenced by Fetch(), fetch(), setBACandFTQPtr(), and startupStage().
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Is the cache blocked?
If so no threads can access it.
Definition at line 478 of file fetch.hh.
Referenced by doSquash(), drainSanityCheck(), fetchCacheLine(), finishTranslation(), recvReqRetry(), and resetStage().
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Commit to fetch delay.
Definition at line 469 of file fetch.hh.
Referenced by Fetch(), and setTimeBuffer().
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Pointer to the O3CPU.
Definition at line 396 of file fetch.hh.
Referenced by buildInst(), checkStall(), clearStates(), drainStall(), Fetch(), fetch(), fetchCacheLine(), gem5::o3::Fetch::FetchStatGroup::FetchStatGroup(), finishTranslation(), name(), processCacheCompletion(), profileStall(), regProbePoints(), resetStage(), squashFromCommit(), squashFromDecode(), switchToActive(), switchToInactive(), takeOverFrom(), tick(), and updateFetchStatus().
| InstDecoder* gem5::o3::Fetch::decoder[MaxThreads] |
The decoder.
Definition at line 363 of file fetch.hh.
Referenced by doSquash(), Fetch(), fetch(), and pipelineIcacheAccesses().
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Decode to fetch delay.
Definition at line 460 of file fetch.hh.
Referenced by Fetch(), and setTimeBuffer().
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Enables the decoupled front-end.
Definition at line 457 of file fetch.hh.
Referenced by checkSignalsAndUpdate(), Fetch(), fetch(), and ftqReady().
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Can the fetch stage redirect from an interrupt on this instruction?
Definition at line 433 of file fetch.hh.
Referenced by buildInst(), clearStates(), doSquash(), Fetch(), fetch(), fetchCacheLine(), and resetStage().
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The fetch data that is being fetched and buffered.
Definition at line 498 of file fetch.hh.
Referenced by Fetch(), fetch(), and processCacheCompletion().
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Mask to align a fetch address to a fetch buffer boundary.
Definition at line 495 of file fetch.hh.
Referenced by Fetch(), and fetchBufferAlignPC().
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The PC of the first instruction loaded into the fetch buffer.
Definition at line 501 of file fetch.hh.
Referenced by clearStates(), Fetch(), fetch(), finishTranslation(), pipelineIcacheAccesses(), and resetStage().
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The size of the fetch buffer in bytes.
The fetch buffer itself may be smaller than a cache line.
Definition at line 492 of file fetch.hh.
Referenced by Fetch(), fetch(), fetchCacheLine(), finishTranslation(), and processCacheCompletion().
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Whether or not the fetch buffer data is valid.
Definition at line 510 of file fetch.hh.
Referenced by clearStates(), Fetch(), fetch(), finishTranslation(), pipelineIcacheAccesses(), processCacheCompletion(), and resetStage().
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Definition at line 428 of file fetch.hh.
Referenced by clearStates(), doSquash(), Fetch(), fetch(), pipelineIcacheAccesses(), and resetStage().
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Fetch policy.
Definition at line 198 of file fetch.hh.
Referenced by Fetch(), and getFetchingThread().
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Queue of fetched instructions.
Per-thread to prevent HoL blocking.
Definition at line 507 of file fetch.hh.
Referenced by buildInst(), clearStates(), doSquash(), fetch(), finishTranslation(), isDrained(), resetStage(), and tick().
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The size of the fetch queue in micro-ops.
Definition at line 504 of file fetch.hh.
Referenced by buildInst(), Fetch(), fetch(), and finishTranslation().
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Referenced by doSquash(), Fetch(), fetch(), finishTranslation(), processCacheCompletion(), profileStall(), and tick().
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Per-thread status.
Definition at line 195 of file fetch.hh.
Referenced by checkSignalsAndUpdate(), clearStates(), doSquash(), drainSanityCheck(), Fetch(), fetch(), fetchCacheLine(), finishTranslation(), ftqReady(), getFetchingThread(), iqCount(), isDrained(), lsqCount(), processCacheCompletion(), profileStall(), recvReqRetry(), resetStage(), roundRobin(), updateFetchStatus(), and wakeFromQuiesce().
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The width of fetch in instructions.
Definition at line 472 of file fetch.hh.
Referenced by buildInst(), Fetch(), fetch(), and finishTranslation().
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Event used to delay fault generation of translation faults.
Definition at line 542 of file fetch.hh.
Referenced by Fetch(), finishTranslation(), and isDrained().
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Wire to get commit's information from backwards time buffer.
Definition at line 411 of file fetch.hh.
Referenced by checkSignalsAndUpdate(), setTimeBuffer(), and tick().
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Wire to get decode's information from backwards time buffer.
Definition at line 402 of file fetch.hh.
Referenced by checkSignalsAndUpdate(), and setTimeBuffer().
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Wire to get iew's information from backwards time buffer.
Definition at line 408 of file fetch.hh.
Referenced by iqCount(), lsqCount(), and setTimeBuffer().
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Wire to get rename's information from backwards time buffer.
Definition at line 405 of file fetch.hh.
Referenced by setTimeBuffer().
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Definition at line 424 of file fetch.hh.
Referenced by bacResteer(), checkSignalsAndUpdate(), Fetch(), fetch(), ftqReady(), setBACandFTQPtr(), and startupStage().
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Instruction port.
Note that it has to appear after the fetch stage.
Definition at line 536 of file fetch.hh.
Referenced by Fetch(), finishTranslation(), getInstPort(), and recvReqRetry().
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IEW to fetch delay.
Definition at line 466 of file fetch.hh.
Referenced by Fetch(), and setTimeBuffer().
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Checks if there is an interrupt pending.
If there is, fetch must stop once it is not fetching PAL instructions.
Definition at line 533 of file fetch.hh.
Referenced by checkInterrupt(), drainSanityCheck(), resetStage(), and tick().
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Icache stall statistics.
Definition at line 516 of file fetch.hh.
Referenced by Fetch(), and finishTranslation().
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Definition at line 430 of file fetch.hh.
Referenced by clearStates(), doSquash(), Fetch(), fetch(), and resetStage().
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Memory request used to access cache.
Definition at line 436 of file fetch.hh.
Referenced by clearStates(), doSquash(), drainSanityCheck(), Fetch(), fetchCacheLine(), finishTranslation(), processCacheCompletion(), and resetStage().
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Tracks how many instructions has been fetched this cycle.
Definition at line 444 of file fetch.hh.
Referenced by buildInst(), fetch(), finishTranslation(), resetStage(), and tick().
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Number of threads.
Definition at line 522 of file fetch.hh.
Referenced by drainResume(), drainSanityCheck(), Fetch(), fetch(), getFetchingThread(), isDrained(), resetStage(), roundRobin(), and tick().
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Definition at line 426 of file fetch.hh.
Referenced by checkInterrupt(), clearStates(), doSquash(), Fetch(), fetch(), fetchCacheLine(), finishTranslation(), pipelineIcacheAccesses(), and resetStage().
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To probe when a fetch request is successfully sent.
Definition at line 206 of file fetch.hh.
Referenced by finishTranslation(), recvReqRetry(), and regProbePoints().
List that has the threads organized by priority.
Definition at line 201 of file fetch.hh.
Referenced by deactivateThread(), resetStage(), roundRobin(), and startupStage().
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Rename to fetch delay.
Definition at line 463 of file fetch.hh.
Referenced by Fetch(), and setTimeBuffer().
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The packet that is waiting to be retried.
Definition at line 481 of file fetch.hh.
Referenced by doSquash(), drainSanityCheck(), Fetch(), finishTranslation(), and recvReqRetry().
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The thread that is waiting on the cache to tell fetch to retry.
Definition at line 484 of file fetch.hh.
Referenced by doSquash(), drainSanityCheck(), Fetch(), finishTranslation(), and recvReqRetry().
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Tracks which stages are telling fetch to stall.
Definition at line 454 of file fetch.hh.
Referenced by checkSignalsAndUpdate(), checkStall(), clearStates(), drainResume(), drainSanityCheck(), drainStall(), Fetch(), isDrained(), profileStall(), resetStage(), and tick().
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Wire used to write any information backward to BAC.
Definition at line 414 of file fetch.hh.
Referenced by bacResteer(), and setTimeBuffer().
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Wire used to write any information heading to decode.
Definition at line 418 of file fetch.hh.
Referenced by setFetchQueue(), and tick().
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Variable that tracks if fetch has written to the time buffer this cycle.
Used to tell CPU if there is activity this cycle.
Definition at line 441 of file fetch.hh.
Referenced by fetch(), finishTranslation(), resetStage(), and tick().