gem5 [DEVELOP-FOR-25.1]
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gem5::o3::Fetch Class Reference

Fetch class handles both single threaded and SMT fetch. More...

#include <fetch.hh>

Classes

struct  FetchStatGroup
class  FetchTranslation
class  FinishTranslationEvent
class  IcachePort
 IcachePort class for instruction fetch. More...
struct  Stalls
 Source of possible stalls. More...

Public Types

enum  FetchStatus { Active , Inactive }
 Overall fetch status. More...
enum  ThreadStatus {
  Running , Idle , Squashing , Blocked ,
  Fetching , TrapPending , QuiescePending , ItlbWait ,
  IcacheWaitResponse , IcacheWaitRetry , IcacheAccessComplete , FTQEmpty ,
  NoGoodAddr
}
 Individual thread status. More...

Public Member Functions

 Fetch (CPU *_cpu, const BaseO3CPUParams &params)
 Fetch constructor.
std::string name () const
 Returns the name of fetch.
void regProbePoints ()
 Registers probes.
void setTimeBuffer (TimeBuffer< TimeStruct > *time_buffer)
 Sets the main backwards communication time buffer pointer.
void setActiveThreads (std::list< ThreadID > *at_ptr)
 Sets pointer to list of active threads.
void setFetchQueue (TimeBuffer< FetchStruct > *fq_ptr)
 Sets pointer to time buffer used to communicate to the next stage.
void setBACandFTQPtr (BAC *bac_ptr, FTQ *ftq_ptr)
 Sets pointer to branch address calculation stage and FTQ.
void startupStage ()
 Initialize stage.
void clearStates (ThreadID tid)
 Clear all thread-specific states.
void recvReqRetry ()
 Handles retrying the fetch access.
void processCacheCompletion (PacketPtr pkt)
 Processes cache completion event.
void drainResume ()
 Resume after a drain.
void drainSanityCheck () const
 Perform sanity checks after a drain.
bool isDrained () const
 Has the stage drained?
void takeOverFrom ()
 Takes over from another CPU's thread.
void drainStall (ThreadID tid)
 Stall the fetch stage after reaching a safe drain point.
void wakeFromQuiesce ()
 Tells fetch to wake up from a quiesce instruction.
void deactivateThread (ThreadID tid)
 For priority-based fetch policies, need to keep update priorityList.
void squashFromCommit (const PCStateBase &new_pc, const InstSeqNum seq_num, DynInstPtr squashInst, ThreadID tid)
 Squashes a specific thread and resets the PC.
void tick ()
 Ticks the fetch stage, processing all inputs signals and fetching as many instructions as possible.
bool checkSignalsAndUpdate (ThreadID tid)
 Checks all input signals and updates the status as necessary.
void fetch (bool &status_change)
 Does the actual fetching of instructions and passing them on to the next stage.
Addr fetchBufferAlignPC (Addr addr)
 Align a PC to the start of a fetch buffer block.
RequestPortgetInstPort ()

Public Attributes

InstDecoderdecoder [MaxThreads]
 The decoder.

Protected Attributes

gem5::o3::Fetch::FetchStatGroup fetchStats

Private Member Functions

void resetStage ()
 Reset this pipeline stage.
void switchToActive ()
 Changes the status of this stage to active, and indicates this to the CPU.
void switchToInactive ()
 Changes the status of this stage to inactive, and indicates this to the CPU.
bool fetchCacheLine (Addr vaddr, ThreadID tid, Addr pc)
 Fetches the cache line that contains the fetch PC.
void finishTranslation (const Fault &fault, const RequestPtr &mem_req)
bool checkInterrupt (Addr pc)
 Check if an interrupt is pending and that we need to handle.
void doSquash (const PCStateBase &new_pc, const DynInstPtr squashInst, ThreadID tid)
 Squashes a specific thread and resets the PC.
void squashFromDecode (const PCStateBase &new_pc, const DynInstPtr squashInst, const InstSeqNum seq_num, ThreadID tid)
 Squashes a specific thread and resets the PC.
void bacResteer (const PCStateBase &new_pc, ThreadID tid)
 Signal BAC to redirect.
bool checkStall (ThreadID tid) const
 Checks if a thread is stalled.
bool ftqReady (ThreadID tid, bool &status_change)
 Checks if the FTQ is ready.
FetchStatus updateFetchStatus ()
 Updates overall fetch stage status; to be called at the end of each cycle.
DynInstPtr buildInst (ThreadID tid, StaticInstPtr staticInst, StaticInstPtr curMacroop, const PCStateBase &this_pc, const PCStateBase &next_pc, bool trace)
ThreadID getFetchingThread ()
 Returns the appropriate thread to fetch, given the fetch policy.
ThreadID roundRobin ()
 Returns the appropriate thread to fetch using a round robin policy.
ThreadID iqCount ()
 Returns the appropriate thread to fetch using the IQ count policy.
ThreadID lsqCount ()
 Returns the appropriate thread to fetch using the LSQ count policy.
ThreadID branchCount ()
 Returns the appropriate thread to fetch using the branch count policy.
void pipelineIcacheAccesses (ThreadID tid)
 Pipeline the next I-cache access to the current one.
void profileStall (ThreadID tid)
 Profile the reasons of fetch stall.

Private Attributes

FetchStatus _status
 Fetch status.
ThreadStatus fetchStatus [MaxThreads]
 Per-thread status.
SMTFetchPolicy fetchPolicy
 Fetch policy.
std::list< ThreadIDpriorityList
 List that has the threads organized by priority.
ProbePointArg< DynInstPtr > * ppFetch
 Probe points.
ProbePointArg< RequestPtr > * ppFetchRequestSent
 To probe when a fetch request is successfully sent.
Random::RandomPtr rng = Random::genRandom()
CPUcpu
 Pointer to the O3CPU.
TimeBuffer< TimeStruct > * timeBuffer
 Time buffer interface.
TimeBuffer< TimeStruct >::wire fromDecode
 Wire to get decode's information from backwards time buffer.
TimeBuffer< TimeStruct >::wire fromRename
 Wire to get rename's information from backwards time buffer.
TimeBuffer< TimeStruct >::wire fromIEW
 Wire to get iew's information from backwards time buffer.
TimeBuffer< TimeStruct >::wire fromCommit
 Wire to get commit's information from backwards time buffer.
TimeBuffer< TimeStruct >::wire toBAC
 Wire used to write any information backward to BAC.
TimeBuffer< FetchStruct >::wire toDecode
 Wire used to write any information heading to decode.
BACbac
 BPredict.
FTQftq
 Fetch Target Queue.
std::unique_ptr< PCStateBasepc [MaxThreads]
Addr fetchOffset [MaxThreads]
StaticInstPtr macroop [MaxThreads]
bool delayedCommit [MaxThreads]
 Can the fetch stage redirect from an interrupt on this instruction?
RequestPtr memReq [MaxThreads]
 Memory request used to access cache.
bool wroteToTimeBuffer
 Variable that tracks if fetch has written to the time buffer this cycle.
int numInst
 Tracks how many instructions has been fetched this cycle.
Stalls stalls [MaxThreads]
 Tracks which stages are telling fetch to stall.
const bool decoupledFrontEnd
 Enables the decoupled front-end.
const Cycles decodeToFetchDelay
 Decode to fetch delay.
const Cycles renameToFetchDelay
 Rename to fetch delay.
const Cycles iewToFetchDelay
 IEW to fetch delay.
const Cycles commitToFetchDelay
 Commit to fetch delay.
const unsigned fetchWidth
 The width of fetch in instructions.
const unsigned decodeWidth
 The width of decode in instructions.
bool cacheBlocked
 Is the cache blocked?
PacketPtr retryPkt
 The packet that is waiting to be retried.
ThreadID retryTid
 The thread that is waiting on the cache to tell fetch to retry.
Addr cacheBlkSize
 Cache block size.
unsigned fetchBufferSize
 The size of the fetch buffer in bytes.
Addr fetchBufferMask
 Mask to align a fetch address to a fetch buffer boundary.
uint8_t * fetchBuffer [MaxThreads]
 The fetch data that is being fetched and buffered.
Addr fetchBufferPC [MaxThreads]
 The PC of the first instruction loaded into the fetch buffer.
unsigned fetchQueueSize
 The size of the fetch queue in micro-ops.
std::deque< DynInstPtrfetchQueue [MaxThreads]
 Queue of fetched instructions.
bool fetchBufferValid [MaxThreads]
 Whether or not the fetch buffer data is valid.
int instSize
 Size of instructions.
Counter lastIcacheStall [MaxThreads]
 Icache stall statistics.
std::list< ThreadID > * activeThreads
 List of Active Threads.
ThreadID numThreads
 Number of threads.
ThreadID numFetchingThreads
 Number of threads that are actively fetching.
ThreadID threadFetched
 Thread ID being fetched.
bool interruptPending
 Checks if there is an interrupt pending.
IcachePort icachePort
 Instruction port.
bool issuePipelinedIfetch [MaxThreads]
 Set to true if a pipelined I-cache request should be issued.
FinishTranslationEvent finishTranslationEvent
 Event used to delay fault generation of translation faults.
const unsigned maxFTPerCycle
const unsigned maxTakenPredPerCycle

Detailed Description

Fetch class handles both single threaded and SMT fetch.

Its width is specified by the parameters; each cycle it tries to fetch that many instructions. It supports using a branch predictor to predict direction and targets. It supports the idling functionality of the CPU by indicating to the CPU when it is active and inactive.

Definition at line 82 of file fetch.hh.

Member Enumeration Documentation

◆ FetchStatus

Overall fetch status.

Used to determine if the CPU can deschedule itsef due to a lack of activity.

Enumerator
Active 
Inactive 

Definition at line 166 of file fetch.hh.

◆ ThreadStatus

Individual thread status.

Enumerator
Running 
Idle 
Squashing 
Blocked 
Fetching 
TrapPending 
QuiescePending 
ItlbWait 
IcacheWaitResponse 
IcacheWaitRetry 
IcacheAccessComplete 
FTQEmpty 
NoGoodAddr 

Definition at line 173 of file fetch.hh.

Constructor & Destructor Documentation

◆ Fetch()

Member Function Documentation

◆ bacResteer()

void gem5::o3::Fetch::bacResteer ( const PCStateBase & new_pc,
ThreadID tid )
private

Signal BAC to redirect.

Definition at line 766 of file fetch.cc.

References DPRINTF, Fetch(), ftq, gem5::ArmISA::set, and toBAC.

Referenced by fetch().

◆ branchCount()

ThreadID gem5::o3::Fetch::branchCount ( )
private

Returns the appropriate thread to fetch using the branch count policy.

Definition at line 1570 of file fetch.cc.

References gem5::InvalidThreadID, and panic.

Referenced by getFetchingThread().

◆ buildInst()

◆ checkInterrupt()

bool gem5::o3::Fetch::checkInterrupt ( Addr pc)
inlineprivate

Check if an interrupt is pending and that we need to handle.

Definition at line 304 of file fetch.hh.

References interruptPending, and pc.

Referenced by fetch(), and fetchCacheLine().

◆ checkSignalsAndUpdate()

bool gem5::o3::Fetch::checkSignalsAndUpdate ( ThreadID tid)

Checks all input signals and updates the status as necessary.

Returns
: Returns if the status has changed due to input signals.

Definition at line 923 of file fetch.cc.

References Blocked, checkStall(), decoupledFrontEnd, DPRINTF, Fetch(), fetchStatus, fromCommit, fromDecode, ftq, FTQEmpty, IcacheWaitResponse, IcacheWaitRetry, ItlbWait, QuiescePending, Running, squashFromCommit(), squashFromDecode(), Squashing, stalls, and TrapPending.

Referenced by tick().

◆ checkStall()

bool gem5::o3::Fetch::checkStall ( ThreadID tid) const
private

Checks if a thread is stalled.

Definition at line 777 of file fetch.cc.

References cpu, DPRINTF, Fetch(), and stalls.

Referenced by checkSignalsAndUpdate(), and processCacheCompletion().

◆ clearStates()

void gem5::o3::Fetch::clearStates ( ThreadID tid)

◆ deactivateThread()

void gem5::o3::Fetch::deactivateThread ( ThreadID tid)

For priority-based fetch policies, need to keep update priorityList.

Definition at line 507 of file fetch.cc.

References priorityList.

◆ doSquash()

void gem5::o3::Fetch::doSquash ( const PCStateBase & new_pc,
const DynInstPtr squashInst,
ThreadID tid )
private

◆ drainResume()

void gem5::o3::Fetch::drainResume ( )

Resume after a drain.

Definition at line 403 of file fetch.cc.

References gem5::ArmISA::i, numThreads, and stalls.

◆ drainSanityCheck()

void gem5::o3::Fetch::drainSanityCheck ( ) const

Perform sanity checks after a drain.

Definition at line 412 of file fetch.cc.

References cacheBlocked, fetchStatus, gem5::ArmISA::i, Idle, interruptPending, gem5::InvalidThreadID, isDrained(), memReq, numThreads, retryPkt, retryTid, and stalls.

◆ drainStall()

void gem5::o3::Fetch::drainStall ( ThreadID tid)

Stall the fetch stage after reaching a safe drain point.

The CPU uses this method to stop fetching instructions from a thread that has been drained. The drain stall is different from all other stalls in that it is signaled instantly from the commit stage (without the normal communication delay) when it has reached a safe point to drain from.

Definition at line 465 of file fetch.cc.

References cpu, DPRINTF, and stalls.

◆ fetch()

◆ fetchBufferAlignPC()

Addr gem5::o3::Fetch::fetchBufferAlignPC ( Addr addr)
inline

Align a PC to the start of a fetch buffer block.

Definition at line 357 of file fetch.hh.

References gem5::X86ISA::addr, and fetchBufferMask.

Referenced by fetch(), fetchCacheLine(), and pipelineIcacheAccesses().

◆ fetchCacheLine()

bool gem5::o3::Fetch::fetchCacheLine ( Addr vaddr,
ThreadID tid,
Addr pc )
private

Fetches the cache line that contains the fetch PC.

Returns any fault that happened. Puts the data into the class variable fetchBuffer, which may not hold the entire fetched cache line.

Parameters
vaddrThe memory address that is being fetched from.
ret_faultThe fault reference that will be set to the result of the icache access.
tidThread id.
pcThe actual PC of the current instruction.
Returns
Any fault that occured.

Definition at line 533 of file fetch.cc.

References cacheBlocked, checkInterrupt(), cpu, delayedCommit, DPRINTF, gem5::BaseMMU::Execute, Fetch(), fetchBufferAlignPC(), fetchBufferSize, fetchStatus, gem5::Request::INST_FETCH, ItlbWait, memReq, gem5::NoFault, pc, and gem5::MipsISA::vaddr.

Referenced by fetch(), and pipelineIcacheAccesses().

◆ finishTranslation()

◆ ftqReady()

bool gem5::o3::Fetch::ftqReady ( ThreadID tid,
bool & status_change )
private

Checks if the FTQ is ready.

Always true for coupled frontend.

Definition at line 517 of file fetch.cc.

References decoupledFrontEnd, fetchStatus, ftq, and FTQEmpty.

Referenced by fetch().

◆ getFetchingThread()

ThreadID gem5::o3::Fetch::getFetchingThread ( )
private

Returns the appropriate thread to fetch, given the fetch policy.

Definition at line 1443 of file fetch.cc.

References activeThreads, branchCount(), fetchPolicy, fetchStatus, IcacheAccessComplete, Idle, gem5::InvalidThreadID, iqCount(), lsqCount(), numThreads, roundRobin(), and Running.

Referenced by fetch().

◆ getInstPort()

RequestPort & gem5::o3::Fetch::getInstPort ( )
inline

Definition at line 365 of file fetch.hh.

References icachePort.

◆ iqCount()

ThreadID gem5::o3::Fetch::iqCount ( )
private

Returns the appropriate thread to fetch using the IQ count policy.

Definition at line 1507 of file fetch.cc.

References activeThreads, fetchStatus, fromIEW, IcacheAccessComplete, Idle, gem5::InvalidThreadID, iqCount(), and Running.

Referenced by getFetchingThread(), and iqCount().

◆ isDrained()

bool gem5::o3::Fetch::isDrained ( ) const

Has the stage drained?

Definition at line 427 of file fetch.cc.

References Blocked, fetchQueue, fetchStatus, finishTranslationEvent, gem5::ArmISA::i, Idle, numThreads, and stalls.

Referenced by drainSanityCheck().

◆ lsqCount()

ThreadID gem5::o3::Fetch::lsqCount ( )
private

Returns the appropriate thread to fetch using the LSQ count policy.

Definition at line 1539 of file fetch.cc.

References activeThreads, fetchStatus, fromIEW, IcacheAccessComplete, Idle, gem5::InvalidThreadID, and Running.

Referenced by getFetchingThread().

◆ name()

std::string gem5::o3::Fetch::name ( ) const

Returns the name of fetch.

Definition at line 152 of file fetch.cc.

References cpu.

Referenced by gem5::o3::Fetch::IcachePort::IcachePort().

◆ pipelineIcacheAccesses()

void gem5::o3::Fetch::pipelineIcacheAccesses ( ThreadID tid)
private

◆ processCacheCompletion()

void gem5::o3::Fetch::processCacheCompletion ( PacketPtr pkt)

◆ profileStall()

void gem5::o3::Fetch::profileStall ( ThreadID tid)
private

Profile the reasons of fetch stall.

Definition at line 1606 of file fetch.cc.

References activeThreads, Blocked, cpu, DPRINTF, Fetch(), fetchStats, fetchStatus, FTQEmpty, IcacheWaitResponse, IcacheWaitRetry, ItlbWait, NoGoodAddr, QuiescePending, Squashing, stalls, and TrapPending.

Referenced by fetch().

◆ recvReqRetry()

void gem5::o3::Fetch::recvReqRetry ( )

Handles retrying the fetch access.

Definition at line 1406 of file fetch.cc.

References cacheBlocked, fetchStatus, icachePort, IcacheWaitResponse, IcacheWaitRetry, gem5::InvalidThreadID, ppFetchRequestSent, retryPkt, retryTid, and TrapPending.

◆ regProbePoints()

void gem5::o3::Fetch::regProbePoints ( )

Registers probes.

Definition at line 155 of file fetch.cc.

References cpu, ppFetch, and ppFetchRequestSent.

◆ resetStage()

void gem5::o3::Fetch::resetStage ( )
private

◆ roundRobin()

ThreadID gem5::o3::Fetch::roundRobin ( )
private

Returns the appropriate thread to fetch using a round robin policy.

Definition at line 1478 of file fetch.cc.

References fetchStatus, IcacheAccessComplete, Idle, gem5::InvalidThreadID, numThreads, priorityList, and Running.

Referenced by getFetchingThread().

◆ setActiveThreads()

void gem5::o3::Fetch::setActiveThreads ( std::list< ThreadID > * at_ptr)

Sets pointer to list of active threads.

Definition at line 266 of file fetch.cc.

References activeThreads.

◆ setBACandFTQPtr()

void gem5::o3::Fetch::setBACandFTQPtr ( BAC * bac_ptr,
FTQ * ftq_ptr )

Sets pointer to branch address calculation stage and FTQ.

Definition at line 272 of file fetch.cc.

References bac, and ftq.

◆ setFetchQueue()

void gem5::o3::Fetch::setFetchQueue ( TimeBuffer< FetchStruct > * fq_ptr)

Sets pointer to time buffer used to communicate to the next stage.

Definition at line 280 of file fetch.cc.

References gem5::TimeBuffer< T >::getWire(), and toDecode.

◆ setTimeBuffer()

void gem5::o3::Fetch::setTimeBuffer ( TimeBuffer< TimeStruct > * time_buffer)

Sets the main backwards communication time buffer pointer.

Definition at line 249 of file fetch.cc.

References commitToFetchDelay, decodeToFetchDelay, fromCommit, fromDecode, fromIEW, fromRename, iewToFetchDelay, renameToFetchDelay, timeBuffer, and toBAC.

◆ squashFromCommit()

void gem5::o3::Fetch::squashFromCommit ( const PCStateBase & new_pc,
const InstSeqNum seq_num,
DynInstPtr squashInst,
ThreadID tid )

Squashes a specific thread and resets the PC.

Also tells the CPU to remove any instructions that are not in the ROB. The source of this squash should be the commit stage.

Definition at line 702 of file fetch.cc.

References cpu, doSquash(), DPRINTF, and Fetch().

Referenced by checkSignalsAndUpdate().

◆ squashFromDecode()

void gem5::o3::Fetch::squashFromDecode ( const PCStateBase & new_pc,
const DynInstPtr squashInst,
const InstSeqNum seq_num,
ThreadID tid )
private

Squashes a specific thread and resets the PC.

Also tells the CPU to remove any instructions between fetch and decode that should be sqaushed.

Definition at line 689 of file fetch.cc.

References cpu, doSquash(), DPRINTF, and Fetch().

Referenced by checkSignalsAndUpdate().

◆ startupStage()

void gem5::o3::Fetch::startupStage ( )

Initialize stage.

Definition at line 287 of file fetch.cc.

References bac, ftq, priorityList, resetStage(), and switchToActive().

◆ switchToActive()

void gem5::o3::Fetch::switchToActive ( )
private

Changes the status of this stage to active, and indicates this to the CPU.

Definition at line 483 of file fetch.cc.

References _status, Active, cpu, DPRINTF, gem5::o3::CPU::FetchIdx, and Inactive.

Referenced by processCacheCompletion(), and startupStage().

◆ switchToInactive()

void gem5::o3::Fetch::switchToInactive ( )
private

Changes the status of this stage to inactive, and indicates this to the CPU.

Definition at line 495 of file fetch.cc.

References _status, Active, cpu, DPRINTF, gem5::o3::CPU::FetchIdx, and Inactive.

◆ takeOverFrom()

void gem5::o3::Fetch::takeOverFrom ( )

Takes over from another CPU's thread.

Definition at line 457 of file fetch.cc.

References cpu, and resetStage().

◆ tick()

void gem5::o3::Fetch::tick ( )

◆ updateFetchStatus()

Fetch::FetchStatus gem5::o3::Fetch::updateFetchStatus ( )
private

Updates overall fetch stage status; to be called at the end of each cycle.

Definition at line 791 of file fetch.cc.

References _status, Active, activeThreads, cpu, DPRINTF, gem5::o3::CPU::FetchIdx, fetchStatus, IcacheAccessComplete, Inactive, Running, and Squashing.

Referenced by finishTranslation(), and tick().

◆ wakeFromQuiesce()

void gem5::o3::Fetch::wakeFromQuiesce ( )

Tells fetch to wake up from a quiesce instruction.

Definition at line 474 of file fetch.cc.

References DPRINTF, Fetch(), fetchStatus, and Running.

Member Data Documentation

◆ _status

FetchStatus gem5::o3::Fetch::_status
private

◆ activeThreads

std::list<ThreadID>* gem5::o3::Fetch::activeThreads
private

List of Active Threads.

Definition at line 519 of file fetch.hh.

Referenced by getFetchingThread(), iqCount(), lsqCount(), profileStall(), setActiveThreads(), tick(), and updateFetchStatus().

◆ bac

BAC* gem5::o3::Fetch::bac
private

BPredict.

Definition at line 421 of file fetch.hh.

Referenced by Fetch(), fetch(), setBACandFTQPtr(), and startupStage().

◆ cacheBlkSize

Addr gem5::o3::Fetch::cacheBlkSize
private

Cache block size.

Definition at line 487 of file fetch.hh.

Referenced by Fetch().

◆ cacheBlocked

bool gem5::o3::Fetch::cacheBlocked
private

Is the cache blocked?

If so no threads can access it.

Definition at line 478 of file fetch.hh.

Referenced by doSquash(), drainSanityCheck(), fetchCacheLine(), finishTranslation(), recvReqRetry(), and resetStage().

◆ commitToFetchDelay

const Cycles gem5::o3::Fetch::commitToFetchDelay
private

Commit to fetch delay.

Definition at line 469 of file fetch.hh.

Referenced by Fetch(), and setTimeBuffer().

◆ cpu

◆ decoder

InstDecoder* gem5::o3::Fetch::decoder[MaxThreads]

The decoder.

Definition at line 363 of file fetch.hh.

Referenced by doSquash(), Fetch(), fetch(), and pipelineIcacheAccesses().

◆ decodeToFetchDelay

const Cycles gem5::o3::Fetch::decodeToFetchDelay
private

Decode to fetch delay.

Definition at line 460 of file fetch.hh.

Referenced by Fetch(), and setTimeBuffer().

◆ decodeWidth

const unsigned gem5::o3::Fetch::decodeWidth
private

The width of decode in instructions.

Definition at line 475 of file fetch.hh.

Referenced by Fetch(), and tick().

◆ decoupledFrontEnd

const bool gem5::o3::Fetch::decoupledFrontEnd
private

Enables the decoupled front-end.

Definition at line 457 of file fetch.hh.

Referenced by checkSignalsAndUpdate(), Fetch(), fetch(), and ftqReady().

◆ delayedCommit

bool gem5::o3::Fetch::delayedCommit[MaxThreads]
private

Can the fetch stage redirect from an interrupt on this instruction?

Definition at line 433 of file fetch.hh.

Referenced by buildInst(), clearStates(), doSquash(), Fetch(), fetch(), fetchCacheLine(), and resetStage().

◆ fetchBuffer

uint8_t* gem5::o3::Fetch::fetchBuffer[MaxThreads]
private

The fetch data that is being fetched and buffered.

Definition at line 498 of file fetch.hh.

Referenced by Fetch(), fetch(), and processCacheCompletion().

◆ fetchBufferMask

Addr gem5::o3::Fetch::fetchBufferMask
private

Mask to align a fetch address to a fetch buffer boundary.

Definition at line 495 of file fetch.hh.

Referenced by Fetch(), and fetchBufferAlignPC().

◆ fetchBufferPC

Addr gem5::o3::Fetch::fetchBufferPC[MaxThreads]
private

The PC of the first instruction loaded into the fetch buffer.

Definition at line 501 of file fetch.hh.

Referenced by clearStates(), Fetch(), fetch(), finishTranslation(), pipelineIcacheAccesses(), and resetStage().

◆ fetchBufferSize

unsigned gem5::o3::Fetch::fetchBufferSize
private

The size of the fetch buffer in bytes.

The fetch buffer itself may be smaller than a cache line.

Definition at line 492 of file fetch.hh.

Referenced by Fetch(), fetch(), fetchCacheLine(), finishTranslation(), and processCacheCompletion().

◆ fetchBufferValid

bool gem5::o3::Fetch::fetchBufferValid[MaxThreads]
private

Whether or not the fetch buffer data is valid.

Definition at line 510 of file fetch.hh.

Referenced by clearStates(), Fetch(), fetch(), finishTranslation(), pipelineIcacheAccesses(), processCacheCompletion(), and resetStage().

◆ fetchOffset

Addr gem5::o3::Fetch::fetchOffset[MaxThreads]
private

Definition at line 428 of file fetch.hh.

Referenced by clearStates(), doSquash(), Fetch(), fetch(), pipelineIcacheAccesses(), and resetStage().

◆ fetchPolicy

SMTFetchPolicy gem5::o3::Fetch::fetchPolicy
private

Fetch policy.

Definition at line 198 of file fetch.hh.

Referenced by Fetch(), and getFetchingThread().

◆ fetchQueue

std::deque<DynInstPtr> gem5::o3::Fetch::fetchQueue[MaxThreads]
private

Queue of fetched instructions.

Per-thread to prevent HoL blocking.

Definition at line 507 of file fetch.hh.

Referenced by buildInst(), clearStates(), doSquash(), fetch(), finishTranslation(), isDrained(), resetStage(), and tick().

◆ fetchQueueSize

unsigned gem5::o3::Fetch::fetchQueueSize
private

The size of the fetch queue in micro-ops.

Definition at line 504 of file fetch.hh.

Referenced by buildInst(), Fetch(), fetch(), and finishTranslation().

◆ fetchStats

◆ fetchStatus

◆ fetchWidth

const unsigned gem5::o3::Fetch::fetchWidth
private

The width of fetch in instructions.

Definition at line 472 of file fetch.hh.

Referenced by buildInst(), Fetch(), fetch(), and finishTranslation().

◆ finishTranslationEvent

FinishTranslationEvent gem5::o3::Fetch::finishTranslationEvent
private

Event used to delay fault generation of translation faults.

Definition at line 542 of file fetch.hh.

Referenced by Fetch(), finishTranslation(), and isDrained().

◆ fromCommit

TimeBuffer<TimeStruct>::wire gem5::o3::Fetch::fromCommit
private

Wire to get commit's information from backwards time buffer.

Definition at line 411 of file fetch.hh.

Referenced by checkSignalsAndUpdate(), setTimeBuffer(), and tick().

◆ fromDecode

TimeBuffer<TimeStruct>::wire gem5::o3::Fetch::fromDecode
private

Wire to get decode's information from backwards time buffer.

Definition at line 402 of file fetch.hh.

Referenced by checkSignalsAndUpdate(), and setTimeBuffer().

◆ fromIEW

TimeBuffer<TimeStruct>::wire gem5::o3::Fetch::fromIEW
private

Wire to get iew's information from backwards time buffer.

Definition at line 408 of file fetch.hh.

Referenced by iqCount(), lsqCount(), and setTimeBuffer().

◆ fromRename

TimeBuffer<TimeStruct>::wire gem5::o3::Fetch::fromRename
private

Wire to get rename's information from backwards time buffer.

Definition at line 405 of file fetch.hh.

Referenced by setTimeBuffer().

◆ ftq

FTQ* gem5::o3::Fetch::ftq
private

◆ icachePort

IcachePort gem5::o3::Fetch::icachePort
private

Instruction port.

Note that it has to appear after the fetch stage.

Definition at line 536 of file fetch.hh.

Referenced by Fetch(), finishTranslation(), getInstPort(), and recvReqRetry().

◆ iewToFetchDelay

const Cycles gem5::o3::Fetch::iewToFetchDelay
private

IEW to fetch delay.

Definition at line 466 of file fetch.hh.

Referenced by Fetch(), and setTimeBuffer().

◆ instSize

int gem5::o3::Fetch::instSize
private

Size of instructions.

Definition at line 513 of file fetch.hh.

Referenced by Fetch(), and fetch().

◆ interruptPending

bool gem5::o3::Fetch::interruptPending
private

Checks if there is an interrupt pending.

If there is, fetch must stop once it is not fetching PAL instructions.

Definition at line 533 of file fetch.hh.

Referenced by checkInterrupt(), drainSanityCheck(), resetStage(), and tick().

◆ issuePipelinedIfetch

bool gem5::o3::Fetch::issuePipelinedIfetch[MaxThreads]
private

Set to true if a pipelined I-cache request should be issued.

Definition at line 539 of file fetch.hh.

Referenced by Fetch(), fetch(), pipelineIcacheAccesses(), and tick().

◆ lastIcacheStall

Counter gem5::o3::Fetch::lastIcacheStall[MaxThreads]
private

Icache stall statistics.

Definition at line 516 of file fetch.hh.

Referenced by Fetch(), and finishTranslation().

◆ macroop

StaticInstPtr gem5::o3::Fetch::macroop[MaxThreads]
private

Definition at line 430 of file fetch.hh.

Referenced by clearStates(), doSquash(), Fetch(), fetch(), and resetStage().

◆ maxFTPerCycle

const unsigned gem5::o3::Fetch::maxFTPerCycle
private

Definition at line 545 of file fetch.hh.

Referenced by Fetch(), and fetch().

◆ maxTakenPredPerCycle

const unsigned gem5::o3::Fetch::maxTakenPredPerCycle
private

Definition at line 546 of file fetch.hh.

Referenced by Fetch(), and fetch().

◆ memReq

RequestPtr gem5::o3::Fetch::memReq[MaxThreads]
private

Memory request used to access cache.

Definition at line 436 of file fetch.hh.

Referenced by clearStates(), doSquash(), drainSanityCheck(), Fetch(), fetchCacheLine(), finishTranslation(), processCacheCompletion(), and resetStage().

◆ numFetchingThreads

ThreadID gem5::o3::Fetch::numFetchingThreads
private

Number of threads that are actively fetching.

Definition at line 525 of file fetch.hh.

Referenced by Fetch(), fetch(), and tick().

◆ numInst

int gem5::o3::Fetch::numInst
private

Tracks how many instructions has been fetched this cycle.

Definition at line 444 of file fetch.hh.

Referenced by buildInst(), fetch(), finishTranslation(), resetStage(), and tick().

◆ numThreads

ThreadID gem5::o3::Fetch::numThreads
private

Number of threads.

Definition at line 522 of file fetch.hh.

Referenced by drainResume(), drainSanityCheck(), Fetch(), fetch(), getFetchingThread(), isDrained(), resetStage(), roundRobin(), and tick().

◆ pc

std::unique_ptr<PCStateBase> gem5::o3::Fetch::pc[MaxThreads]
private

◆ ppFetch

ProbePointArg<DynInstPtr>* gem5::o3::Fetch::ppFetch
private

Probe points.

Definition at line 204 of file fetch.hh.

Referenced by fetch(), and regProbePoints().

◆ ppFetchRequestSent

ProbePointArg<RequestPtr>* gem5::o3::Fetch::ppFetchRequestSent
private

To probe when a fetch request is successfully sent.

Definition at line 206 of file fetch.hh.

Referenced by finishTranslation(), recvReqRetry(), and regProbePoints().

◆ priorityList

std::list<ThreadID> gem5::o3::Fetch::priorityList
private

List that has the threads organized by priority.

Definition at line 201 of file fetch.hh.

Referenced by deactivateThread(), resetStage(), roundRobin(), and startupStage().

◆ renameToFetchDelay

const Cycles gem5::o3::Fetch::renameToFetchDelay
private

Rename to fetch delay.

Definition at line 463 of file fetch.hh.

Referenced by Fetch(), and setTimeBuffer().

◆ retryPkt

PacketPtr gem5::o3::Fetch::retryPkt
private

The packet that is waiting to be retried.

Definition at line 481 of file fetch.hh.

Referenced by doSquash(), drainSanityCheck(), Fetch(), finishTranslation(), and recvReqRetry().

◆ retryTid

ThreadID gem5::o3::Fetch::retryTid
private

The thread that is waiting on the cache to tell fetch to retry.

Definition at line 484 of file fetch.hh.

Referenced by doSquash(), drainSanityCheck(), Fetch(), finishTranslation(), and recvReqRetry().

◆ rng

Random::RandomPtr gem5::o3::Fetch::rng = Random::genRandom()
private

Definition at line 208 of file fetch.hh.

Referenced by tick().

◆ stalls

Stalls gem5::o3::Fetch::stalls[MaxThreads]
private

Tracks which stages are telling fetch to stall.

Definition at line 454 of file fetch.hh.

Referenced by checkSignalsAndUpdate(), checkStall(), clearStates(), drainResume(), drainSanityCheck(), drainStall(), Fetch(), isDrained(), profileStall(), resetStage(), and tick().

◆ threadFetched

ThreadID gem5::o3::Fetch::threadFetched
private

Thread ID being fetched.

Definition at line 528 of file fetch.hh.

Referenced by fetch(), and tick().

◆ timeBuffer

TimeBuffer<TimeStruct>* gem5::o3::Fetch::timeBuffer
private

Time buffer interface.

Definition at line 399 of file fetch.hh.

Referenced by setTimeBuffer().

◆ toBAC

TimeBuffer<TimeStruct>::wire gem5::o3::Fetch::toBAC
private

Wire used to write any information backward to BAC.

Definition at line 414 of file fetch.hh.

Referenced by bacResteer(), and setTimeBuffer().

◆ toDecode

TimeBuffer<FetchStruct>::wire gem5::o3::Fetch::toDecode
private

Wire used to write any information heading to decode.

Definition at line 418 of file fetch.hh.

Referenced by setFetchQueue(), and tick().

◆ wroteToTimeBuffer

bool gem5::o3::Fetch::wroteToTimeBuffer
private

Variable that tracks if fetch has written to the time buffer this cycle.

Used to tell CPU if there is activity this cycle.

Definition at line 441 of file fetch.hh.

Referenced by fetch(), finishTranslation(), resetStage(), and tick().


The documentation for this class was generated from the following files:

Generated on Mon Oct 27 2025 04:13:20 for gem5 by doxygen 1.14.0