gem5  v21.1.0.2
DirectedGenerator.cc
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1 /*
2  * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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29 
31 
32 #include "sim/system.hh"
33 
34 namespace gem5
35 {
36 
38  : SimObject(p),
39  requestorId(p.system->getRequestorId(this))
40 {
41  m_num_cpus = p.num_cpus;
42  m_directed_tester = NULL;
43 }
44 
45 void
47 {
48  assert(m_directed_tester == NULL);
49  m_directed_tester = directed_tester;
50 }
51 
52 } // namespace gem5
system.hh
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:1003
gem5::DirectedGenerator::m_directed_tester
RubyDirectedTester * m_directed_tester
Definition: DirectedGenerator.hh:56
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::DirectedGenerator::setDirectedTester
void setDirectedTester(RubyDirectedTester *directed_tester)
Definition: DirectedGenerator.cc:46
gem5::DirectedGenerator::m_num_cpus
int m_num_cpus
Definition: DirectedGenerator.hh:54
gem5::DirectedGenerator::Params
DirectedGeneratorParams Params
Definition: DirectedGenerator.hh:43
gem5::RubyDirectedTester
Definition: RubyDirectedTester.hh:50
DirectedGenerator.hh
gem5::DirectedGenerator::DirectedGenerator
DirectedGenerator(const Params &p)
Definition: DirectedGenerator.cc:37
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40

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