gem5  v22.1.0.0
DirectedGenerator.hh
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28 
29 #ifndef __CPU_DIRECTEDTEST_DIRECTEDGENERATOR_HH__
30 #define __CPU_DIRECTEDTEST_DIRECTEDGENERATOR_HH__
31 
34 #include "params/DirectedGenerator.hh"
35 #include "sim/sim_object.hh"
36 
37 namespace gem5
38 {
39 
41 {
42  public:
43  typedef DirectedGeneratorParams Params;
44  DirectedGenerator(const Params &p);
45 
46  virtual ~DirectedGenerator() {}
47 
48  virtual bool initiate() = 0;
49  virtual void performCallback(uint32_t proc, Addr address) = 0;
50 
51  void setDirectedTester(RubyDirectedTester* directed_tester);
52 
53  protected:
57 };
58 
59 } // namespace gem5
60 
61 #endif //__CPU_DIRECTEDTEST_DIRECTEDGENERATOR_HH__
virtual bool initiate()=0
void setDirectedTester(RubyDirectedTester *directed_tester)
RubyDirectedTester * m_directed_tester
virtual void performCallback(uint32_t proc, Addr address)=0
DirectedGenerator(const Params &p)
DirectedGeneratorParams Params
Abstract superclass for simulation objects.
Definition: sim_object.hh:148
Bitfield< 54 > p
Definition: pagetable.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint16_t RequestorID
Definition: request.hh:95

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