gem5  v21.1.0.2
VIPERCoalescer.hh
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33 
34 #ifndef __MEM_RUBY_SYSTEM_VIPERCOALESCER_HH__
35 #define __MEM_RUBY_SYSTEM_VIPERCOALESCER_HH__
36 
37 #include <iostream>
38 
41 #include "mem/ruby/protocol/PrefetchBit.hh"
42 #include "mem/ruby/protocol/RubyAccessMode.hh"
43 #include "mem/ruby/protocol/RubyRequestType.hh"
46 
47 namespace gem5
48 {
49 
50 struct VIPERCoalescerParams;
51 
52 namespace ruby
53 {
54 
55 class DataBlock;
56 class CacheMsg;
57 struct MachineID;
58 class CacheMemory;
59 
61 {
62  public:
63  typedef VIPERCoalescerParams Params;
64  VIPERCoalescer(const Params &);
66  void writeCompleteCallback(Addr address, uint64_t instSeqNum);
67  void invTCPCallback(Addr address);
68  RequestStatus makeRequest(PacketPtr pkt) override;
69  void issueRequest(CoalescedRequest* crequest) override;
70 
71  private:
72  void invTCP();
73 
74  // make write-complete response packets from original write request packets
76 
77  // current cache invalidation packet
78  // nullptr if there is no active cache invalidation request
80 
81  // number of remaining cache lines to be invalidated in TCP
83 
84  // a map of instruction sequence number and corresponding pending
85  // write-complete response packets. Each write-complete response
86  // corresponds to a pending store request that is waiting for
87  // writeCompleteCallback. We may have multiple pending store requests per
88  // wavefront at a time. Each time writeCompleteCallback is called, an entry
89  // with a corresponding seqNum is popped off from map and returned to
90  // compute unit.
91  std::unordered_map<uint64_t, std::vector<PacketPtr>> m_writeCompletePktMap;
92 };
93 
94 } // namespace ruby
95 } // namespace gem5
96 
97 #endif //__MEM_RUBY_SYSTEM_VIPERCOALESCER_HH__
gem5::ruby::VIPERCoalescer::Params
VIPERCoalescerParams Params
Definition: VIPERCoalescer.hh:63
GPUCoalescer.hh
gem5::ruby::VIPERCoalescer::m_cache_inv_pkt
PacketPtr m_cache_inv_pkt
Definition: VIPERCoalescer.hh:79
gem5::ruby::VIPERCoalescer::issueRequest
void issueRequest(CoalescedRequest *crequest) override
Definition: VIPERCoalescer.cc:113
gem5::ruby::VIPERCoalescer::writeCompleteCallback
void writeCompleteCallback(Addr address, uint64_t instSeqNum)
Definition: VIPERCoalescer.cc:226
gem5::ruby::VIPERCoalescer::m_writeCompletePktMap
std::unordered_map< uint64_t, std::vector< PacketPtr > > m_writeCompletePktMap
Definition: VIPERCoalescer.hh:91
gem5::ruby::VIPERCoalescer::makeWriteCompletePkts
void makeWriteCompletePkts(CoalescedRequest *crequest)
Definition: VIPERCoalescer.cc:197
gem5::ruby::GPUCoalescer::Params
RubyGPUCoalescerParams Params
Definition: GPUCoalescer.hh:238
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::ruby::VIPERCoalescer::m_num_pending_invs
int m_num_pending_invs
Definition: VIPERCoalescer.hh:82
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::ruby::VIPERCoalescer
Definition: VIPERCoalescer.hh:60
gem5::ruby::VIPERCoalescer::makeRequest
RequestStatus makeRequest(PacketPtr pkt) override
Definition: VIPERCoalescer.cc:73
Consumer.hh
Address.hh
gem5::ruby::CoalescedRequest
Definition: GPUCoalescer.hh:108
gem5::ruby::VIPERCoalescer::~VIPERCoalescer
~VIPERCoalescer()
Definition: VIPERCoalescer.cc:66
gem5::ruby::VIPERCoalescer::invTCPCallback
void invTCPCallback(Addr address)
Definition: VIPERCoalescer.cc:265
gem5::ruby::VIPERCoalescer::VIPERCoalescer
VIPERCoalescer(const Params &)
Definition: VIPERCoalescer.cc:59
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
RubyPort.hh
gem5::ruby::VIPERCoalescer::invTCP
void invTCP()
Invalidate TCP.
Definition: VIPERCoalescer.cc:282
gem5::ruby::GPUCoalescer
Definition: GPUCoalescer.hh:215

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