gem5 v24.0.0.0
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GPUCoalescer.cc
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1/*
2 * Copyright (c) 2013-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
33
34#include "base/compiler.hh"
35#include "base/logging.hh"
36#include "base/str.hh"
38#include "debug/GPUCoalescer.hh"
39#include "debug/MemoryAccess.hh"
40#include "debug/ProtocolTrace.hh"
41#include "debug/RubyPort.hh"
42#include "debug/RubyStats.hh"
43#include "gpu-compute/shader.hh"
44#include "mem/packet.hh"
53#include "params/RubyGPUCoalescer.hh"
54
55namespace gem5
56{
57
58namespace ruby
59{
60
62 : coalescer(gc)
63{
64}
65
66void
68{
69 uint64_t seqNum = pkt->req->getReqInstSeqNum();
70
71 instMap[seqNum].push_back(pkt);
72 DPRINTF(GPUCoalescer, "Adding 0x%X seqNum %d to map. (map %d vec %d)\n",
73 pkt->getAddr(), seqNum, instMap.size(), instMap[seqNum].size());
74}
75
76void
78{
79 uint64_t seqNum = pkt->req->getReqInstSeqNum();
80
81 reqTypeMap[seqNum] = type;
82}
83
84bool
86{
87 return !instMap.empty();
88}
89
90void
92{
93 if (!instPktsRemaining.count(seqNum)) {
94 instPktsRemaining[seqNum] = count;
95 }
96}
97
98int
103
104void
109
112{
113 if (offset >= instMap.size()) {
114 return nullptr;
115 }
116
117 auto instMapIter = instMap.begin();
118 std::advance(instMapIter, offset);
119
120 return &(instMapIter->second);
121}
122
123void
125{
126 for (auto iter = instMap.begin(); iter != instMap.end(); ) {
127 InstSeqNum seq_num = iter->first;
128 DPRINTF(GPUCoalescer, "%s checking remaining pkts for %d\n",
129 coalescer->name().c_str(), seq_num);
130 assert(instPktsRemaining.count(seq_num));
131
132 if (instPktsRemaining[seq_num] == 0) {
133 assert(iter->second.empty());
134
135 // Remove from both maps
136 instMap.erase(iter++);
137 instPktsRemaining.erase(seq_num);
138
139 // Release the token if the Ruby system is not in cooldown
140 // or warmup phases. When in these phases, the RubyPorts
141 // are accessed directly using the makeRequest() command
142 // instead of accessing through the port. This makes
143 // sending tokens through the port unnecessary
146 if (reqTypeMap[seq_num] != RubyRequestType_FLUSH) {
148 "Returning token seqNum %d\n", seq_num);
150 }
151 }
152
153 reqTypeMap.erase(seq_num);
154 } else {
155 ++iter;
156 }
157 }
158}
159
160bool
161UncoalescedTable::areRequestsDone(const uint64_t instSeqNum) {
162 // iterate the instructions held in UncoalescedTable to see whether there
163 // are more requests to issue; if yes, not yet done; otherwise, done
164 for (auto& inst : instMap) {
165 DPRINTF(GPUCoalescer, "instSeqNum= %d, pending packets=%d\n"
166 ,inst.first, inst.second.size());
167 if (inst.first == instSeqNum) { return false; }
168 }
169
170 return true;
171}
172
173void
175{
176 ss << "Listing pending packets from " << instMap.size() << " instructions";
177
178 for (auto& inst : instMap) {
179 ss << "\tAddr: " << printAddress(inst.first) << " with "
180 << inst.second.size() << " pending packets" << std::endl;
181 }
182}
183
184void
186{
187 Tick current_time = curTick();
188
189 for (auto &it : instMap) {
190 for (auto &pkt : it.second) {
191 if (current_time - pkt->req->time() > threshold) {
192 std::stringstream ss;
194
195 panic("Possible Deadlock detected. Aborting!\n"
196 "version: %d request.paddr: 0x%x uncoalescedTable: %d "
197 "current time: %u issue_time: %d difference: %d\n"
198 "Request Tables:\n\n%s", coalescer->getId(),
199 pkt->getAddr(), instMap.size(), current_time,
200 pkt->req->time(), current_time - pkt->req->time(),
201 ss.str());
202 }
203 }
204 }
205}
206
208 : RubyPort(p),
209 issueEvent([this]{ completeIssue(); }, "Issue coalesced request",
211 uncoalescedTable(this),
212 deadlockCheckEvent([this]{ wakeup(); }, "GPUCoalescer deadlock check"),
213 gmTokenPort(name() + ".gmTokenPort")
214{
215 m_store_waiting_on_load_cycles = 0;
216 m_store_waiting_on_store_cycles = 0;
217 m_load_waiting_on_store_cycles = 0;
218 m_load_waiting_on_load_cycles = 0;
219
220 m_outstanding_count = 0;
221
222 coalescingWindow = p.max_coalesces_per_cycle;
223
224 m_max_outstanding_requests = 0;
225 m_instCache_ptr = nullptr;
226 m_dataCache_ptr = nullptr;
227
228 m_instCache_ptr = p.icache;
229 m_dataCache_ptr = p.dcache;
230 m_max_outstanding_requests = p.max_outstanding_requests;
231 m_deadlock_threshold = p.deadlock_threshold;
232
233 assert(m_max_outstanding_requests > 0);
234 assert(m_deadlock_threshold > 0);
235 assert(m_instCache_ptr);
236 assert(m_dataCache_ptr);
237
238 m_runningGarnetStandalone = p.garnet_standalone;
239
240
241 // These statistical variables are not for display.
242 // The profiler will collate these across different
243 // coalescers and display those collated statistics.
244 m_outstandReqHist.init(10);
245 m_latencyHist.init(10);
246 m_missLatencyHist.init(10);
247
248 for (int i = 0; i < RubyRequestType_NUM; i++) {
249 m_typeLatencyHist.push_back(new statistics::Histogram());
250 m_typeLatencyHist[i]->init(10);
251
252 m_missTypeLatencyHist.push_back(new statistics::Histogram());
253 m_missTypeLatencyHist[i]->init(10);
254 }
255
256 for (int i = 0; i < MachineType_NUM; i++) {
257 m_missMachLatencyHist.push_back(new statistics::Histogram());
258 m_missMachLatencyHist[i]->init(10);
259
260 m_IssueToInitialDelayHist.push_back(new statistics::Histogram());
261 m_IssueToInitialDelayHist[i]->init(10);
262
263 m_InitialToForwardDelayHist.push_back(new statistics::Histogram());
264 m_InitialToForwardDelayHist[i]->init(10);
265
266 m_ForwardToFirstResponseDelayHist.push_back(
267 new statistics::Histogram());
268 m_ForwardToFirstResponseDelayHist[i]->init(10);
269
270 m_FirstResponseToCompletionDelayHist.push_back(
271 new statistics::Histogram());
272 m_FirstResponseToCompletionDelayHist[i]->init(10);
273 }
274
275 for (int i = 0; i < RubyRequestType_NUM; i++) {
276 m_missTypeMachLatencyHist.push_back(
278
279 for (int j = 0; j < MachineType_NUM; j++) {
280 m_missTypeMachLatencyHist[i].push_back(
281 new statistics::Histogram());
282 m_missTypeMachLatencyHist[i][j]->init(10);
283 }
284 }
285
286}
287
291
292Port &
293GPUCoalescer::getPort(const std::string &if_name, PortID idx)
294{
295 if (if_name == "gmTokenPort") {
296 return gmTokenPort;
297 }
298
299 // delgate to RubyPort otherwise
300 return RubyPort::getPort(if_name, idx);
301}
302
303void
305{
306 Cycles current_time = curCycle();
307 for (auto& requestList : coalescedTable) {
308 for (auto& req : requestList.second) {
309 if (current_time - req->getIssueTime() > m_deadlock_threshold) {
310 std::stringstream ss;
312 warn("GPUCoalescer %d Possible deadlock detected!\n%s\n",
313 m_version, ss.str());
314 panic("Aborting due to deadlock!\n");
315 }
316 }
317 }
318
319 Tick tick_threshold = cyclesToTicks(m_deadlock_threshold);
320 uncoalescedTable.checkDeadlock(tick_threshold);
321
322 if (m_outstanding_count > 0) {
325 curTick());
326 }
327}
328
329void
331{
332 ss << "Printing out " << coalescedTable.size()
333 << " outstanding requests in the coalesced table\n";
334
335 for (auto& requestList : coalescedTable) {
336 for (auto& request : requestList.second) {
337 ss << "\tAddr: " << printAddress(requestList.first) << "\n"
338 << "\tInstruction sequence number: "
339 << request->getSeqNum() << "\n"
340 << "\t\tType: "
341 << RubyRequestType_to_string(request->getRubyType()) << "\n"
342 << "\t\tNumber of associated packets: "
343 << request->getPackets().size() << "\n"
344 << "\t\tIssue time: "
345 << request->getIssueTime() * clockPeriod() << "\n"
346 << "\t\tDifference from current tick: "
347 << (curCycle() - request->getIssueTime()) * clockPeriod()
348 << "\n";
349 }
350 }
351
352 // print out packets waiting to be issued in uncoalesced table
354}
355
356void
358{
361 for (int i = 0; i < RubyRequestType_NUM; i++) {
362 m_typeLatencyHist[i]->reset();
363 m_missTypeLatencyHist[i]->reset();
364 for (int j = 0; j < MachineType_NUM; j++) {
365 m_missTypeMachLatencyHist[i][j]->reset();
366 }
367 }
368
369 for (int i = 0; i < MachineType_NUM; i++) {
370 m_missMachLatencyHist[i]->reset();
371
376 }
377}
378
379void
380GPUCoalescer::printProgress(std::ostream& out) const
381{
382}
383
384// sets the kernelEndList
385void
387{
388 // Don't know if this will happen or is possible
389 // but I just want to be careful and not have it become
390 // simulator hang in the future
391 DPRINTF(GPUCoalescer, "inserting wf: %d to kernelEndlist\n", wavefront_id);
392 assert(kernelEndList.count(wavefront_id) == 0);
393
394 kernelEndList[wavefront_id] = pkt;
395 DPRINTF(GPUCoalescer, "kernelEndList->size() = %d\n",
396 kernelEndList.size());
397}
398
399void
401{
402 writeCallback(address, MachineType_NULL, data);
403}
404
405void
407 MachineType mach,
409{
410 writeCallback(address, mach, data, Cycles(0), Cycles(0), Cycles(0));
411}
412
413void
415 MachineType mach,
417 Cycles initialRequestTime,
418 Cycles forwardRequestTime,
419 Cycles firstResponseTime)
420{
421 writeCallback(address, mach, data,
422 initialRequestTime, forwardRequestTime, firstResponseTime,
423 false);
424}
425
426void
428 MachineType mach,
430 Cycles initialRequestTime,
431 Cycles forwardRequestTime,
432 Cycles firstResponseTime,
433 bool isRegion)
434{
435 assert(address == makeLineAddress(address));
436 assert(coalescedTable.count(address));
437
438 auto crequest = coalescedTable.at(address).front();
439
440 hitCallback(crequest, mach, data, true, crequest->getIssueTime(),
441 forwardRequestTime, firstResponseTime, isRegion);
442
443 // remove this crequest in coalescedTable
444 delete crequest;
445 coalescedTable.at(address).pop_front();
446
447 if (coalescedTable.at(address).empty()) {
448 coalescedTable.erase(address);
449 } else {
450 auto nextRequest = coalescedTable.at(address).front();
451 issueRequest(nextRequest);
452 }
453}
454
455void
457 uint64_t instSeqNum,
458 MachineType mach)
459{
460 DPRINTF(GPUCoalescer, "writeCompleteCallback for address 0x%x"
461 " instSeqNum = %d\n", address, instSeqNum);
462
463 assert(pendingWriteInsts.count(instSeqNum) == 1);
464 PendingWriteInst& inst = pendingWriteInsts[instSeqNum];
465
466 // check the uncoalescedTable to see whether all requests for the inst
467 // have been issued or not
468 bool reqsAllIssued = uncoalescedTable.areRequestsDone(instSeqNum);
469 DPRINTF(GPUCoalescer, "instSeqNum = %d, pendingStores=%d, "
470 "reqsAllIssued=%d\n", reqsAllIssued,
471 inst.getNumPendingStores()-1, reqsAllIssued);
472
473 if (inst.receiveWriteCompleteAck() && reqsAllIssued ) {
474 // if the pending write instruction has received all write completion
475 // callbacks for its issued Ruby requests, we can now start respond
476 // the requesting CU in one response packet.
478
479 DPRINTF(GPUCoalescer, "write inst %d completed at coalescer\n",
480 instSeqNum);
481 pendingWriteInsts.erase(instSeqNum);
482 }
483}
484
485void
487{
488 readCallback(address, MachineType_NULL, data);
489}
490
491void
493 MachineType mach,
495{
496 readCallback(address, mach, data, Cycles(0), Cycles(0), Cycles(0));
497}
498
499void
501 MachineType mach,
503 Cycles initialRequestTime,
504 Cycles forwardRequestTime,
505 Cycles firstResponseTime)
506{
507
508 readCallback(address, mach, data,
509 initialRequestTime, forwardRequestTime, firstResponseTime,
510 false);
511}
512
513void
515 MachineType mach,
517 Cycles initialRequestTime,
518 Cycles forwardRequestTime,
519 Cycles firstResponseTime,
520 bool isRegion)
521{
522 assert(address == makeLineAddress(address));
523 assert(coalescedTable.count(address));
524
525 auto crequest = coalescedTable.at(address).front();
526 fatal_if(crequest->getRubyType() != RubyRequestType_LD,
527 "readCallback received non-read type response\n");
528
529 hitCallback(crequest, mach, data, true, crequest->getIssueTime(),
530 forwardRequestTime, firstResponseTime, isRegion);
531
532 delete crequest;
533 coalescedTable.at(address).pop_front();
534 if (coalescedTable.at(address).empty()) {
535 coalescedTable.erase(address);
536 } else {
537 auto nextRequest = coalescedTable.at(address).front();
538 issueRequest(nextRequest);
539 }
540}
541
542void
544 MachineType mach,
546 bool success,
547 Cycles initialRequestTime,
548 Cycles forwardRequestTime,
549 Cycles firstResponseTime,
550 bool isRegion)
551{
552 PacketPtr pkt = crequest->getFirstPkt();
553 Addr request_address = pkt->getAddr();
554 [[maybe_unused]] Addr request_line_address =
555 makeLineAddress(request_address);
556
557 RubyRequestType type = crequest->getRubyType();
558
559 DPRINTF(GPUCoalescer, "Got hitCallback for 0x%X\n", request_line_address);
560
561 recordMissLatency(crequest, mach,
562 initialRequestTime,
563 forwardRequestTime,
564 firstResponseTime,
565 success, isRegion);
566 // update the data
567 //
568 // MUST ADD DOING THIS FOR EACH REQUEST IN COALESCER
569 std::vector<PacketPtr> pktList = crequest->getPackets();
570
571 uint8_t* log = nullptr;
572 DPRINTF(GPUCoalescer, "Responding to %d packets for addr 0x%X\n",
573 pktList.size(), request_line_address);
574 uint32_t offset;
575 int pkt_size;
576 for (auto& pkt : pktList) {
577 offset = getOffset(pkt->getAddr());
578 pkt_size = pkt->getSize();
579 request_address = pkt->getAddr();
580
581 // When the Ruby system is cooldown phase, the requests come from
582 // the cache recorder. These requests do not get coalesced and
583 // do not return valid data.
585 continue;
586
587 if (pkt->getPtr<uint8_t>()) {
588 switch(type) {
589 // Store and AtomicNoReturns follow the same path, as the
590 // data response is not needed.
591 case RubyRequestType_ATOMIC_NO_RETURN:
592 assert(pkt->isAtomicOp());
593 break;
594 case RubyRequestType_ST:
595 break;
596 case RubyRequestType_LD:
597 pkt->setData(data.getData(offset, pkt_size));
598 break;
599 case RubyRequestType_ATOMIC_RETURN:
600 assert(pkt->isAtomicOp());
601 // Atomic operations are performed by the WriteMask
602 // in packet order, set by the crequest. Thus, when
603 // unpacking the changes from the log, we read from
604 // the front of the log to correctly map response
605 // data into the packets.
606
607 // Log entry contains the old value before the current
608 // atomic operation occurred.
609 log = data.popAtomicLogEntryFront();
610 pkt->setData(&log[offset]);
611 delete [] log;
612 log = nullptr;
613 break;
614 default:
615 panic("Unsupported ruby packet type:%s\n",
616 RubyRequestType_to_string(type));
617 break;
618 }
619 } else {
620 DPRINTF(MemoryAccess,
621 "WARNING. Data not transfered from Ruby to M5 for type " \
622 "%s\n",
623 RubyRequestType_to_string(type));
624 }
625 }
626 assert(data.numAtomicLogEntries() == 0);
627
629 assert(m_outstanding_count >= 0);
630
631 completeHitCallback(pktList);
632}
633
634bool
636{
637 return coalescedTable.empty();
638}
639
640RubyRequestType
642{
643 RubyRequestType req_type = RubyRequestType_NULL;
644
645 // These types are not support or not used in GPU caches.
646 assert(!pkt->req->isLLSC());
647 assert(!pkt->req->isLockedRMW());
648 assert(!pkt->req->isInstFetch());
649
650 if (pkt->req->isAtomicReturn()) {
651 req_type = RubyRequestType_ATOMIC_RETURN;
652 } else if (pkt->req->isAtomicNoReturn()) {
653 req_type = RubyRequestType_ATOMIC_NO_RETURN;
654 } else if (pkt->isRead()) {
655 req_type = RubyRequestType_LD;
656 } else if (pkt->isWrite()) {
657 req_type = RubyRequestType_ST;
658 } else if (pkt->isFlush()) {
659 req_type = RubyRequestType_FLUSH;
660 } else {
661 panic("Unsupported ruby packet type\n");
662 }
663
664 return req_type;
665}
666
667// Places an uncoalesced packet in uncoalescedTable. If the packet is a
668// special type (MemFence, scoping, etc), it is issued immediately.
669RequestStatus
671{
672 if (pkt->cmd == MemCmd::MemSyncReq) {
673 // issue mem_sync requests immediately to the cache system without
674 // going through uncoalescedTable like normal LD/ST/Atomic requests
676 } else {
677 // all packets must have valid instruction sequence numbers
678 assert(pkt->req->hasInstSeqNum());
679
680 // otherwise, this must be either read or write command
681 assert(pkt->isRead() || pkt->isWrite() || pkt->isFlush());
682
683 InstSeqNum seq_num = pkt->req->getReqInstSeqNum();
684
685 // in the case of protocol tester, there is one packet per sequence
686 // number. The number of packets during simulation depends on the
687 // number of lanes actives for that vmem request (i.e., the popcnt
688 // of the exec_mask.
689 int num_packets = 1;
690
691 // When Ruby is in warmup or cooldown phase, the requests come from
692 // the cache recorder. There is no dynamic instruction associated
693 // with these requests either
696 if (!m_usingRubyTester) {
697 num_packets = 0;
698 for (int i = 0; i < TheGpuISA::NumVecElemPerVecReg; i++) {
699 num_packets += getDynInst(pkt)->getLaneStatus(i);
700 }
701 }
702 }
703
704 // the pkt is temporarily stored in the uncoalesced table until
705 // it's picked for coalescing process later in this cycle or in a
706 // future cycle. Packets remaining is set to the number of excepted
707 // requests from the instruction based on its exec_mask.
710 uncoalescedTable.initPacketsRemaining(seq_num, num_packets);
711 DPRINTF(GPUCoalescer, "Put pkt with addr 0x%X to uncoalescedTable\n",
712 pkt->getAddr());
713
714 // we schedule an issue event here to process the uncoalesced table
715 // and try to issue Ruby request to cache system
716 if (!issueEvent.scheduled()) {
717 DPRINTF(GPUCoalescer, "Scheduled issueEvent for seqNum %d\n",
718 seq_num);
720 }
721 }
722
723 // we always return RequestStatus_Issued in this coalescer
724 // b/c the coalescer's resouce was checked ealier and the coalescer is
725 // queueing up aliased requets in its coalesced table
726 return RequestStatus_Issued;
727}
728
729template <class KEY, class VALUE>
730std::ostream &
731operator<<(std::ostream &out, const std::unordered_map<KEY, VALUE> &map)
732{
733 out << "[";
734 for (auto i = map.begin(); i != map.end(); ++i)
735 out << " " << i->first << "=" << i->second;
736 out << " ]";
737
738 return out;
739}
740
741void
742GPUCoalescer::print(std::ostream& out) const
743{
744 out << "[GPUCoalescer: " << m_version
745 << ", outstanding requests: " << m_outstanding_count
746 << "]";
747}
748
761
762bool
764{
765 uint64_t seqNum = pkt->req->getReqInstSeqNum();
766 Addr line_addr = makeLineAddress(pkt->getAddr());
767
768 // If the packet has the same line address as a request already in the
769 // coalescedTable and has the same sequence number, it can be coalesced.
770 if (coalescedTable.count(line_addr)) {
771 // Search for a previous coalesced request with the same seqNum.
772 auto& creqQueue = coalescedTable.at(line_addr);
773 auto citer = std::find_if(creqQueue.begin(), creqQueue.end(),
774 [&](CoalescedRequest* c) { return c->getSeqNum() == seqNum; }
775 );
776 if (citer != creqQueue.end()) {
777 (*citer)->insertPacket(pkt);
778 return true;
779 }
780 }
781
783 // This is an "aliased" or new request. Create a RubyRequest and
784 // append it to the list of "targets" in the coalescing table.
785 DPRINTF(GPUCoalescer, "Creating new or aliased request for 0x%X\n",
786 line_addr);
787
788 CoalescedRequest *creq = new CoalescedRequest(seqNum);
789 creq->insertPacket(pkt);
790 creq->setRubyType(getRequestType(pkt));
791 creq->setIssueTime(curCycle());
792
793 if (!coalescedTable.count(line_addr)) {
794 // If there is no outstanding request for this line address,
795 // create a new coalecsed request and issue it immediately.
796 auto reqList = std::deque<CoalescedRequest*> { creq };
797 coalescedTable.insert(std::make_pair(line_addr, reqList));
798 if (!coalescedReqs.count(seqNum)) {
799 coalescedReqs.insert(std::make_pair(seqNum, reqList));
800 } else {
801 coalescedReqs.at(seqNum).push_back(creq);
802 }
803 } else {
804 // The request is for a line address that is already outstanding
805 // but for a different instruction. Add it as a new request to be
806 // issued when the current outstanding request is completed.
807 coalescedTable.at(line_addr).push_back(creq);
808 DPRINTF(GPUCoalescer, "found address 0x%X with new seqNum %d\n",
809 line_addr, seqNum);
810 }
811
812 // In both cases, requests are added to the coalescing table and will
813 // be counted as outstanding requests.
815
816 // We track all issued or to-be-issued Ruby requests associated with
817 // write instructions. An instruction may have multiple Ruby
818 // requests.
819 if (pkt->cmd == MemCmd::WriteReq) {
820 DPRINTF(GPUCoalescer, "adding write inst %d at line 0x%x to"
821 " the pending write instruction list\n", seqNum,
822 line_addr);
823
826
827 // we need to save this port because it will be used to call
828 // back the requesting CU when we receive write
829 // complete callbacks for all issued Ruby requests of this
830 // instruction.
831 RubyPort::MemResponsePort* mem_response_port = ss->port;
832
833 GPUDynInstPtr gpuDynInst = nullptr;
834
835 if (!m_usingRubyTester) {
836 // If this coalescer is connected to a real CU, we need
837 // to save the corresponding gpu dynamic instruction.
838 // CU will use that instruction to decrement wait counters
839 // in the issuing wavefront.
840 // For Ruby tester, gpuDynInst == nullptr
841 gpuDynInst = getDynInst(pkt);
842 }
843
844 PendingWriteInst& inst = pendingWriteInsts[seqNum];
845 inst.addPendingReq(mem_response_port, gpuDynInst,
847 }
848
849 return true;
850 }
851
852 // The maximum number of outstanding requests have been issued.
853 return false;
854}
855
856void
858{
859 // Iterate over the maximum number of instructions we can coalesce
860 // per cycle (coalescingWindow).
861 for (int instIdx = 0; instIdx < coalescingWindow; ++instIdx) {
862 PerInstPackets *pkt_list =
864
865 // getInstPackets will return nullptr if no instruction
866 // exists at the current offset.
867 if (!pkt_list) {
868 break;
869 } else if (pkt_list->empty()) {
870 // Found something, but it has not been cleaned up by update
871 // resources yet. See if there is anything else to coalesce.
872 // Assume we can't check anymore if the coalescing window is 1.
873 continue;
874 } else {
875 // All packets in the list have the same seqNum, use first.
876 InstSeqNum seq_num = pkt_list->front()->req->getReqInstSeqNum();
877
878 // The difference in list size before and after tells us the
879 // number of packets which were coalesced.
880 size_t pkt_list_size = pkt_list->size();
881
882 // Since we have a pointer to the list of packets in the inst,
883 // erase them from the list if coalescing is successful and
884 // leave them in the list otherwise. This aggressively attempts
885 // to coalesce as many packets as possible from the current inst.
886 pkt_list->remove_if(
887 [&](PacketPtr pkt) { return coalescePacket(pkt); }
888 );
889
890 if (coalescedReqs.count(seq_num)) {
891 auto& creqs = coalescedReqs.at(seq_num);
892 for (auto creq : creqs) {
893 DPRINTF(GPUCoalescer, "Issued req type %s seqNum %d\n",
894 RubyRequestType_to_string(creq->getRubyType()),
895 seq_num);
896 issueRequest(creq);
897 }
898 coalescedReqs.erase(seq_num);
899 }
900
901 assert(pkt_list_size >= pkt_list->size());
902 size_t pkt_list_diff = pkt_list_size - pkt_list->size();
903
904 int num_remaining = uncoalescedTable.getPacketsRemaining(seq_num);
905 num_remaining -= pkt_list_diff;
906 assert(num_remaining >= 0);
907
908 uncoalescedTable.setPacketsRemaining(seq_num, num_remaining);
910 "Coalesced %d pkts for seqNum %d, %d remaining\n",
911 pkt_list_diff, seq_num, num_remaining);
912 }
913 }
914
915 // Clean up any instructions in the uncoalesced table that have had
916 // all of their packets coalesced and return a token for that column.
918
919 // have Kernel End releases been issued this cycle
920 int len = newKernelEnds.size();
921 for (int i = 0; i < len; i++) {
923 }
924 newKernelEnds.clear();
925}
926
927void
932
933void
935{
936 assert(kernelEndList.count(wavefront_id));
937
938 ruby_hit_callback(kernelEndList[wavefront_id]);
939
940 kernelEndList.erase(wavefront_id);
941}
942
943void
945 MachineType mach,
946 const DataBlock& data)
947{
948 assert(address == makeLineAddress(address));
949 assert(coalescedTable.count(address));
950
951 auto crequest = coalescedTable.at(address).front();
952
953 fatal_if((crequest->getRubyType() != RubyRequestType_ATOMIC &&
954 crequest->getRubyType() != RubyRequestType_ATOMIC_RETURN &&
955 crequest->getRubyType() != RubyRequestType_ATOMIC_NO_RETURN),
956 "atomicCallback saw non-atomic type response\n");
957
958 hitCallback(crequest, mach, (DataBlock&)data, true,
959 crequest->getIssueTime(), Cycles(0), Cycles(0), false);
960
961 delete crequest;
962 coalescedTable.at(address).pop_front();
963
964 if (coalescedTable.at(address).empty()) {
965 coalescedTable.erase(address);
966 } else {
967 auto nextRequest = coalescedTable.at(address).front();
968 issueRequest(nextRequest);
969 }
970}
971
972void
974{
975 for (auto& pkt : mylist) {
976 // When Ruby is in warmup or cooldown phase, the requests come
977 // from the cache recorder. They do not track which port to use
978 // and do not need to send the response back
982 safe_cast<RubyPort::SenderState *>(pkt->senderState);
983 MemResponsePort *port = ss->port;
984 assert(port != NULL);
985
986 pkt->senderState = ss->predecessor;
987
988 if (pkt->cmd != MemCmd::WriteReq) {
989 // for WriteReq, we keep the original senderState until
990 // writeCompleteCallback
991 delete ss;
992 }
993
994 port->hitCallback(pkt);
996 }
997 }
998
999 // We schedule an event in the same tick as hitCallback (similar to
1000 // makeRequest) rather than calling completeIssue directly to reduce
1001 // function calls to complete issue. This can only happen if the max
1002 // outstanding requests is less than the number of slots in the
1003 // uncoalesced table and makeRequest is not called again.
1006 }
1007
1011 } else if (RubySystem::getCooldownEnabled()) {
1012 rs->m_cache_recorder->enqueueNextFlushRequest();
1013 } else {
1015 }
1016}
1017
1018void
1020 MachineType mach,
1021 Cycles initialRequestTime,
1022 Cycles forwardRequestTime,
1023 Cycles firstResponseTime,
1024 bool success, bool isRegion)
1025{
1026}
1027
1028} // namespace ruby
1029} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:210
const char data[]
Cycles curCycle() const
Determine the current cycle, corresponding to a tick aligned to a clock edge.
Tick cyclesToTicks(Cycles c) const
Tick clockPeriod() const
Cycles is a wrapper class for representing cycle counts, i.e.
Definition types.hh:79
virtual std::string name() const
Definition named.hh:47
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
bool isRead() const
Definition packet.hh:593
Addr getAddr() const
Definition packet.hh:807
bool isAtomicOp() const
Definition packet.hh:846
SenderState * senderState
This packet's sender state.
Definition packet.hh:545
T * getPtr()
get a pointer to the data ptr.
Definition packet.hh:1225
void setData(const uint8_t *p)
Copy data into the packet from the provided pointer.
Definition packet.hh:1293
bool isWrite() const
Definition packet.hh:594
RequestPtr req
A pointer to the original request.
Definition packet.hh:377
unsigned getSize() const
Definition packet.hh:817
MemCmd cmd
The command field of the packet.
Definition packet.hh:372
bool isFlush() const
Definition packet.hh:624
Ports are used to interface objects to each other.
Definition port.hh:62
void sendTokens(int num_tokens)
Return num_tokens tokens back to the request port.
Definition token_port.cc:78
void enqueueNextFetchRequest()
Function for fetching warming up the memory and the caches.
void setIssueTime(Cycles _issueTime)
void insertPacket(PacketPtr pkt)
void setRubyType(RubyRequestType type)
PacketPtr getFirstPkt() const
RubyRequestType getRubyType() const
std::vector< PacketPtr > & getPackets()
virtual RubyRequestType getRequestType(PacketPtr pkt)
void writeCompleteCallback(Addr address, uint64_t instSeqNum, MachineType mach)
void writeCallback(Addr address, DataBlock &data)
std::vector< statistics::Histogram * > m_IssueToInitialDelayHist
Histograms for recording the breakdown of miss latency.
void evictionCallback(Addr address)
void kernelCallback(int wavefront_id)
virtual void atomicCallback(Addr address, MachineType mach, const DataBlock &data)
virtual void issueMemSyncRequest(PacketPtr pkt)
void printRequestTable(std::stringstream &ss)
GMTokenPort & getGMTokenPort()
std::vector< statistics::Histogram * > m_missMachLatencyHist
Histograms for profiling the latencies for requests that required external messages.
statistics::Histogram m_latencyHist
Histogram for holding latency profile of all requests.
void resetStats() override
Callback to reset stats.
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
RubyGPUCoalescerParams Params
void printProgress(std::ostream &out) const
void hitCallback(CoalescedRequest *crequest, MachineType mach, DataBlock &data, bool success, Cycles initialRequestTime, Cycles forwardRequestTime, Cycles firstResponseTime, bool isRegion)
std::unordered_map< uint64_t, std::deque< CoalescedRequest * > > coalescedReqs
UncoalescedTable uncoalescedTable
void insertKernel(int wavefront_id, PacketPtr pkt)
std::unordered_map< int, PacketPtr > kernelEndList
virtual void issueRequest(CoalescedRequest *crequest)=0
statistics::Histogram m_missLatencyHist
Histogram for holding latency profile of all requests that miss in the controller connected to this s...
bool coalescePacket(PacketPtr pkt)
std::vector< statistics::Histogram * > m_InitialToForwardDelayHist
std::vector< statistics::Histogram * > m_FirstResponseToCompletionDelayHist
std::vector< statistics::Histogram * > m_ForwardToFirstResponseDelayHist
RequestStatus makeRequest(PacketPtr pkt) override
void readCallback(Addr address, DataBlock &data)
void completeHitCallback(std::vector< PacketPtr > &mylist)
void recordMissLatency(CoalescedRequest *crequest, MachineType mach, Cycles initialRequestTime, Cycles forwardRequestTime, Cycles firstResponseTime, bool success, bool isRegion)
std::unordered_map< uint64_t, PendingWriteInst > pendingWriteInsts
std::vector< statistics::Histogram * > m_typeLatencyHist
GPUCoalescer(const Params &)
void print(std::ostream &out) const
std::map< Addr, std::deque< CoalescedRequest * > > coalescedTable
std::vector< int > newKernelEnds
std::vector< statistics::Histogram * > m_missTypeLatencyHist
std::vector< std::vector< statistics::Histogram * > > m_missTypeMachLatencyHist
EventFunctionWrapper issueEvent
GPUDynInstPtr getDynInst(PacketPtr pkt) const
EventFunctionWrapper deadlockCheckEvent
void addPendingReq(RubyPort::MemResponsePort *port, GPUDynInstPtr inst, bool usingRubyTester)
void ackWriteCompletion(bool usingRubyTester)
void ruby_hit_callback(PacketPtr pkt)
Definition RubyPort.cc:452
RubySystem * m_ruby_system
Definition RubyPort.hh:202
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition RubyPort.cc:104
void ruby_eviction_callback(Addr address)
Definition RubyPort.cc:695
static bool getWarmupEnabled()
Definition RubySystem.hh:75
CacheRecorder * m_cache_recorder
static bool getCooldownEnabled()
Definition RubySystem.hh:76
void setPacketsRemaining(InstSeqNum seqNum, int count)
std::map< InstSeqNum, RubyRequestType > reqTypeMap
void insertPacket(PacketPtr pkt)
void printRequestTable(std::stringstream &ss)
bool areRequestsDone(const InstSeqNum instSeqNum)
void insertReqType(PacketPtr pkt, RubyRequestType type)
std::map< InstSeqNum, PerInstPackets > instMap
UncoalescedTable(GPUCoalescer *gc)
void initPacketsRemaining(InstSeqNum seqNum, int count)
int getPacketsRemaining(InstSeqNum seqNum)
void checkDeadlock(Tick threshold)
PerInstPackets * getInstPackets(int offset)
std::map< InstSeqNum, int > instPktsRemaining
void reset()
Reset stat value to default.
A simple histogram stat.
STL deque class.
Definition stl.hh:44
STL list class.
Definition stl.hh:51
STL vector class.
Definition stl.hh:37
bool scheduled() const
Determine if the current event is scheduled.
Definition eventq.hh:458
void schedule(Event &event, Tick when)
Definition eventq.hh:1012
static const Priority Progress_Event_Pri
Progress events come at the end.
Definition eventq.hh:229
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:188
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition logging.hh:236
#define warn(...)
Definition logging.hh:256
Bitfield< 18, 16 > len
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 23, 0 > offset
Definition types.hh:144
Bitfield< 9, 8 > rs
Bitfield< 29 > c
Definition misc_types.hh:53
Bitfield< 21 > ss
Definition misc_types.hh:60
Bitfield< 0 > p
Addr makeLineAddress(Addr addr)
Definition Address.cc:60
Addr getOffset(Addr addr)
Definition Address.cc:54
std::ostream & operator<<(std::ostream &os, const BoolVec &myvector)
Definition BoolVec.cc:49
std::string printAddress(Addr addr)
Definition Address.cc:80
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
T safe_cast(U &&ref_or_ptr)
Definition cast.hh:74
std::shared_ptr< GPUDynInst > GPUDynInstPtr
Definition misc.hh:49
Tick curTick()
The universal simulation clock.
Definition cur_tick.hh:46
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition types.hh:245
uint64_t Tick
Tick count type.
Definition types.hh:58
uint64_t InstSeqNum
Definition inst_seq.hh:40
Declaration of the Packet class.
const std::string & name()
Definition trace.cc:48

Generated on Tue Jun 18 2024 16:24:05 for gem5 by doxygen 1.11.0