interrupts.hh File Reference

#include "arch/arm/faults.hh"
#include "arch/arm/regs/misc.hh"
#include "arch/arm/utility.hh"
#include "arch/generic/interrupts.hh"
#include "cpu/thread_context.hh"
#include "debug/Interrupt.hh"
#include "enums/ArmExtension.hh"
#include "params/ArmInterrupts.hh"

Go to the source code of this file.

Classes
class	gem5::ArmISA::Interrupts

Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
	gem5::ArmISA

Enumerations
enum	gem5::ArmISA::InterruptTypes {   gem5::ArmISA::INT_RST , gem5::ArmISA::INT_ABT , gem5::ArmISA::INT_IRQ , gem5::ArmISA::INT_FIQ ,   gem5::ArmISA::INT_SEV , gem5::ArmISA::INT_VIRT_IRQ , gem5::ArmISA::INT_VIRT_FIQ , gem5::ArmISA::NumInterruptTypes }