gem5  v21.2.0.0
btb.cc
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28 
29 #include "cpu/pred/btb.hh"
30 
31 #include "base/intmath.hh"
32 #include "base/trace.hh"
33 #include "debug/Fetch.hh"
34 
35 namespace gem5
36 {
37 
38 namespace branch_prediction
39 {
40 
41 DefaultBTB::DefaultBTB(unsigned _numEntries,
42  unsigned _tagBits,
43  unsigned _instShiftAmt,
44  unsigned _num_threads)
45  : numEntries(_numEntries),
46  tagBits(_tagBits),
47  instShiftAmt(_instShiftAmt),
48  log2NumThreads(floorLog2(_num_threads))
49 {
50  DPRINTF(Fetch, "BTB: Creating BTB object.\n");
51 
52  if (!isPowerOf2(numEntries)) {
53  fatal("BTB entries is not a power of 2!");
54  }
55 
56  btb.resize(numEntries);
57 
58  for (unsigned i = 0; i < numEntries; ++i) {
59  btb[i].valid = false;
60  }
61 
62  idxMask = numEntries - 1;
63 
64  tagMask = (1 << tagBits) - 1;
65 
67 }
68 
69 void
71 {
72  for (unsigned i = 0; i < numEntries; ++i) {
73  btb[i].valid = false;
74  }
75 }
76 
77 inline
78 unsigned
80 {
81  // Need to shift PC over by the word offset.
82  return ((instPC >> instShiftAmt)
83  ^ (tid << (tagShiftAmt - instShiftAmt - log2NumThreads)))
84  & idxMask;
85 }
86 
87 inline
88 Addr
90 {
91  return (instPC >> tagShiftAmt) & tagMask;
92 }
93 
94 bool
96 {
97  unsigned btb_idx = getIndex(instPC, tid);
98 
99  Addr inst_tag = getTag(instPC);
100 
101  assert(btb_idx < numEntries);
102 
103  if (btb[btb_idx].valid
104  && inst_tag == btb[btb_idx].tag
105  && btb[btb_idx].tid == tid) {
106  return true;
107  } else {
108  return false;
109  }
110 }
111 
112 // @todo Create some sort of return struct that has both whether or not the
113 // address is valid, and also the address. For now will just use addr = 0 to
114 // represent invalid entry.
115 const PCStateBase *
117 {
118  unsigned btb_idx = getIndex(inst_pc, tid);
119 
120  Addr inst_tag = getTag(inst_pc);
121 
122  assert(btb_idx < numEntries);
123 
124  if (btb[btb_idx].valid
125  && inst_tag == btb[btb_idx].tag
126  && btb[btb_idx].tid == tid) {
127  return btb[btb_idx].target.get();
128  } else {
129  return nullptr;
130  }
131 }
132 
133 void
134 DefaultBTB::update(Addr inst_pc, const PCStateBase &target, ThreadID tid)
135 {
136  unsigned btb_idx = getIndex(inst_pc, tid);
137 
138  assert(btb_idx < numEntries);
139 
140  btb[btb_idx].tid = tid;
141  btb[btb_idx].valid = true;
142  set(btb[btb_idx].target, target);
143  btb[btb_idx].tag = getTag(inst_pc);
144 }
145 
146 } // namespace branch_prediction
147 } // namespace gem5
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:190
gem5::branch_prediction::DefaultBTB::lookup
const PCStateBase * lookup(Addr instPC, ThreadID tid)
Looks up an address in the BTB.
Definition: btb.cc:116
btb.hh
gem5::floorLog2
static constexpr std::enable_if_t< std::is_integral_v< T >, int > floorLog2(T x)
Definition: intmath.hh:59
gem5::branch_prediction::DefaultBTB::tagBits
unsigned tagBits
The number of tag bits per entry.
Definition: btb.hh:117
gem5::branch_prediction::DefaultBTB::tagMask
unsigned tagMask
The tag mask.
Definition: btb.hh:120
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:67
gem5::branch_prediction::DefaultBTB::instShiftAmt
unsigned instShiftAmt
Number of bits to shift PC when calculating index.
Definition: btb.hh:123
gem5::isPowerOf2
static constexpr bool isPowerOf2(const T &n)
Definition: intmath.hh:98
gem5::branch_prediction::DefaultBTB::DefaultBTB
DefaultBTB(unsigned numEntries, unsigned tagBits, unsigned instShiftAmt, unsigned numThreads)
Creates a BTB with the given number of entries, number of bits per tag, and instruction offset amount...
Definition: btb.cc:41
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::branch_prediction::DefaultBTB::log2NumThreads
unsigned log2NumThreads
Log2 NumThreads used for hashing threadid.
Definition: btb.hh:129
gem5::branch_prediction::DefaultBTB::reset
void reset()
Definition: btb.cc:70
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::branch_prediction::DefaultBTB::getTag
Addr getTag(Addr instPC)
Returns the tag bits of a given address.
Definition: btb.cc:89
gem5::branch_prediction::DefaultBTB::getIndex
unsigned getIndex(Addr instPC, ThreadID tid)
Returns the index into the BTB, based on the branch's PC.
Definition: btb.cc:79
trace.hh
gem5::PCStateBase
Definition: pcstate.hh:57
intmath.hh
gem5::branch_prediction::DefaultBTB::numEntries
unsigned numEntries
The number of entries in the BTB.
Definition: btb.hh:111
gem5::branch_prediction::DefaultBTB::btb
std::vector< BTBEntry > btb
The actual BTB.
Definition: btb.hh:108
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::branch_prediction::DefaultBTB::tagShiftAmt
unsigned tagShiftAmt
Number of bits to shift PC when calculating tag.
Definition: btb.hh:126
gem5::branch_prediction::DefaultBTB::valid
bool valid(Addr instPC, ThreadID tid)
Checks if a branch is in the BTB.
Definition: btb.cc:95
gem5::branch_prediction::DefaultBTB::update
void update(Addr inst_pc, const PCStateBase &target_pc, ThreadID tid)
Updates the BTB with the target of a branch.
Definition: btb.cc:134
gem5::ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:242
gem5::branch_prediction::DefaultBTB::idxMask
unsigned idxMask
The index mask.
Definition: btb.hh:114

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