#include <request.hh>

Public Types
enum	: FlagsType { ARCH_BITS = 0x000000FF , INST_FETCH = 0x00000100 , PHYSICAL = 0x00000200 , UNCACHEABLE = 0x00000400 , STRICT_ORDER = 0x00000800 , PRIVILEGED = 0x00008000 , CACHE_BLOCK_ZERO = 0x00010000 , NO_ACCESS = 0x00080000 , LOCKED_RMW = 0x00100000 , LLSC = 0x00200000 , MEM_SWAP = 0x00400000 , MEM_SWAP_COND = 0x00800000 , READ_MODIFY_WRITE = 0x00020000 , PREFETCH = 0x01000000 , PF_EXCLUSIVE = 0x02000000 , EVICT_NEXT = 0x04000000 , ACQUIRE = 0x00020000 , RELEASE = 0x00040000 , ATOMIC_RETURN_OP = 0x40000000 , ATOMIC_NO_RETURN_OP = 0x80000000 , KERNEL = 0x00001000 , SECURE = 0x10000000 , PT_WALK = 0x20000000 , INVALIDATE = 0x0000000100000000 , CLEAN = 0x0000000200000000 , DST_POU = 0x0000001000000000 , DST_POC = 0x0000002000000000 , DST_BITS = 0x0000003000000000 , HTM_START = 0x0000010000000000 , HTM_COMMIT = 0x0000020000000000 , HTM_CANCEL = 0x0000040000000000 , HTM_ABORT = 0x0000080000000000 , TLBI = 0x0000100000000000 , TLBI_SYNC = 0x0000200000000000 , TLBI_EXT_SYNC = 0x0000400000000000 , TLBI_EXT_SYNC_COMP = 0x0000800000000000 , STICKY_FLAGS = INST_FETCH }

enum	: CacheCoherenceFlagsType { I_CACHE_INV = 0x00000001 , INV_L1 = I_CACHE_INV , V_CACHE_INV = 0x00000002 , K_CACHE_INV = 0x00000004 , GL1_CACHE_INV = 0x00000008 , K_CACHE_WB = 0x00000010 , FLUSH_L2 = 0x00000020 , GL2_CACHE_INV = 0x00000040 , SLC_BIT = 0x00000080 , DLC_BIT = 0x00000100 , GLC_BIT = 0x00000200 , CACHED = 0x00000400 , READ_WRITE = 0x00000800 , SHARED = 0x00001000 }
	These bits are used to set the coherence policy for the GPU and are encoded in the GCN3 instructions. More...

typedef uint64_t	FlagsType

typedef uint8_t	ArchFlagsType

typedef gem5::Flags< FlagsType >	Flags

typedef uint64_t	CacheCoherenceFlagsType

typedef gem5::Flags< CacheCoherenceFlagsType >	CacheCoherenceFlags

using	LocalAccessor = std::function< Cycles(ThreadContext tc, Packet pkt)>


enum	: RequestorID { wbRequestorId = 0 , funcRequestorId = 1 , intRequestorId = 2 , invldRequestorId = std::numeric_limits<RequestorID>::max() }
	Requestor Ids that are statically allocated. More...

Public Member Functions
	Request ()
	Minimal constructor. More...

	Request (Addr paddr, unsigned size, Flags flags, RequestorID id)
	Constructor for physical (e.g. More...

	Request (Addr vaddr, unsigned size, Flags flags, RequestorID id, Addr pc, ContextID cid, AtomicOpFunctorPtr atomic_op=nullptr)

	Request (const Request &other)

	~Request ()

void	setContext (ContextID context_id)
	Set up Context numbers. More...

void	setStreamId (uint32_t sid)

void	setSubstreamId (uint32_t ssid)

void	setVirt (Addr vaddr, unsigned size, Flags flags, RequestorID id, Addr pc, AtomicOpFunctorPtr amo_op=nullptr)
	Set up a virtual (e.g., CPU) request in a previously allocated Request object. More...

void	setPaddr (Addr paddr)
	Set just the physical address. More...

void	splitOnVaddr (Addr split_addr, RequestPtr &req1, RequestPtr &req2)
	Generate two requests as if this request had been split into two pieces. More...

bool	hasPaddr () const
	Accessor for paddr. More...

Addr	getPaddr () const

bool	hasInstCount () const
	Accessor for instruction count. More...

Counter	getInstCount () const

void	setInstCount (Counter val)

bool	hasSize () const
	Accessor for size. More...

unsigned	getSize () const

const std::vector< bool > &	getByteEnable () const

void	setByteEnable (const std::vector< bool > &be)

bool	isMasked () const
	Returns true if the memory request is masked, which means there is at least one byteEnable element which is false (byte is masked) More...

Tick	time () const
	Accessor for time. More...

bool	isLocalAccess ()
	Is this request for a local memory mapped resource/register? More...

void	setLocalAccessor (LocalAccessor acc)
	Set the function which will enact that access. More...

Cycles	localAccessor (ThreadContext tc, Packet pkt)
	Perform the installed local access. More...

bool	hasAtomicOpFunctor ()
	Accessor for atomic-op functor. More...

AtomicOpFunctor *	getAtomicOpFunctor ()

bool	hasHtmAbortCause () const
	Accessor for hardware transactional memory abort cause. More...

HtmFailureFaultCause	getHtmAbortCause () const

void	setHtmAbortCause (HtmFailureFaultCause val)

Flags	getFlags ()
	Accessor for flags. More...

void	setFlags (Flags flags)
	Note that unlike other accessors, this function sets specific flags (ORs them in); it does not assign its argument to the _flags field. More...

void	clearFlags (Flags flags)

void	setCacheCoherenceFlags (CacheCoherenceFlags extraFlags)

void	clearCacheCoherenceFlags (CacheCoherenceFlags extraFlags)

bool	hasVaddr () const
	Accessor function for vaddr. More...

Addr	getVaddr () const

RequestorID	requestorId () const
	Accesssor for the requestor id. More...

void	requestorId (RequestorID rid)

uint32_t	taskId () const

void	taskId (uint32_t id)

ArchFlagsType	getArchFlags () const
	Accessor function for architecture-specific flags. More...

bool	extraDataValid () const
	Accessor function to check if sc result is valid. More...

uint64_t	getExtraData () const
	Accessor function for store conditional return value. More...

void	setExtraData (uint64_t extraData)
	Accessor function for store conditional return value. More...

bool	hasContextId () const

ContextID	contextId () const
	Accessor function for context ID. More...

void	setSystemReq (bool sysReq)

bool	systemReq () const

bool	hasStreamId () const

uint32_t	streamId () const

bool	hasSubstreamId () const

uint32_t	substreamId () const

void	setPC (Addr pc)

bool	hasPC () const

Addr	getPC () const
	Accessor function for pc. More...

void	incAccessDepth () const
	Increment/Get the depth at which this request is responded to. More...

int	getAccessDepth () const

void	setTranslateLatency ()
	Set/Get the time taken for this request to be successfully translated. More...

Tick	getTranslateLatency () const

void	setAccessLatency ()
	Set/Get the time taken to complete this request's access, not including the time to successfully translate the request. More...

Tick	getAccessLatency () const

bool	hasInstSeqNum () const
	Accessor for the sequence number of instruction that creates the request. More...

InstSeqNum	getReqInstSeqNum () const

void	setReqInstSeqNum (const InstSeqNum seq_num)

bool	isUncacheable () const
	Accessor functions for flags. More...

bool	isStrictlyOrdered () const

bool	isInstFetch () const

bool	isPrefetch () const

bool	isPrefetchEx () const

bool	isLLSC () const

bool	isPriv () const

bool	isLockedRMW () const

bool	isSwap () const

bool	isCondSwap () const

bool	isReadModifyWrite () const

bool	isSecure () const

bool	isPTWalk () const

bool	isRelease () const

bool	isKernel () const

bool	isAtomicReturn () const

bool	isAtomicNoReturn () const

bool	isHTMStart () const

bool	isHTMCommit () const

bool	isHTMCancel () const

bool	isHTMAbort () const

bool	isHTMCmd () const

bool	isTlbi () const

bool	isTlbiSync () const

bool	isTlbiExtSync () const

bool	isTlbiExtSyncComp () const

bool	isTlbiCmd () const

bool	isMemMgmt () const

bool	isAtomic () const

bool	isToPOU () const
	Accessor functions for the destination of a memory request. More...

bool	isToPOC () const

Flags	getDest () const

bool	isAcquire () const

bool	isInvL1 () const
	Accessor functions for the memory space configuration flags and used by GPU ISAs such as the Heterogeneous System Architecture (HSA). More...

bool	isGL2CacheFlush () const


bool	isCacheClean () const
	Accessor functions to determine whether this request is part of a cache maintenance operation. More...

bool	isCacheInvalidate () const

bool	isCacheMaintenance () const

Static Public Member Functions
static RequestPtr	createMemManagement (Flags flags, RequestorID id)
	Factory method for creating memory management requests, with unspecified addr and size. More...

Public Attributes
Tick	translateDelta = 0
	Time for the TLB/table walker to successfully translate this request. More...

Tick	accessDelta = 0
	Access latency to complete this memory transaction not including translation time. More...

int	depth = 0
	Level of the cache hierachy where this request was responded to (e.g. More...

Static Public Attributes
static const FlagsType	STORE_NO_DATA

static const FlagsType	HTM_CMD

static const FlagsType	TLBI_CMD

Private Types
enum	: PrivateFlagsType { VALID_SIZE = 0x00000001 , VALID_PADDR = 0x00000002 , VALID_VADDR = 0x00000004 , VALID_INST_SEQ_NUM = 0x00000008 , VALID_PC = 0x00000010 , VALID_CONTEXT_ID = 0x00000020 , VALID_EXTRA_DATA = 0x00000080 , VALID_STREAM_ID = 0x00000100 , VALID_SUBSTREAM_ID = 0x00000200 , VALID_HTM_ABORT_CAUSE = 0x00000400 , VALID_INST_COUNT = 0x00000800 , STICKY_PRIVATE_FLAGS = VALID_CONTEXT_ID }

typedef uint16_t	PrivateFlagsType

typedef gem5::Flags< PrivateFlagsType >	PrivateFlags

Private Attributes
Addr	_paddr = 0
	The physical address of the request. More...

unsigned	_size = 0
	The size of the request. More...

std::vector< bool >	_byteEnable
	Byte-enable mask for writes. More...

RequestorID	_requestorId = invldRequestorId
	The requestor ID which is unique in the system for all ports that are capable of issuing a transaction. More...

Flags	_flags
	Flag structure for the request. More...

CacheCoherenceFlags	_cacheCoherenceFlags
	Flags that control how downstream cache system maintains coherence. More...

PrivateFlags	privateFlags
	Private flags for field validity checking. More...

Tick	_time = MaxTick
	The time this request was started. More...

uint32_t	_taskId = context_switch_task_id::Unknown
	The task id associated with this request. More...

uint32_t	_streamId = 0
	The stream ID uniquely identifies a device behind the SMMU/IOMMU Each transaction arriving at the SMMU/IOMMU is associated with exactly one stream ID. More...

uint32_t	_substreamId = 0
	The substream ID identifies an "execution context" within a device behind an SMMU/IOMMU. More...

bool	_systemReq = 0
	For fullsystem GPU simulation, this determines if a requests destination is system (host) memory or dGPU (device) memory. More...

Addr	_vaddr = MaxAddr
	The virtual address of the request. More...

uint64_t	_extraData = 0
	Extra data for the request, such as the return value of store conditional or the compare value for a CAS. More...

ContextID	_contextId = InvalidContextID
	The context ID (for statistics, locks, and wakeups). More...

Addr	_pc = MaxAddr
	program counter of initiating access; for tracing/debugging More...

InstSeqNum	_reqInstSeqNum = 0
	Sequence number of the instruction that creates the request. More...

AtomicOpFunctorPtr	atomicOpFunctor = nullptr
	A pointer to an atomic operation. More...

LocalAccessor	_localAccessor

Counter	_instCount = 0
	The instruction count at the time this request is created. More...

HtmFailureFaultCause	_htmAbortCause = HtmFailureFaultCause::INVALID
	The cause for HTM transaction abort. More...

Detailed Description

Definition at line 97 of file request.hh.

Member Typedef Documentation

◆ ArchFlagsType

typedef uint8_t gem5::Request::ArchFlagsType

Definition at line 101 of file request.hh.

◆ CacheCoherenceFlags

typedef gem5::Flags<CacheCoherenceFlagsType> gem5::Request::CacheCoherenceFlags

Definition at line 291 of file request.hh.

◆ CacheCoherenceFlagsType

typedef uint64_t gem5::Request::CacheCoherenceFlagsType

Definition at line 290 of file request.hh.

◆ Flags

typedef gem5::Flags<FlagsType> gem5::Request::Flags

Definition at line 102 of file request.hh.

◆ FlagsType

typedef uint64_t gem5::Request::FlagsType

Definition at line 100 of file request.hh.

◆ LocalAccessor

using gem5::Request::LocalAccessor = std::function<Cycles(ThreadContext *tc, Packet *pkt)>

Definition at line 342 of file request.hh.

◆ PrivateFlags

typedef gem5::Flags<PrivateFlagsType> gem5::Request::PrivateFlags

private

Definition at line 347 of file request.hh.

◆ PrivateFlagsType

typedef uint16_t gem5::Request::PrivateFlagsType

private

Definition at line 346 of file request.hh.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum : FlagsType

Enumerator
ARCH_BITS	Architecture specific flags. These bits int the flag field are reserved for architecture-specific code. For example, SPARC uses them to represent ASIs.
INST_FETCH	The request was an instruction fetch.
PHYSICAL	The virtual address is also the physical address.
UNCACHEABLE	The request is to an uncacheable address. Note Uncacheable accesses may be reordered by CPU models. The STRICT_ORDER flag should be set if such reordering is undesirable.
STRICT_ORDER	The request is required to be strictly ordered by CPU models and is non-speculative. A strictly ordered request is guaranteed to never be re-ordered or executed speculatively by a CPU model. The memory system may still reorder requests in caches unless the UNCACHEABLE flag is set as well.
PRIVILEGED	This request is made in privileged mode.
CACHE_BLOCK_ZERO	This is a write that is targeted and zeroing an entire cache block. There is no need for a read/modify/write
NO_ACCESS	The request should not cause a memory access.
LOCKED_RMW	This request will lock or unlock the accessed memory. When used with a load, the access locks the particular chunk of memory. When used with a store, it unlocks. The rule is that locked accesses have to be made up of a locked load, some operation on the data, and then a locked store.
LLSC	The request is a Load locked/store conditional.
MEM_SWAP	This request is for a memory swap.
MEM_SWAP_COND
READ_MODIFY_WRITE	This request is a read which will be followed by a write.
PREFETCH	The request is a prefetch.
PF_EXCLUSIVE	The request should be prefetched into the exclusive state.
EVICT_NEXT	The request should be marked as LRU.
ACQUIRE	The request should be marked with ACQUIRE.
RELEASE	The request should be marked with RELEASE.
ATOMIC_RETURN_OP	The request is an atomic that returns data.
ATOMIC_NO_RETURN_OP	The request is an atomic that does not return data.
KERNEL	The request should be marked with KERNEL. Used to indicate the synchronization associated with a GPU kernel launch or completion.
SECURE	The request targets the secure memory space.
PT_WALK	The request is a page table walk.
INVALIDATE	The request invalidates a memory location.
CLEAN	The request cleans a memory location.
DST_POU	The request targets the point of unification.
DST_POC	The request targets the point of coherence.
DST_BITS	Bits to define the destination of a request.
HTM_START	hardware transactional memory The request starts a HTM transaction
HTM_COMMIT	The request commits a HTM transaction.
HTM_CANCEL	The request cancels a HTM transaction.
HTM_ABORT	The request aborts a HTM transaction.
TLBI	The Request is a TLB shootdown.
TLBI_SYNC	The Request is a TLB shootdown sync.
TLBI_EXT_SYNC	The Request tells the CPU model that a remote TLB Sync has been requested.
TLBI_EXT_SYNC_COMP	The Request tells the interconnect that a remote TLB Sync request has completed.
STICKY_FLAGS	These flags are not cleared when a Request object is reused (assigned a new address).

Definition at line 104 of file request.hh.

◆ anonymous enum

anonymous enum : RequestorID

Requestor Ids that are statically allocated.

Enumerator
wbRequestorId	This requestor id is used for writeback requests by the caches.
funcRequestorId	This requestor id is used for functional requests that don't come from a particular device.
intRequestorId	This requestor id is used for message signaled interrupts.
invldRequestorId	Invalid requestor id for assertion checking only. It is invalid behavior to ever send this id as part of a request.

Definition at line 271 of file request.hh.

◆ anonymous enum

anonymous enum : CacheCoherenceFlagsType

These bits are used to set the coherence policy for the GPU and are encoded in the GCN3 instructions.

The GCN3 ISA defines two cache levels See the AMD GCN3 ISA Architecture Manual for more details.

INV_L1: L1 cache invalidation FLUSH_L2: L2 cache flush

Invalidation means to simply discard all cache contents. This can be done in the L1 since it is implemented as a write-through cache and there are other copies elsewhere in the hierarchy.

For flush the contents of the cache need to be written back to memory when dirty and can be discarded otherwise. This operation is more involved than invalidation and therefore we do not flush caches with redundant copies of data.

SLC: System Level Coherent. Accesses are forced to miss in the L2 cache and are coherent with system memory.

GLC: Globally Coherent. Controls how reads and writes are handled by the L1 cache. Global here referes to the data being visible globally on the GPU (i.e., visible to all WGs).

For atomics, the GLC bit is used to distinguish between between atomic return/no-return operations. These flags are used by GPUDynInst.

Enumerator
I_CACHE_INV	mem_sync_op flags
INV_L1
V_CACHE_INV
K_CACHE_INV
GL1_CACHE_INV
K_CACHE_WB
FLUSH_L2
GL2_CACHE_INV
SLC_BIT	user-policy flags
DLC_BIT
GLC_BIT
CACHED	mtype flags
READ_WRITE
SHARED

Definition at line 320 of file request.hh.

◆ anonymous enum

anonymous enum : PrivateFlagsType

private

Enumerator
VALID_SIZE	Whether or not the size is valid.
VALID_PADDR	Whether or not paddr is valid (has been written yet).
VALID_VADDR	Whether or not the vaddr is valid.
VALID_INST_SEQ_NUM	Whether or not the instruction sequence number is valid.
VALID_PC	Whether or not the pc is valid.
VALID_CONTEXT_ID	Whether or not the context ID is valid.
VALID_EXTRA_DATA	Whether or not the sc result is valid.
VALID_STREAM_ID	Whether or not the stream ID and substream ID is valid.
VALID_SUBSTREAM_ID
VALID_HTM_ABORT_CAUSE	Whether or not the abort cause is valid.
VALID_INST_COUNT	Whether or not the instruction count is valid.
STICKY_PRIVATE_FLAGS	These flags are not cleared when a Request object is reused (assigned a new address).

Definition at line 349 of file request.hh.

Constructor & Destructor Documentation

◆ Request() [1/4]

gem5::Request::Request ( )

inline

Minimal constructor.

No fields are initialized. (Note that _flags and privateFlags are cleared by Flags default constructor.)

Definition at line 480 of file request.hh.

◆ Request() [2/4]

gem5::Request::Request	(	Addr	paddr,
		unsigned	size,
		Flags	flags,
		RequestorID	id
	)

inline

Constructor for physical (e.g.

device) requests. Initializes just physical address, size, flags, and timestamp (to curTick()). These fields are adequate to perform a request.

Definition at line 487 of file request.hh.

References _byteEnable, _flags, flags, privateFlags, gem5::Flags< T >::set(), VALID_PADDR, and VALID_SIZE.

◆ Request() [3/4]

gem5::Request::Request	(	Addr	vaddr,
		unsigned	size,
		Flags	flags,
		RequestorID	id,
		Addr	pc,
		ContextID	cid,
		AtomicOpFunctorPtr	atomic_op = `nullptr`
	)

inline

Definition at line 495 of file request.hh.

References _byteEnable, flags, gem5::MipsISA::pc, setContext(), setVirt(), and gem5::MipsISA::vaddr.

◆ Request() [4/4]

gem5::Request::Request ( const Request & other )

inline

Definition at line 504 of file request.hh.

References atomicOpFunctor.

◆ ~Request()

gem5::Request::~Request ( )

inline

Definition at line 523 of file request.hh.

Member Function Documentation

◆ clearCacheCoherenceFlags()

void gem5::Request::clearCacheCoherenceFlags ( CacheCoherenceFlags extraFlags )

inline

Definition at line 818 of file request.hh.

References _cacheCoherenceFlags, gem5::Flags< T >::clear(), hasPaddr(), and hasVaddr().

◆ clearFlags()

void gem5::Request::clearFlags ( Flags flags )

inline

Definition at line 803 of file request.hh.

References _flags, gem5::Flags< T >::clear(), flags, hasPaddr(), and hasVaddr().

◆ contextId()

ContextID gem5::Request::contextId ( ) const

inline

Accessor function for context ID.

Definition at line 902 of file request.hh.

References _contextId, and hasContextId().

◆ createMemManagement()

static RequestPtr gem5::Request::createMemManagement	(	Flags	flags,
		RequestorID	id
	)

inlinestatic

Factory method for creating memory management requests, with unspecified addr and size.

Definition at line 530 of file request.hh.

References gem5::curTick(), flags, and gem5::ArmISA::id.

Referenced by gem5::o3::LSQ::checkStaleTranslations(), and gem5::TimingSimpleCPU::DcachePort::recvTimingSnoopReq().

◆ extraDataValid()

bool gem5::Request::extraDataValid ( ) const

inline

Accessor function to check if sc result is valid.

Definition at line 873 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_EXTRA_DATA.

Referenced by getExtraData().

◆ getAccessDepth()

int gem5::Request::getAccessDepth ( ) const

inline

Definition at line 964 of file request.hh.

References depth.

◆ getAccessLatency()

Tick gem5::Request::getAccessLatency ( ) const

inline

Definition at line 977 of file request.hh.

References accessDelta.

◆ getArchFlags()

ArchFlagsType gem5::Request::getArchFlags ( ) const

inline

Accessor function for architecture-specific flags.

Definition at line 865 of file request.hh.

References _flags, ARCH_BITS, hasPaddr(), and hasVaddr().

◆ getAtomicOpFunctor()

AtomicOpFunctor* gem5::Request::getAtomicOpFunctor ( )

inline

Definition at line 753 of file request.hh.

References atomicOpFunctor.

◆ getByteEnable()

const std::vector<bool>& gem5::Request::getByteEnable ( ) const

inline

Definition at line 698 of file request.hh.

References _byteEnable.

◆ getDest()

Flags gem5::Request::getDest ( ) const

inline

Definition at line 1070 of file request.hh.

References _flags, and DST_BITS.

◆ getExtraData()

uint64_t gem5::Request::getExtraData ( ) const

inline

Accessor function for store conditional return value.

Definition at line 880 of file request.hh.

References _extraData, and extraDataValid().

◆ getFlags()

Flags gem5::Request::getFlags ( )

inline

Accessor for flags.

Definition at line 785 of file request.hh.

References _flags, hasPaddr(), and hasVaddr().

◆ getHtmAbortCause()

HtmFailureFaultCause gem5::Request::getHtmAbortCause ( ) const

inline

Definition at line 769 of file request.hh.

References _htmAbortCause, and hasHtmAbortCause().

◆ getInstCount()

Counter gem5::Request::getInstCount ( ) const

inline

Definition at line 652 of file request.hh.

References _instCount, and hasInstCount().

◆ getPaddr()

Addr gem5::Request::getPaddr ( ) const

inline

Definition at line 637 of file request.hh.

References _paddr, and hasPaddr().

◆ getPC()

Addr gem5::Request::getPC ( ) const

inline

Accessor function for pc.

Definition at line 953 of file request.hh.

References _pc, and hasPC().

◆ getReqInstSeqNum()

InstSeqNum gem5::Request::getReqInstSeqNum ( ) const

inline

Definition at line 990 of file request.hh.

References _reqInstSeqNum, and hasInstSeqNum().

◆ getSize()

unsigned gem5::Request::getSize ( ) const

inline

Definition at line 691 of file request.hh.

References _size, and hasSize().

◆ getTranslateLatency()

Tick gem5::Request::getTranslateLatency ( ) const

inline

Definition at line 970 of file request.hh.

References translateDelta.

◆ getVaddr()

Addr gem5::Request::getVaddr ( ) const

inline

Definition at line 833 of file request.hh.

References _vaddr, gem5::Flags< T >::isSet(), privateFlags, and VALID_VADDR.

◆ hasAtomicOpFunctor()

bool gem5::Request::hasAtomicOpFunctor ( )

inline

Accessor for atomic-op functor.

Definition at line 747 of file request.hh.

References atomicOpFunctor.

◆ hasContextId()

bool gem5::Request::hasContextId ( ) const

inline

Definition at line 895 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_CONTEXT_ID.

Referenced by contextId().

◆ hasHtmAbortCause()

bool gem5::Request::hasHtmAbortCause ( ) const

inline

Accessor for hardware transactional memory abort cause.

Definition at line 763 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_HTM_ABORT_CAUSE.

Referenced by getHtmAbortCause().

◆ hasInstCount()

bool gem5::Request::hasInstCount ( ) const

inline

Accessor for instruction count.

Definition at line 647 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_INST_COUNT.

Referenced by getInstCount().

◆ hasInstSeqNum()

bool gem5::Request::hasInstSeqNum ( ) const

inline

Accessor for the sequence number of instruction that creates the request.

Definition at line 984 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_INST_SEQ_NUM.

Referenced by getReqInstSeqNum().

◆ hasPaddr()

bool gem5::Request::hasPaddr ( ) const

inline

Accessor for paddr.

Definition at line 631 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_PADDR.

Referenced by clearCacheCoherenceFlags(), clearFlags(), getArchFlags(), getFlags(), getPaddr(), setCacheCoherenceFlags(), setFlags(), splitOnVaddr(), and time().

◆ hasPC()

bool gem5::Request::hasPC ( ) const

inline

Definition at line 946 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_PC.

Referenced by getPC().

◆ hasSize()

bool gem5::Request::hasSize ( ) const

inline

Accessor for size.

Definition at line 685 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_SIZE.

Referenced by getSize().

◆ hasStreamId()

bool gem5::Request::hasStreamId ( ) const

inline

Definition at line 913 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_STREAM_ID.

Referenced by setSubstreamId(), and streamId().

◆ hasSubstreamId()

bool gem5::Request::hasSubstreamId ( ) const

inline

Definition at line 926 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_SUBSTREAM_ID.

Referenced by substreamId().

◆ hasVaddr()

bool gem5::Request::hasVaddr ( ) const

inline

Accessor function for vaddr.

Definition at line 827 of file request.hh.

References gem5::Flags< T >::isSet(), privateFlags, and VALID_VADDR.

Referenced by clearCacheCoherenceFlags(), clearFlags(), getArchFlags(), getFlags(), setCacheCoherenceFlags(), setFlags(), splitOnVaddr(), and time().

◆ incAccessDepth()

void gem5::Request::incAccessDepth ( ) const

inline

Increment/Get the depth at which this request is responded to.

This currently happens when the request misses in any cache level.

Definition at line 963 of file request.hh.

References depth.

◆ isAcquire()

bool gem5::Request::isAcquire ( ) const

inline

Definition at line 1072 of file request.hh.

References _cacheCoherenceFlags, ACQUIRE, and gem5::Flags< T >::isSet().

◆ isAtomic()

bool gem5::Request::isAtomic ( ) const

inline

Definition at line 1055 of file request.hh.

References _flags, ATOMIC_NO_RETURN_OP, ATOMIC_RETURN_OP, and gem5::Flags< T >::isSet().

◆ isAtomicNoReturn()

bool gem5::Request::isAtomicNoReturn ( ) const

inline

Definition at line 1029 of file request.hh.

References _flags, ATOMIC_NO_RETURN_OP, and gem5::Flags< T >::isSet().

◆ isAtomicReturn()

bool gem5::Request::isAtomicReturn ( ) const

inline

Definition at line 1028 of file request.hh.

References _flags, ATOMIC_RETURN_OP, and gem5::Flags< T >::isSet().

◆ isCacheClean()

bool gem5::Request::isCacheClean ( ) const

inline

Accessor functions to determine whether this request is part of a cache maintenance operation.

At the moment three operations are supported:

1) A cache clean operation updates all copies of a memory location to the point of reference, 2) A cache invalidate operation invalidates all copies of the specified block in the memory above the point of reference, 3) A clean and invalidate operation is a combination of the two operations.

Definition at line 1099 of file request.hh.

References _flags, CLEAN, and gem5::Flags< T >::isSet().

◆ isCacheInvalidate()

bool gem5::Request::isCacheInvalidate ( ) const

inline

Definition at line 1100 of file request.hh.

References _flags, INVALIDATE, and gem5::Flags< T >::isSet().

◆ isCacheMaintenance()

bool gem5::Request::isCacheMaintenance ( ) const

inline

Definition at line 1101 of file request.hh.

References _flags, CLEAN, INVALIDATE, and gem5::Flags< T >::isSet().

◆ isCondSwap()

bool gem5::Request::isCondSwap ( ) const

inline

Definition at line 1018 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and MEM_SWAP_COND.

◆ isGL2CacheFlush()

bool gem5::Request::isGL2CacheFlush ( ) const

inline

Definition at line 1082 of file request.hh.

References _cacheCoherenceFlags, FLUSH_L2, and gem5::Flags< T >::isSet().

◆ isHTMAbort()

bool gem5::Request::isHTMAbort ( ) const

inline

Definition at line 1034 of file request.hh.

References _flags, HTM_ABORT, and gem5::Flags< T >::isSet().

Referenced by isHTMCmd(), and setHtmAbortCause().

◆ isHTMCancel()

bool gem5::Request::isHTMCancel ( ) const

inline

Definition at line 1033 of file request.hh.

References _flags, HTM_CANCEL, and gem5::Flags< T >::isSet().

Referenced by isHTMCmd().

◆ isHTMCmd()

bool gem5::Request::isHTMCmd ( ) const

inline

Definition at line 1036 of file request.hh.

References isHTMAbort(), isHTMCancel(), isHTMCommit(), and isHTMStart().

Referenced by isMemMgmt().

◆ isHTMCommit()

bool gem5::Request::isHTMCommit ( ) const

inline

Definition at line 1032 of file request.hh.

References _flags, HTM_COMMIT, and gem5::Flags< T >::isSet().

Referenced by isHTMCmd().

◆ isHTMStart()

bool gem5::Request::isHTMStart ( ) const

inline

Definition at line 1031 of file request.hh.

References _flags, HTM_START, and gem5::Flags< T >::isSet().

Referenced by isHTMCmd().

◆ isInstFetch()

bool gem5::Request::isInstFetch ( ) const

inline

Definition at line 1007 of file request.hh.

References _flags, INST_FETCH, and gem5::Flags< T >::isSet().

◆ isInvL1()

bool gem5::Request::isInvL1 ( ) const

inline

Accessor functions for the memory space configuration flags and used by GPU ISAs such as the Heterogeneous System Architecture (HSA).

Note that setting extraFlags should be done via setCacheCoherenceFlags().

Definition at line 1079 of file request.hh.

References _cacheCoherenceFlags, INV_L1, and gem5::Flags< T >::isSet().

◆ isKernel()

bool gem5::Request::isKernel ( ) const

inline

Definition at line 1027 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and KERNEL.

◆ isLLSC()

bool gem5::Request::isLLSC ( ) const

inline

Definition at line 1014 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and LLSC.

◆ isLocalAccess()

bool gem5::Request::isLocalAccess ( )

inline

Is this request for a local memory mapped resource/register?

Definition at line 733 of file request.hh.

References _localAccessor.

◆ isLockedRMW()

bool gem5::Request::isLockedRMW ( ) const

inline

Definition at line 1016 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and LOCKED_RMW.

◆ isMasked()

bool gem5::Request::isMasked ( ) const

inline

Returns true if the memory request is masked, which means there is at least one byteEnable element which is false (byte is masked)

Definition at line 716 of file request.hh.

References _byteEnable.

◆ isMemMgmt()

bool gem5::Request::isMemMgmt ( ) const

inline

Definition at line 1052 of file request.hh.

References isHTMCmd(), and isTlbiCmd().

◆ isPrefetch()

bool gem5::Request::isPrefetch ( ) const

inline

Definition at line 1009 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), PF_EXCLUSIVE, and PREFETCH.

◆ isPrefetchEx()

bool gem5::Request::isPrefetchEx ( ) const

inline

Definition at line 1013 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and PF_EXCLUSIVE.

◆ isPriv()

bool gem5::Request::isPriv ( ) const

inline

Definition at line 1015 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and PRIVILEGED.

◆ isPTWalk()

bool gem5::Request::isPTWalk ( ) const

inline

Definition at line 1025 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and PT_WALK.

◆ isReadModifyWrite()

bool gem5::Request::isReadModifyWrite ( ) const

inline

Definition at line 1020 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), LOCKED_RMW, and READ_MODIFY_WRITE.

◆ isRelease()

bool gem5::Request::isRelease ( ) const

inline

Definition at line 1026 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and RELEASE.

◆ isSecure()

bool gem5::Request::isSecure ( ) const

inline

Definition at line 1024 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and SECURE.

◆ isStrictlyOrdered()

bool gem5::Request::isStrictlyOrdered ( ) const

inline

Definition at line 1006 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and STRICT_ORDER.

◆ isSwap()

bool gem5::Request::isSwap ( ) const

inline

Definition at line 1017 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), MEM_SWAP, and MEM_SWAP_COND.

◆ isTlbi()

bool gem5::Request::isTlbi ( ) const

inline

Definition at line 1042 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and TLBI.

Referenced by isTlbiCmd().

◆ isTlbiCmd()

bool gem5::Request::isTlbiCmd ( ) const

inline

Definition at line 1047 of file request.hh.

References isTlbi(), isTlbiExtSync(), isTlbiExtSyncComp(), and isTlbiSync().

Referenced by isMemMgmt().

◆ isTlbiExtSync()

bool gem5::Request::isTlbiExtSync ( ) const

inline

Definition at line 1044 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and TLBI_EXT_SYNC.

Referenced by isTlbiCmd().

◆ isTlbiExtSyncComp()

bool gem5::Request::isTlbiExtSyncComp ( ) const

inline

Definition at line 1045 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and TLBI_EXT_SYNC_COMP.

Referenced by isTlbiCmd().

◆ isTlbiSync()

bool gem5::Request::isTlbiSync ( ) const

inline

Definition at line 1043 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and TLBI_SYNC.

Referenced by isTlbiCmd().

◆ isToPOC()

bool gem5::Request::isToPOC ( ) const

inline

Definition at line 1069 of file request.hh.

References _flags, DST_POC, and gem5::Flags< T >::isSet().

◆ isToPOU()

bool gem5::Request::isToPOU ( ) const

inline

Accessor functions for the destination of a memory request.

The destination flag can specify a point of reference for the operation (e.g. a cache block clean to the the point of unification). At the moment the destination is only used by the cache maintenance operations.

Definition at line 1068 of file request.hh.

References _flags, DST_POU, and gem5::Flags< T >::isSet().

◆ isUncacheable()

bool gem5::Request::isUncacheable ( ) const

inline

Accessor functions for flags.

Note that these are for testing only; setting flags should be done via setFlags().

Definition at line 1005 of file request.hh.

References _flags, gem5::Flags< T >::isSet(), and UNCACHEABLE.

◆ localAccessor()

Cycles gem5::Request::localAccessor	(	ThreadContext *	tc,
		Packet *	pkt
	)

inline

Perform the installed local access.

Definition at line 738 of file request.hh.

References _localAccessor.

◆ requestorId() [1/2]

RequestorID gem5::Request::requestorId ( ) const

inline

Accesssor for the requestor id.

Definition at line 841 of file request.hh.

References _requestorId.

◆ requestorId() [2/2]

void gem5::Request::requestorId ( RequestorID rid )

inline

Definition at line 847 of file request.hh.

References _requestorId.

◆ setAccessLatency()

void gem5::Request::setAccessLatency ( )

inline

Set/Get the time taken to complete this request's access, not including the time to successfully translate the request.

Definition at line 976 of file request.hh.

References _time, accessDelta, gem5::curTick(), and translateDelta.

◆ setByteEnable()

void gem5::Request::setByteEnable ( const std::vector< bool > & be )

inline

Definition at line 704 of file request.hh.

References _byteEnable, _size, and gem5::MipsISA::be.

◆ setCacheCoherenceFlags()

void gem5::Request::setCacheCoherenceFlags ( CacheCoherenceFlags extraFlags )

inline

Definition at line 810 of file request.hh.

References _cacheCoherenceFlags, hasPaddr(), hasVaddr(), and gem5::Flags< T >::set().

◆ setContext()

void gem5::Request::setContext ( ContextID context_id )

inline

Set up Context numbers.

Definition at line 545 of file request.hh.

References _contextId, privateFlags, gem5::Flags< T >::set(), and VALID_CONTEXT_ID.

Referenced by Request().

◆ setExtraData()

void gem5::Request::setExtraData ( uint64_t extraData )

inline

Accessor function for store conditional return value.

Definition at line 888 of file request.hh.

References _extraData, privateFlags, gem5::Flags< T >::set(), and VALID_EXTRA_DATA.

◆ setFlags()

void gem5::Request::setFlags ( Flags flags )

inline

Note that unlike other accessors, this function sets specific flags (ORs them in); it does not assign its argument to the _flags field.

Thus this method should rightly be called setFlags() and not just flags().

Definition at line 796 of file request.hh.

References _flags, flags, hasPaddr(), hasVaddr(), and gem5::Flags< T >::set().

◆ setHtmAbortCause()

void gem5::Request::setHtmAbortCause ( HtmFailureFaultCause val )

inline

Definition at line 776 of file request.hh.

References _htmAbortCause, isHTMAbort(), privateFlags, gem5::Flags< T >::set(), gem5::X86ISA::val, and VALID_HTM_ABORT_CAUSE.

◆ setInstCount()

void gem5::Request::setInstCount ( Counter val )

inline

Definition at line 658 of file request.hh.

References _instCount, privateFlags, gem5::Flags< T >::set(), gem5::X86ISA::val, and VALID_INST_COUNT.

◆ setLocalAccessor()

void gem5::Request::setLocalAccessor ( LocalAccessor acc )

inline

Set the function which will enact that access.

Definition at line 735 of file request.hh.

References _localAccessor.

◆ setPaddr()

void gem5::Request::setPaddr ( Addr paddr )

inline

Set just the physical address.

This usually used to record the result of a translation.

Definition at line 596 of file request.hh.

References _paddr, privateFlags, gem5::Flags< T >::set(), and VALID_PADDR.

◆ setPC()

void gem5::Request::setPC ( Addr pc )

inline

Definition at line 939 of file request.hh.

References _pc, gem5::MipsISA::pc, privateFlags, gem5::Flags< T >::set(), and VALID_PC.

◆ setReqInstSeqNum()

void gem5::Request::setReqInstSeqNum ( const InstSeqNum seq_num )

inline

Definition at line 997 of file request.hh.

References _reqInstSeqNum, privateFlags, gem5::Flags< T >::set(), and VALID_INST_SEQ_NUM.

◆ setStreamId()

void gem5::Request::setStreamId ( uint32_t sid )

inline

Definition at line 552 of file request.hh.

References _streamId, privateFlags, gem5::Flags< T >::set(), and VALID_STREAM_ID.

◆ setSubstreamId()

void gem5::Request::setSubstreamId ( uint32_t ssid )

inline

Definition at line 559 of file request.hh.

References _substreamId, hasStreamId(), privateFlags, gem5::Flags< T >::set(), and VALID_SUBSTREAM_ID.

◆ setSystemReq()

void gem5::Request::setSystemReq ( bool sysReq )

inline

Definition at line 909 of file request.hh.

References _systemReq.

◆ setTranslateLatency()

void gem5::Request::setTranslateLatency ( )

inline

Set/Get the time taken for this request to be successfully translated.

Definition at line 969 of file request.hh.

References _time, gem5::curTick(), and translateDelta.

◆ setVirt()

void gem5::Request::setVirt	(	Addr	vaddr,
		unsigned	size,
		Flags	flags,
		RequestorID	id,
		Addr	pc,
		AtomicOpFunctorPtr	amo_op = `nullptr`
	)

inline

Set up a virtual (e.g., CPU) request in a previously allocated Request object.

Definition at line 571 of file request.hh.

References _flags, _localAccessor, _pc, _requestorId, _size, _time, _vaddr, accessDelta, atomicOpFunctor, gem5::Flags< T >::clear(), gem5::curTick(), depth, flags, gem5::ArmISA::id, gem5::MipsISA::pc, privateFlags, gem5::Flags< T >::set(), STICKY_FLAGS, STICKY_PRIVATE_FLAGS, translateDelta, gem5::MipsISA::vaddr, VALID_PC, VALID_SIZE, and VALID_VADDR.

Referenced by Request().

◆ splitOnVaddr()

void gem5::Request::splitOnVaddr	(	Addr	split_addr,
		RequestPtr &	req1,
		RequestPtr &	req2
	)

inline

Generate two requests as if this request had been split into two pieces.

The original request can't have been translated already.

Definition at line 609 of file request.hh.

References _byteEnable, _size, _vaddr, hasPaddr(), and hasVaddr().

◆ streamId()

uint32_t gem5::Request::streamId ( ) const

inline

Definition at line 919 of file request.hh.

References _streamId, and hasStreamId().

◆ substreamId()

uint32_t gem5::Request::substreamId ( ) const

inline

Definition at line 932 of file request.hh.

References _substreamId, and hasSubstreamId().

◆ systemReq()

bool gem5::Request::systemReq ( ) const

inline

Definition at line 910 of file request.hh.

References _systemReq.

◆ taskId() [1/2]

uint32_t gem5::Request::taskId ( ) const

inline

Definition at line 853 of file request.hh.

References _taskId.

◆ taskId() [2/2]

void gem5::Request::taskId ( uint32_t id )

inline

Definition at line 859 of file request.hh.

References _taskId, and gem5::ArmISA::id.

◆ time()

Tick gem5::Request::time ( ) const

inline

Accessor for time.

Definition at line 726 of file request.hh.

References _time, hasPaddr(), and hasVaddr().

Member Data Documentation

◆ _byteEnable

std::vector<bool> gem5::Request::_byteEnable

private

Byte-enable mask for writes.

Definition at line 396 of file request.hh.

Referenced by getByteEnable(), isMasked(), Request(), setByteEnable(), and splitOnVaddr().

◆ _cacheCoherenceFlags

CacheCoherenceFlags gem5::Request::_cacheCoherenceFlags

private

Flags that control how downstream cache system maintains coherence.

Definition at line 407 of file request.hh.

Referenced by clearCacheCoherenceFlags(), isAcquire(), isGL2CacheFlush(), isInvL1(), and setCacheCoherenceFlags().

◆ _contextId

ContextID gem5::Request::_contextId = InvalidContextID

private

The context ID (for statistics, locks, and wakeups).

Definition at line 454 of file request.hh.

Referenced by contextId(), and setContext().

◆ _extraData

uint64_t gem5::Request::_extraData = 0

private

Extra data for the request, such as the return value of store conditional or the compare value for a CAS.

Definition at line 451 of file request.hh.

Referenced by getExtraData(), and setExtraData().

◆ _flags

Flags gem5::Request::_flags

private

Flag structure for the request.

Definition at line 404 of file request.hh.

Referenced by clearFlags(), getArchFlags(), getDest(), getFlags(), isAtomic(), isAtomicNoReturn(), isAtomicReturn(), isCacheClean(), isCacheInvalidate(), isCacheMaintenance(), isCondSwap(), isHTMAbort(), isHTMCancel(), isHTMCommit(), isHTMStart(), isInstFetch(), isKernel(), isLLSC(), isLockedRMW(), isPrefetch(), isPrefetchEx(), isPriv(), isPTWalk(), isReadModifyWrite(), isRelease(), isSecure(), isStrictlyOrdered(), isSwap(), isTlbi(), isTlbiExtSync(), isTlbiExtSyncComp(), isTlbiSync(), isToPOC(), isToPOU(), isUncacheable(), Request(), setFlags(), and setVirt().

◆ _htmAbortCause

HtmFailureFaultCause gem5::Request::_htmAbortCause = HtmFailureFaultCause::INVALID

private

The cause for HTM transaction abort.

Definition at line 471 of file request.hh.

Referenced by getHtmAbortCause(), and setHtmAbortCause().

◆ _instCount

Counter gem5::Request::_instCount = 0

private

The instruction count at the time this request is created.

Definition at line 468 of file request.hh.

Referenced by getInstCount(), and setInstCount().

◆ _localAccessor

LocalAccessor gem5::Request::_localAccessor

private

Definition at line 465 of file request.hh.

Referenced by isLocalAccess(), localAccessor(), setLocalAccessor(), and setVirt().

◆ _paddr

Addr gem5::Request::_paddr = 0

private

The physical address of the request.

Valid only if validPaddr is set.

Definition at line 386 of file request.hh.

Referenced by getPaddr(), and setPaddr().

◆ _pc

Addr gem5::Request::_pc = MaxAddr

private

program counter of initiating access; for tracing/debugging

Definition at line 457 of file request.hh.

Referenced by getPC(), setPC(), and setVirt().

◆ _reqInstSeqNum

InstSeqNum gem5::Request::_reqInstSeqNum = 0

private

Sequence number of the instruction that creates the request.

Definition at line 460 of file request.hh.

Referenced by getReqInstSeqNum(), and setReqInstSeqNum().

◆ _requestorId

RequestorID gem5::Request::_requestorId = invldRequestorId

private

The requestor ID which is unique in the system for all ports that are capable of issuing a transaction.

Definition at line 401 of file request.hh.

Referenced by requestorId(), and setVirt().

◆ _size

unsigned gem5::Request::_size = 0

private

The size of the request.

This field must be set when vaddr or paddr is written via setVirt() or a phys basec constructor, so it is always valid as long as one of the address fields is valid.

Definition at line 393 of file request.hh.

Referenced by getSize(), setByteEnable(), setVirt(), and splitOnVaddr().

◆ _streamId

uint32_t gem5::Request::_streamId = 0

private

The stream ID uniquely identifies a device behind the SMMU/IOMMU Each transaction arriving at the SMMU/IOMMU is associated with exactly one stream ID.

Definition at line 429 of file request.hh.

Referenced by setStreamId(), and streamId().

◆ _substreamId

uint32_t gem5::Request::_substreamId = 0

private

The substream ID identifies an "execution context" within a device behind an SMMU/IOMMU.

It's intended to map 1-to-1 to PCIe PASID (Process Address Space ID). The presence of a substream ID is optional.

Definition at line 437 of file request.hh.

Referenced by setSubstreamId(), and substreamId().

◆ _systemReq

bool gem5::Request::_systemReq = 0

private

For fullsystem GPU simulation, this determines if a requests destination is system (host) memory or dGPU (device) memory.

Definition at line 443 of file request.hh.

Referenced by setSystemReq(), and systemReq().

◆ _taskId

uint32_t gem5::Request::_taskId = context_switch_task_id::Unknown

private

The task id associated with this request.

Definition at line 422 of file request.hh.

Referenced by taskId().

◆ _time

Tick gem5::Request::_time = MaxTick

private

The time this request was started.

Used to calculate latencies. This field is set to curTick() any time paddr or vaddr is written.

Definition at line 417 of file request.hh.

Referenced by setAccessLatency(), setTranslateLatency(), setVirt(), and time().

◆ _vaddr

Addr gem5::Request::_vaddr = MaxAddr

private

The virtual address of the request.

Definition at line 446 of file request.hh.

Referenced by getVaddr(), setVirt(), and splitOnVaddr().

◆ accessDelta

Tick gem5::Request::accessDelta = 0

Access latency to complete this memory transaction not including translation time.

Definition at line 673 of file request.hh.

Referenced by getAccessLatency(), setAccessLatency(), and setVirt().

◆ atomicOpFunctor

AtomicOpFunctorPtr gem5::Request::atomicOpFunctor = nullptr

private

A pointer to an atomic operation.

Definition at line 463 of file request.hh.

Referenced by getAtomicOpFunctor(), hasAtomicOpFunctor(), Request(), and setVirt().

◆ depth

int gem5::Request::depth = 0

mutable

Level of the cache hierachy where this request was responded to (e.g.

0 = L1; 1 = L2).

Definition at line 679 of file request.hh.

Referenced by getAccessDepth(), incAccessDepth(), and setVirt().

◆ HTM_CMD

const FlagsType gem5::Request::HTM_CMD

static

Initial value:

= HTM_START | HTM_COMMIT |

HTM_CANCEL | HTM_ABORT

gem5::Request::HTM_COMMIT

@ HTM_COMMIT

The request commits a HTM transaction.

Definition: request.hh:210

gem5::Request::HTM_ABORT

@ HTM_ABORT

The request aborts a HTM transaction.

Definition: request.hh:216

gem5::Request::HTM_CANCEL

@ HTM_CANCEL

The request cancels a HTM transaction.

Definition: request.hh:213

gem5::Request::HTM_START

@ HTM_START

hardware transactional memory

Definition: request.hh:207

Definition at line 263 of file request.hh.

Referenced by gem5::o3::LSQ::pushRequest().

◆ privateFlags

PrivateFlags gem5::Request::privateFlags

private

Private flags for field validity checking.

Definition at line 410 of file request.hh.

Referenced by extraDataValid(), getVaddr(), hasContextId(), hasHtmAbortCause(), hasInstCount(), hasInstSeqNum(), hasPaddr(), hasPC(), hasSize(), hasStreamId(), hasSubstreamId(), hasVaddr(), Request(), setContext(), setExtraData(), setHtmAbortCause(), setInstCount(), setPaddr(), setPC(), setReqInstSeqNum(), setStreamId(), setSubstreamId(), and setVirt().

◆ STORE_NO_DATA

const FlagsType gem5::Request::STORE_NO_DATA

static

Initial value:

= CACHE_BLOCK_ZERO |

CLEAN | INVALIDATE

gem5::Request::INVALIDATE

@ INVALIDATE

The request invalidates a memory location.

Definition: request.hh:191

gem5::Request::CLEAN

@ CLEAN

The request cleans a memory location.

Definition: request.hh:193

gem5::Request::CACHE_BLOCK_ZERO

@ CACHE_BLOCK_ZERO

This is a write that is targeted and zeroing an entire cache block.

Definition: request.hh:143

Definition at line 260 of file request.hh.

Referenced by gem5::minor::LSQ::pushRequest(), gem5::o3::LSQUnit::write(), gem5::CheckerCPU::writeMem(), gem5::AtomicSimpleCPU::writeMem(), and gem5::TimingSimpleCPU::writeMem().

◆ TLBI_CMD

const FlagsType gem5::Request::TLBI_CMD

static

Initial value:

= TLBI | TLBI_SYNC |

TLBI_EXT_SYNC | TLBI_EXT_SYNC_COMP

gem5::Request::TLBI

@ TLBI

The Request is a TLB shootdown.

Definition: request.hh:241

gem5::Request::TLBI_EXT_SYNC

@ TLBI_EXT_SYNC

The Request tells the CPU model that a remote TLB Sync has been requested.

Definition: request.hh:248

gem5::Request::TLBI_EXT_SYNC_COMP

@ TLBI_EXT_SYNC_COMP

The Request tells the interconnect that a remote TLB Sync request has completed.

Definition: request.hh:252

gem5::Request::TLBI_SYNC

@ TLBI_SYNC

The Request is a TLB shootdown sync.

Definition: request.hh:244

Definition at line 266 of file request.hh.

Referenced by gem5::o3::LSQ::pushRequest().

◆ translateDelta

Tick gem5::Request::translateDelta = 0

Time for the TLB/table walker to successfully translate this request.

Definition at line 667 of file request.hh.

Referenced by getTranslateLatency(), setAccessLatency(), setTranslateLatency(), and setVirt().

The documentation for this class was generated from the following file:

mem/request.hh

Public Types

Public Member Functions

Static Public Member Functions

Public Attributes

Static Public Attributes

Private Types

Private Attributes

Detailed Description

Member Typedef Documentation

◆ ArchFlagsType

◆ CacheCoherenceFlags

◆ CacheCoherenceFlagsType

◆ Flags

◆ FlagsType

◆ LocalAccessor

◆ PrivateFlags

◆ PrivateFlagsType

Member Enumeration Documentation

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

Constructor & Destructor Documentation

◆ Request() [1/4]

◆ Request() [2/4]

◆ Request() [3/4]

◆ Request() [4/4]

◆ ~Request()

Member Function Documentation

◆ clearCacheCoherenceFlags()

◆ clearFlags()

◆ contextId()

◆ createMemManagement()

◆ extraDataValid()

◆ getAccessDepth()

◆ getAccessLatency()

◆ getArchFlags()

◆ getAtomicOpFunctor()

◆ getByteEnable()

◆ getDest()

◆ getExtraData()

◆ getFlags()

◆ getHtmAbortCause()

◆ getInstCount()

◆ getPaddr()

◆ getPC()

◆ getReqInstSeqNum()

◆ getSize()

◆ getTranslateLatency()

◆ getVaddr()

◆ hasAtomicOpFunctor()

◆ hasContextId()

◆ hasHtmAbortCause()

◆ hasInstCount()

◆ hasInstSeqNum()

◆ hasPaddr()

◆ hasPC()

◆ hasSize()

◆ hasStreamId()

◆ hasSubstreamId()

◆ hasVaddr()

◆ incAccessDepth()

◆ isAcquire()

◆ isAtomic()

◆ isAtomicNoReturn()

◆ isAtomicReturn()

◆ isCacheClean()

◆ isCacheInvalidate()

◆ isCacheMaintenance()

◆ isCondSwap()

◆ isGL2CacheFlush()

◆ isHTMAbort()

◆ isHTMCancel()

◆ isHTMCmd()

◆ isHTMCommit()

◆ isHTMStart()

◆ isInstFetch()

◆ isInvL1()

◆ isKernel()

◆ isLLSC()