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gem5
v22.1.0.0
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This is the complete list of members for gem5::DramRotGen, including all inherited members.
| _name | gem5::BaseGen | protected |
| addr | gem5::DramGen | protected |
| addrMapping | gem5::DramGen | protected |
| bankBits | gem5::DramGen | protected |
| BaseGen(SimObject &obj, RequestorID requestor_id, Tick _duration) | gem5::BaseGen | |
| blockBits | gem5::DramGen | protected |
| blocksize | gem5::StochasticGen | protected |
| cacheLineSize | gem5::StochasticGen | protected |
| countNumSeqPkts | gem5::DramGen | protected |
| dataLimit | gem5::StochasticGen | protected |
| dataManipulated | gem5::RandomGen | protected |
| DramGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks) | gem5::DramGen | |
| DramRotGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks, unsigned int max_seq_count_per_rank) | gem5::DramRotGen | inline |
| duration | gem5::BaseGen | |
| endAddr | gem5::StochasticGen | protected |
| enter() | gem5::RandomGen | virtual |
| exit() | gem5::BaseGen | inlinevirtual |
| genStartAddr(unsigned int new_bank, unsigned int new_rank) | gem5::DramGen | |
| getNextPacket() | gem5::DramRotGen | virtual |
| getPacket(Addr addr, unsigned size, const MemCmd &cmd, Request::FlagsType flags=0) | gem5::BaseGen | protected |
| isRead | gem5::DramGen | protected |
| maxPeriod | gem5::StochasticGen | protected |
| maxSeqCountPerRank | gem5::DramRotGen | private |
| minPeriod | gem5::StochasticGen | protected |
| name() const | gem5::BaseGen | inline |
| nbrOfBanksDRAM | gem5::DramGen | protected |
| nbrOfBanksUtil | gem5::DramGen | protected |
| nbrOfRanks | gem5::DramGen | protected |
| nextPacketTick(bool elastic, Tick delay) const | gem5::RandomGen | virtual |
| nextSeqCount | gem5::DramRotGen | private |
| numSeqPkts | gem5::DramGen | protected |
| pageBits | gem5::DramGen | protected |
| pageSize | gem5::DramGen | protected |
| RandomGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit) | gem5::RandomGen | inline |
| rankBits | gem5::DramGen | protected |
| readPercent | gem5::StochasticGen | protected |
| requestorId | gem5::BaseGen | protected |
| startAddr | gem5::StochasticGen | protected |
| StochasticGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit) | gem5::StochasticGen | |
| ~BaseGen() | gem5::BaseGen | inlinevirtual |