gem5  v22.1.0.0
Public Member Functions | List of all members
gem5::VegaISA::Inst_SOP2__S_ANDN2_B32 Class Reference

#include <instructions.hh>

Inheritance diagram for gem5::VegaISA::Inst_SOP2__S_ANDN2_B32:
gem5::VegaISA::Inst_SOP2 gem5::VegaISA::VEGAGPUStaticInst gem5::GPUStaticInst

Public Member Functions

 Inst_SOP2__S_ANDN2_B32 (InFmt_SOP2 *)
 
 ~Inst_SOP2__S_ANDN2_B32 ()
 
int getNumOperands () override
 
int numDstRegOperands () override
 
int numSrcRegOperands () override
 
int getOperandSize (int opIdx) override
 
void execute (GPUDynInstPtr) override
 
- Public Member Functions inherited from gem5::VegaISA::Inst_SOP2
 Inst_SOP2 (InFmt_SOP2 *, const std::string &opcode)
 
int instSize () const override
 
void generateDisassembly () override
 
void initOperandInfo () override
 
- Public Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst
 VEGAGPUStaticInst (const std::string &opcode)
 
 ~VEGAGPUStaticInst ()
 
bool isFlatScratchRegister (int opIdx) override
 
bool isExecMaskRegister (int opIdx) override
 
int coalescerTokenCount () const override
 Return the number of tokens needed by the coalescer. More...
 
ScalarRegU32 srcLiteral () const override
 
- Public Member Functions inherited from gem5::GPUStaticInst
 GPUStaticInst (const std::string &opcode)
 
virtual ~GPUStaticInst ()
 
void instAddr (int inst_addr)
 
int instAddr () const
 
int nextInstAddr () const
 
void instNum (int num)
 
int instNum ()
 
void ipdInstNum (int num)
 
int ipdInstNum () const
 
void initDynOperandInfo (Wavefront *wf, ComputeUnit *cu)
 
const std::string & disassemble ()
 
int numSrcVecOperands ()
 
int numDstVecOperands ()
 
int numSrcVecDWords ()
 
int numDstVecDWords ()
 
int numSrcScalarOperands ()
 
int numDstScalarOperands ()
 
int numSrcScalarDWords ()
 
int numDstScalarDWords ()
 
int maxOperandSize ()
 
bool isALU () const
 
bool isBranch () const
 
bool isCondBranch () const
 
bool isNop () const
 
bool isReturn () const
 
bool isEndOfKernel () const
 
bool isKernelLaunch () const
 
bool isSDWAInst () const
 
bool isDPPInst () const
 
bool isUnconditionalJump () const
 
bool isSpecialOp () const
 
bool isWaitcnt () const
 
bool isSleep () const
 
bool isBarrier () const
 
bool isMemSync () const
 
bool isMemRef () const
 
bool isFlat () const
 
bool isFlatGlobal () const
 
bool isLoad () const
 
bool isStore () const
 
bool isAtomic () const
 
bool isAtomicNoRet () const
 
bool isAtomicRet () const
 
bool isScalar () const
 
bool readsSCC () const
 
bool writesSCC () const
 
bool readsVCC () const
 
bool writesVCC () const
 
bool readsEXEC () const
 
bool writesEXEC () const
 
bool readsMode () const
 
bool writesMode () const
 
bool ignoreExec () const
 
bool isAtomicAnd () const
 
bool isAtomicOr () const
 
bool isAtomicXor () const
 
bool isAtomicCAS () const
 
bool isAtomicExch () const
 
bool isAtomicAdd () const
 
bool isAtomicSub () const
 
bool isAtomicInc () const
 
bool isAtomicDec () const
 
bool isAtomicMax () const
 
bool isAtomicMin () const
 
bool isArgLoad () const
 
bool isGlobalMem () const
 
bool isLocalMem () const
 
bool isArgSeg () const
 
bool isGlobalSeg () const
 
bool isGroupSeg () const
 
bool isKernArgSeg () const
 
bool isPrivateSeg () const
 
bool isReadOnlySeg () const
 
bool isSpillSeg () const
 
bool isGloballyCoherent () const
 Coherence domain of a memory instruction. More...
 
bool isSystemCoherent () const
 
bool isF16 () const
 
bool isF32 () const
 
bool isF64 () const
 
bool isFMA () const
 
bool isMAC () const
 
bool isMAD () const
 
virtual void initiateAcc (GPUDynInstPtr gpuDynInst)
 
virtual void completeAcc (GPUDynInstPtr gpuDynInst)
 
virtual uint32_t getTargetPc ()
 
void setFlag (Flags flag)
 
const std::string & opcode () const
 
const std::vector< OperandInfo > & srcOperands () const
 
const std::vector< OperandInfo > & dstOperands () const
 
const std::vector< OperandInfo > & srcVecRegOperands () const
 
const std::vector< OperandInfo > & dstVecRegOperands () const
 
const std::vector< OperandInfo > & srcScalarRegOperands () const
 
const std::vector< OperandInfo > & dstScalarRegOperands () const
 

Additional Inherited Members

- Public Types inherited from gem5::GPUStaticInst
enum  OpType { SRC_VEC , SRC_SCALAR , DST_VEC , DST_SCALAR }
 
typedef int(RegisterManager::* MapRegFn) (Wavefront *, int)
 
- Public Attributes inherited from gem5::GPUStaticInst
enums::StorageClassType executed_as
 
- Static Public Attributes inherited from gem5::GPUStaticInst
static uint64_t dynamic_id_count
 
- Protected Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst
void panicUnimplemented () const
 
- Protected Attributes inherited from gem5::VegaISA::Inst_SOP2
InFmt_SOP2 instData
 
InstFormat extData
 
uint32_t varSize
 
- Protected Attributes inherited from gem5::VegaISA::VEGAGPUStaticInst
ScalarRegU32 _srcLiteral
 if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More...
 
- Protected Attributes inherited from gem5::GPUStaticInst
const std::string _opcode
 
std::string disassembly
 
int _instNum
 
int _instAddr
 
std::vector< OperandInfosrcOps
 
std::vector< OperandInfodstOps
 

Detailed Description

Definition at line 657 of file instructions.hh.

Constructor & Destructor Documentation

◆ Inst_SOP2__S_ANDN2_B32()

gem5::VegaISA::Inst_SOP2__S_ANDN2_B32::Inst_SOP2__S_ANDN2_B32 ( InFmt_SOP2 iFmt)

Definition at line 639 of file instructions.cc.

References gem5::GPUStaticInst::setFlag().

◆ ~Inst_SOP2__S_ANDN2_B32()

gem5::VegaISA::Inst_SOP2__S_ANDN2_B32::~Inst_SOP2__S_ANDN2_B32 ( )

Definition at line 645 of file instructions.cc.

Member Function Documentation

◆ execute()

void gem5::VegaISA::Inst_SOP2__S_ANDN2_B32::execute ( GPUDynInstPtr  gpuDynInst)
overridevirtual

◆ getNumOperands()

int gem5::VegaISA::Inst_SOP2__S_ANDN2_B32::getNumOperands ( )
inlineoverridevirtual

Implements gem5::GPUStaticInst.

Definition at line 664 of file instructions.hh.

References numDstRegOperands(), and numSrcRegOperands().

◆ getOperandSize()

int gem5::VegaISA::Inst_SOP2__S_ANDN2_B32::getOperandSize ( int  opIdx)
inlineoverridevirtual

Reimplemented from gem5::VegaISA::VEGAGPUStaticInst.

Definition at line 673 of file instructions.hh.

References fatal.

◆ numDstRegOperands()

int gem5::VegaISA::Inst_SOP2__S_ANDN2_B32::numDstRegOperands ( )
inlineoverridevirtual

Implements gem5::GPUStaticInst.

Definition at line 669 of file instructions.hh.

Referenced by getNumOperands().

◆ numSrcRegOperands()

int gem5::VegaISA::Inst_SOP2__S_ANDN2_B32::numSrcRegOperands ( )
inlineoverridevirtual

Implements gem5::GPUStaticInst.

Definition at line 670 of file instructions.hh.

Referenced by getNumOperands().


The documentation for this class was generated from the following files:

Generated on Wed Dec 21 2022 10:24:29 for gem5 by doxygen 1.9.1