gem5 v24.0.0.0
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Memory dependency unit class. More...
#include <mem_dep_unit.hh>
Classes | |
class | MemDepEntry |
Memory dependence entries that track memory operations, marking when the instruction is ready to execute and what instructions depend upon it. More... | |
struct | MemDepUnitStats |
Public Member Functions | |
MemDepUnit () | |
Empty constructor. | |
MemDepUnit (const BaseO3CPUParams ¶ms) | |
Constructs a MemDepUnit with given parameters. | |
~MemDepUnit () | |
Frees up any memory allocated. | |
std::string | name () const |
Returns the name of the memory dependence unit. | |
void | init (const BaseO3CPUParams ¶ms, ThreadID tid, CPU *cpu) |
Initializes the unit with parameters and a thread id. | |
bool | isDrained () const |
Determine if we are drained. | |
void | drainSanityCheck () const |
Perform sanity checks after a drain. | |
void | takeOverFrom () |
Takes over from another CPU's thread. | |
void | setIQ (InstructionQueue *iq_ptr) |
Sets the pointer to the IQ. | |
void | insert (const DynInstPtr &inst) |
Inserts a memory instruction. | |
void | insertNonSpec (const DynInstPtr &inst) |
Inserts a non-speculative memory instruction. | |
void | insertBarrier (const DynInstPtr &barr_inst) |
Inserts a barrier instruction. | |
void | regsReady (const DynInstPtr &inst) |
Indicate that an instruction has its registers ready. | |
void | nonSpecInstReady (const DynInstPtr &inst) |
Indicate that a non-speculative instruction is ready. | |
void | reschedule (const DynInstPtr &inst) |
Reschedules an instruction to be re-executed. | |
void | replay () |
Replays all instructions that have been rescheduled by moving them to the ready list. | |
void | completeInst (const DynInstPtr &inst) |
Notifies completion of an instruction. | |
void | squash (const InstSeqNum &squashed_num, ThreadID tid) |
Squashes all instructions up until a given sequence number for a specific thread. | |
void | violation (const DynInstPtr &store_inst, const DynInstPtr &violating_load) |
Indicates an ordering violation between a store and a younger load. | |
void | issue (const DynInstPtr &inst) |
Issues the given instruction. | |
void | dumpLists () |
Debugging function to dump the lists of instructions. | |
Protected Attributes | |
std::string | _name |
Private Types | |
typedef std::list< DynInstPtr >::iterator | ListIt |
typedef std::shared_ptr< MemDepEntry > | MemDepEntryPtr |
typedef std::unordered_map< InstSeqNum, MemDepEntryPtr, SNHash > | MemDepHash |
typedef MemDepHash::iterator | MemDepHashIt |
Private Member Functions | |
void | completed (const DynInstPtr &inst) |
Completes a memory instruction. | |
void | wakeDependents (const DynInstPtr &inst) |
Wakes any dependents of a memory instruction. | |
MemDepEntryPtr & | findInHash (const DynInstConstPtr &inst) |
Finds the memory dependence entry in the hash map. | |
void | moveToReady (MemDepEntryPtr &ready_inst_entry) |
Moves an entry to the ready list. | |
bool | hasLoadBarrier () const |
Is there an outstanding load barrier that loads must wait on. | |
bool | hasStoreBarrier () const |
Is there an outstanding store barrier that loads must wait on. | |
void | insertBarrierSN (const DynInstPtr &barr_inst) |
Inserts the SN of a barrier inst. | |
Private Attributes | |
MemDepHash | memDepHash |
A hash map of all memory dependence entries. | |
std::list< DynInstPtr > | instList [MaxThreads] |
A list of all instructions in the memory dependence unit. | |
std::list< DynInstPtr > | instsToReplay |
A list of all instructions that are going to be replayed. | |
StoreSet | depPred |
The memory dependence predictor. | |
std::unordered_set< InstSeqNum > | loadBarrierSNs |
Sequence numbers of outstanding load barriers. | |
std::unordered_set< InstSeqNum > | storeBarrierSNs |
Sequence numbers of outstanding store barriers. | |
InstructionQueue * | iqPtr |
Pointer to the IQ. | |
int | id |
The thread id of this memory dependence unit. | |
gem5::o3::MemDepUnit::MemDepUnitStats | stats |
Memory dependency unit class.
This holds the memory dependence predictor. As memory operations are issued to the IQ, they are also issued to this unit, which then looks up the prediction as to what they are dependent upon. This unit must be checked prior to a memory operation being able to issue. Although this is templated, it's somewhat hard to make a generic memory dependence unit. This one is mostly for store sets; it will be quite limited in what other memory dependence predictions it can also utilize. Thus this class should be most likely be rewritten for other dependence prediction schemes.
Definition at line 90 of file mem_dep_unit.hh.
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Definition at line 172 of file mem_dep_unit.hh.
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Definition at line 176 of file mem_dep_unit.hh.
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Definition at line 226 of file mem_dep_unit.hh.
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Definition at line 228 of file mem_dep_unit.hh.
gem5::o3::MemDepUnit::MemDepUnit | ( | ) |
Empty constructor.
Must call init() prior to using in this case.
Definition at line 55 of file mem_dep_unit.cc.
gem5::o3::MemDepUnit::MemDepUnit | ( | const BaseO3CPUParams & | params | ) |
Constructs a MemDepUnit with given parameters.
Definition at line 57 of file mem_dep_unit.cc.
References DPRINTF.
gem5::o3::MemDepUnit::~MemDepUnit | ( | ) |
Frees up any memory allocated.
Definition at line 67 of file mem_dep_unit.cc.
References instList, gem5::o3::MaxThreads, and memDepHash.
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Completes a memory instruction.
Definition at line 405 of file mem_dep_unit.cc.
References DPRINTF, instList, and memDepHash.
Referenced by completeInst().
void gem5::o3::MemDepUnit::completeInst | ( | const DynInstPtr & | inst | ) |
Notifies completion of an instruction.
Definition at line 428 of file mem_dep_unit.cc.
References completed(), DPRINTF, hasLoadBarrier(), hasStoreBarrier(), loadBarrierSNs, storeBarrierSNs, and wakeDependents().
Referenced by gem5::o3::InstructionQueue::wakeDependents().
void gem5::o3::MemDepUnit::drainSanityCheck | ( | ) | const |
Perform sanity checks after a drain.
Definition at line 132 of file mem_dep_unit.cc.
References gem5::ArmISA::i, instList, instsToReplay, gem5::o3::MaxThreads, and memDepHash.
void gem5::o3::MemDepUnit::dumpLists | ( | ) |
Debugging function to dump the lists of instructions.
Definition at line 614 of file mem_dep_unit.cc.
References gem5::cprintf(), instList, gem5::o3::MaxThreads, and memDepHash.
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Finds the memory dependence entry in the hash map.
Definition at line 592 of file mem_dep_unit.cc.
References memDepHash.
Referenced by nonSpecInstReady(), regsReady(), replay(), and wakeDependents().
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Is there an outstanding load barrier that loads must wait on.
Definition at line 253 of file mem_dep_unit.hh.
References loadBarrierSNs.
Referenced by completeInst(), and insert().
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Is there an outstanding store barrier that loads must wait on.
Definition at line 256 of file mem_dep_unit.hh.
References storeBarrierSNs.
Referenced by completeInst(), and insert().
Initializes the unit with parameters and a thread id.
Definition at line 92 of file mem_dep_unit.cc.
References _name, gem5::statistics::Group::addStatGroup(), gem5::csprintf(), depPred, DPRINTF, gem5::o3::StoreSet::init(), and stats.
Referenced by gem5::o3::InstructionQueue::InstructionQueue().
void gem5::o3::MemDepUnit::insert | ( | const DynInstPtr & | inst | ) |
Inserts a memory instruction.
Definition at line 190 of file mem_dep_unit.cc.
References gem5::o3::StoreSet::checkInst(), gem5::o3::MemDepUnit::MemDepUnitStats::conflictingLoads, gem5::o3::MemDepUnit::MemDepUnitStats::conflictingStores, depPred, DPRINTF, hasLoadBarrier(), hasStoreBarrier(), insertBarrierSN(), gem5::o3::MemDepUnit::MemDepUnitStats::insertedLoads, gem5::o3::MemDepUnit::MemDepUnitStats::insertedStores, gem5::o3::StoreSet::insertStore(), instList, loadBarrierSNs, memDepHash, moveToReady(), panic, stats, and storeBarrierSNs.
Referenced by gem5::o3::InstructionQueue::insert().
void gem5::o3::MemDepUnit::insertBarrier | ( | const DynInstPtr & | barr_inst | ) |
Inserts a barrier instruction.
Definition at line 323 of file mem_dep_unit.cc.
References insertBarrierSN(), instList, and memDepHash.
Referenced by gem5::o3::InstructionQueue::insertBarrier(), and insertNonSpec().
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Inserts the SN of a barrier inst.
to the list of tracked barriers
Definition at line 158 of file mem_dep_unit.cc.
References DPRINTF, loadBarrierSNs, and storeBarrierSNs.
Referenced by insert(), and insertBarrier().
void gem5::o3::MemDepUnit::insertNonSpec | ( | const DynInstPtr & | inst | ) |
Inserts a non-speculative memory instruction.
Definition at line 301 of file mem_dep_unit.cc.
References depPred, DPRINTF, insertBarrier(), gem5::o3::MemDepUnit::MemDepUnitStats::insertedLoads, gem5::o3::MemDepUnit::MemDepUnitStats::insertedStores, gem5::o3::StoreSet::insertStore(), panic, and stats.
Referenced by gem5::o3::InstructionQueue::insertNonSpec().
bool gem5::o3::MemDepUnit::isDrained | ( | ) | const |
Determine if we are drained.
Definition at line 120 of file mem_dep_unit.cc.
References gem5::ArmISA::i, instList, instsToReplay, gem5::o3::MaxThreads, and memDepHash.
void gem5::o3::MemDepUnit::issue | ( | const DynInstPtr & | inst | ) |
Issues the given instruction.
Definition at line 583 of file mem_dep_unit.cc.
References depPred, DPRINTF, and gem5::o3::StoreSet::issued().
Referenced by gem5::o3::InstructionQueue::scheduleReadyInsts().
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Moves an entry to the ready list.
Definition at line 602 of file mem_dep_unit.cc.
References gem5::o3::InstructionQueue::addReadyMemInst(), DPRINTF, and iqPtr.
Referenced by insert(), nonSpecInstReady(), regsReady(), replay(), and wakeDependents().
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Returns the name of the memory dependence unit.
Definition at line 106 of file mem_dep_unit.hh.
References _name.
void gem5::o3::MemDepUnit::nonSpecInstReady | ( | const DynInstPtr & | inst | ) |
Indicate that a non-speculative instruction is ready.
Definition at line 367 of file mem_dep_unit.cc.
References DPRINTF, findInHash(), and moveToReady().
Referenced by gem5::o3::InstructionQueue::scheduleNonSpec().
void gem5::o3::MemDepUnit::regsReady | ( | const DynInstPtr & | inst | ) |
Indicate that an instruction has its registers ready.
Definition at line 345 of file mem_dep_unit.cc.
References DPRINTF, findInHash(), and moveToReady().
Referenced by gem5::o3::InstructionQueue::addIfReady().
void gem5::o3::MemDepUnit::replay | ( | ) |
Replays all instructions that have been rescheduled by moving them to the ready list.
Definition at line 385 of file mem_dep_unit.cc.
References DPRINTF, findInHash(), instsToReplay, and moveToReady().
Referenced by gem5::o3::InstructionQueue::replayMemInst().
void gem5::o3::MemDepUnit::reschedule | ( | const DynInstPtr & | inst | ) |
Reschedules an instruction to be re-executed.
Definition at line 379 of file mem_dep_unit.cc.
References instsToReplay.
Referenced by gem5::o3::InstructionQueue::rescheduleMemInst().
void gem5::o3::MemDepUnit::setIQ | ( | InstructionQueue * | iq_ptr | ) |
Sets the pointer to the IQ.
Definition at line 152 of file mem_dep_unit.cc.
References iqPtr.
Referenced by gem5::o3::InstructionQueue::InstructionQueue().
void gem5::o3::MemDepUnit::squash | ( | const InstSeqNum & | squashed_num, |
ThreadID | tid ) |
Squashes all instructions up until a given sequence number for a specific thread.
Definition at line 521 of file mem_dep_unit.cc.
References depPred, DPRINTF, instList, instsToReplay, loadBarrierSNs, memDepHash, gem5::o3::StoreSet::squash(), and storeBarrierSNs.
Referenced by gem5::o3::InstructionQueue::squash().
void gem5::o3::MemDepUnit::takeOverFrom | ( | ) |
Takes over from another CPU's thread.
Definition at line 143 of file mem_dep_unit.cc.
References gem5::o3::StoreSet::clear(), depPred, loadBarrierSNs, and storeBarrierSNs.
void gem5::o3::MemDepUnit::violation | ( | const DynInstPtr & | store_inst, |
const DynInstPtr & | violating_load ) |
Indicates an ordering violation between a store and a younger load.
Definition at line 571 of file mem_dep_unit.cc.
References depPred, DPRINTF, and gem5::o3::StoreSet::violation().
Referenced by gem5::o3::InstructionQueue::violation().
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Wakes any dependents of a memory instruction.
Definition at line 459 of file mem_dep_unit.cc.
References DPRINTF, findInHash(), gem5::ArmISA::i, and moveToReady().
Referenced by completeInst().
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Definition at line 93 of file mem_dep_unit.hh.
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The memory dependence predictor.
It is accessed upon new instructions being added to the IQ, and responds by telling this unit what instruction the newly added instruction is dependent upon.
Definition at line 244 of file mem_dep_unit.hh.
Referenced by init(), insert(), insertNonSpec(), issue(), squash(), takeOverFrom(), and violation().
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The thread id of this memory dependence unit.
Definition at line 265 of file mem_dep_unit.hh.
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A list of all instructions in the memory dependence unit.
Definition at line 234 of file mem_dep_unit.hh.
Referenced by completed(), drainSanityCheck(), dumpLists(), insert(), insertBarrier(), isDrained(), squash(), and ~MemDepUnit().
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A list of all instructions that are going to be replayed.
Definition at line 237 of file mem_dep_unit.hh.
Referenced by drainSanityCheck(), isDrained(), replay(), reschedule(), and squash().
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Pointer to the IQ.
Definition at line 262 of file mem_dep_unit.hh.
Referenced by moveToReady(), and setIQ().
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Sequence numbers of outstanding load barriers.
Definition at line 247 of file mem_dep_unit.hh.
Referenced by completeInst(), hasLoadBarrier(), insert(), insertBarrierSN(), squash(), and takeOverFrom().
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A hash map of all memory dependence entries.
Definition at line 231 of file mem_dep_unit.hh.
Referenced by completed(), drainSanityCheck(), dumpLists(), findInHash(), insert(), insertBarrier(), isDrained(), squash(), and ~MemDepUnit().
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Referenced by init(), insert(), and insertNonSpec().
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Sequence numbers of outstanding store barriers.
Definition at line 250 of file mem_dep_unit.hh.
Referenced by completeInst(), hasStoreBarrier(), insert(), insertBarrierSN(), squash(), and takeOverFrom().