gem5  v21.1.0.2
cmos.cc
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28 
29 #include "dev/x86/cmos.hh"
30 
31 #include "base/trace.hh"
32 #include "debug/CMOS.hh"
33 #include "dev/x86/intdev.hh"
34 #include "mem/packet_access.hh"
35 
36 namespace gem5
37 {
38 
39 void
41 {
42  for (auto *wire: intPin) {
43  wire->raise();
44  //XXX This is a hack.
45  wire->lower();
46  }
47 }
48 
49 Tick
51 {
52  assert(pkt->getSize() == 1);
53  switch(pkt->getAddr() - pioAddr)
54  {
55  case 0x0:
56  pkt->setLE(address);
57  break;
58  case 0x1:
59  pkt->setLE(readRegister(address));
60  break;
61  default:
62  panic("Read from undefined CMOS port.\n");
63  }
64  pkt->makeAtomicResponse();
65  return latency;
66 }
67 
68 Tick
70 {
71  assert(pkt->getSize() == 1);
72  switch(pkt->getAddr() - pioAddr)
73  {
74  case 0x0:
75  address = pkt->getLE<uint8_t>();
76  break;
77  case 0x1:
78  writeRegister(address, pkt->getLE<uint8_t>());
79  break;
80  default:
81  panic("Write to undefined CMOS port.\n");
82  }
83  pkt->makeAtomicResponse();
84  return latency;
85 }
86 
87 uint8_t
89 {
90  assert(reg < numRegs);
91  uint8_t val;
92  if (reg <= 0xD) {
93  val = rtc.readData(reg);
94  DPRINTF(CMOS,
95  "Reading CMOS RTC reg %x as %x.\n", reg, val);
96  } else {
97  val = regs[reg];
98  DPRINTF(CMOS,
99  "Reading non-volitile CMOS address %x as %x.\n", reg, val);
100  }
101  return val;
102 }
103 
104 void
106 {
107  assert(reg < numRegs);
108  if (reg <= 0xD) {
109  DPRINTF(CMOS, "Writing CMOS RTC reg %x with %x.\n",
110  reg, val);
111  rtc.writeData(reg, val);
112  } else {
113  DPRINTF(CMOS, "Writing non-volitile CMOS address %x with %x.\n",
114  reg, val);
115  regs[reg] = val;
116  }
117 }
118 
119 void
121 {
122  rtc.startup();
123 }
124 
125 void
127 {
130 
131  // Serialize the timer
132  rtc.serialize("rtc", cp);
133 }
134 
135 void
137 {
140 
141  // Serialize the timer
142  rtc.unserialize("rtc", cp);
143 }
144 
145 } // namespace gem5
gem5::BasicPioDevice::pioAddr
Addr pioAddr
Address that the device listens to.
Definition: io_device.hh:151
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:575
gem5::X86ISA::Cmos::X86RTC::handleEvent
void handleEvent()
Definition: cmos.cc:40
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::X86ISA::Cmos::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: cmos.cc:126
gem5::Packet::makeAtomicResponse
void makeAtomicResponse()
Definition: packet.hh:1043
gem5::X86ISA::Cmos::writeRegister
void writeRegister(uint8_t reg, uint8_t val)
Definition: cmos.cc:105
gem5::X86ISA::Cmos::readRegister
uint8_t readRegister(uint8_t reg)
Definition: cmos.cc:88
gem5::X86ISA::Cmos::latency
Tick latency
Definition: cmos.hh:46
intdev.hh
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::X86ISA::Cmos::numRegs
static const int numRegs
Definition: cmos.hh:50
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::MC146818::startup
virtual void startup()
Start ticking.
Definition: mc146818.cc:124
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::X86ISA::Cmos::X86RTC::intPin
std::vector< IntSourcePin< X86RTC > * > intPin
Definition: cmos.hh:60
gem5::X86ISA::Cmos::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: cmos.cc:136
cmos.hh
SERIALIZE_ARRAY
#define SERIALIZE_ARRAY(member, size)
Definition: serialize.hh:610
gem5::MC146818::writeData
void writeData(const uint8_t addr, const uint8_t data)
RTC write data.
Definition: mc146818.cc:136
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:568
packet_access.hh
gem5::X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:92
UNSERIALIZE_ARRAY
#define UNSERIALIZE_ARRAY(member, size)
Definition: serialize.hh:618
gem5::X86ISA::Cmos::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: cmos.cc:50
gem5::MC146818::serialize
void serialize(const std::string &base, CheckpointOut &cp) const
Serialize this object to the given output stream.
Definition: mc146818.cc:266
gem5::X86ISA::Cmos::rtc
gem5::X86ISA::Cmos::X86RTC rtc
gem5::Packet::getLE
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Definition: packet_access.hh:78
gem5::X86ISA::Cmos::startup
void startup() override
startup() is the final initialization call before simulation.
Definition: cmos.cc:120
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
trace.hh
gem5::Packet::setLE
void setLE(T v)
Set the value in the data pointer to v as little endian.
Definition: packet_access.hh:108
gem5::X86ISA::Cmos::regs
uint8_t regs[numRegs]
Definition: cmos.hh:52
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:781
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::MC146818::unserialize
void unserialize(const std::string &base, CheckpointIn &cp)
Reconstruct the state of this object from a checkpoint.
Definition: mc146818.cc:286
gem5::MC146818::readData
uint8_t readData(const uint8_t addr)
RTC read data.
Definition: mc146818.cc:229
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:791
gem5::X86ISA::Cmos::address
uint8_t address
Definition: cmos.hh:48
gem5::X86ISA::Cmos::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: cmos.cc:69
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177

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