gem5  v21.1.0.2
cmos.hh
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28 
29 #ifndef __DEV_X86_CMOS_HH__
30 #define __DEV_X86_CMOS_HH__
31 
32 #include "dev/intpin.hh"
33 #include "dev/io_device.hh"
34 #include "dev/mc146818.hh"
35 #include "params/Cmos.hh"
36 
37 namespace gem5
38 {
39 
40 namespace X86ISA
41 {
42 
43 class Cmos : public BasicPioDevice
44 {
45  protected:
47 
48  uint8_t address;
49 
50  static const int numRegs = 128;
51 
52  uint8_t regs[numRegs];
53 
54  uint8_t readRegister(uint8_t reg);
55  void writeRegister(uint8_t reg, uint8_t val);
56 
57  class X86RTC : public MC146818
58  {
59  public:
61 
62  X86RTC(EventManager *em, const std::string &n, const struct tm time,
63  bool bcd, Tick frequency, int int_pin_count) :
64  MC146818(em, n, time, bcd, frequency)
65  {
66  for (int i = 0; i < int_pin_count; i++) {
67  intPin.push_back(new IntSourcePin<X86RTC>(
68  csprintf("%s.int_pin[%d]", n, i), i, this));
69  }
70  }
71  protected:
72  void handleEvent();
73  } rtc;
74 
75  public:
76  typedef CmosParams Params;
77 
78  Cmos(const Params &p) : BasicPioDevice(p, 2), latency(p.pio_latency),
79  rtc(this, name() + ".rtc", p.time, true, 5000000000ULL,
80  p.port_int_pin_connection_count)
81  {
82  memset(regs, 0, numRegs * sizeof(uint8_t));
83  address = 0;
84  }
85 
86  Port &
87  getPort(const std::string &if_name, PortID idx=InvalidPortID) override
88  {
89  if (if_name == "int_pin")
90  return *rtc.intPin.at(idx);
91  else
92  return BasicPioDevice::getPort(if_name, idx);
93  }
94 
95  Tick read(PacketPtr pkt) override;
96 
97  Tick write(PacketPtr pkt) override;
98 
99  void startup() override;
100 
101  void serialize(CheckpointOut &cp) const override;
102  void unserialize(CheckpointIn &cp) override;
103 };
104 
105 } // namespace X86ISA
106 } // namespace gem5
107 
108 #endif //__DEV_X86_CMOS_HH__
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
io_device.hh
gem5::X86ISA::Cmos::X86RTC::handleEvent
void handleEvent()
Definition: cmos.cc:40
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::X86ISA::Cmos::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: cmos.hh:87
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::X86ISA::Cmos::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: cmos.cc:126
gem5::X86ISA::Cmos
Definition: cmos.hh:43
gem5::X86ISA::Cmos::Cmos
Cmos(const Params &p)
Definition: cmos.hh:78
std::vector
STL vector class.
Definition: stl.hh:37
gem5::csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::X86ISA::Cmos::writeRegister
void writeRegister(uint8_t reg, uint8_t val)
Definition: cmos.cc:105
gem5::X86ISA::Cmos::readRegister
uint8_t readRegister(uint8_t reg)
Definition: cmos.cc:88
gem5::X86ISA::Cmos::X86RTC
Definition: cmos.hh:57
gem5::PioDevice::Params
PioDeviceParams Params
Definition: io_device.hh:134
gem5::X86ISA::em
Bitfield< 2 > em
Definition: misc.hh:608
gem5::EventManager
Definition: eventq.hh:987
gem5::X86ISA::Cmos::latency
Tick latency
Definition: cmos.hh:46
gem5::X86ISA::Cmos::Params
CmosParams Params
Definition: cmos.hh:76
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::X86ISA::Cmos::numRegs
static const int numRegs
Definition: cmos.hh:50
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::X86ISA::Cmos::X86RTC::intPin
std::vector< IntSourcePin< X86RTC > * > intPin
Definition: cmos.hh:60
gem5::X86ISA::Cmos::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: cmos.cc:136
gem5::PowerISA::tm
Bitfield< 32 > tm
Definition: misc.hh:107
gem5::X86ISA::Cmos::X86RTC::X86RTC
X86RTC(EventManager *em, const std::string &n, const struct tm time, bool bcd, Tick frequency, int int_pin_count)
Definition: cmos.hh:62
gem5::X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:92
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::ArmISA::n
Bitfield< 31 > n
Definition: misc_types.hh:455
gem5::X86ISA::Cmos::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: cmos.cc:50
gem5::X86ISA::Cmos::rtc
gem5::X86ISA::Cmos::X86RTC rtc
gem5::X86ISA::Cmos::startup
void startup() override
startup() is the final initialization call before simulation.
Definition: cmos.cc:120
gem5::X86ISA::p
Bitfield< 0 > p
Definition: pagetable.hh:151
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::IntSourcePin
Definition: intpin.hh:112
intpin.hh
gem5::X86ISA::Cmos::regs
uint8_t regs[numRegs]
Definition: cmos.hh:52
gem5::Clocked::frequency
uint64_t frequency() const
Definition: clocked_object.hh:215
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::BasicPioDevice
Definition: io_device.hh:147
gem5::MC146818
Real-Time Clock (MC146818)
Definition: mc146818.hh:41
gem5::X86ISA::Cmos::address
uint8_t address
Definition: cmos.hh:48
gem5::X86ISA::Cmos::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: cmos.cc:69
mc146818.hh
gem5::PioDevice::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: io_device.cc:67

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