gem5
v24.0.0.0
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arch
x86
cpuid.cc
Go to the documentation of this file.
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/*
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* Copyright (c) 2008 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
arch/x86/cpuid.hh
"
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#include "
arch/x86/isa.hh
"
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#include "
base/bitfield.hh
"
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#include "
cpu/thread_context.hh
"
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#include "debug/X86.hh"
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namespace
gem5
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{
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namespace
X86ISA
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{
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X86CPUID::X86CPUID
(
const
std::string& vendor,
const
std::string&
name
)
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: vendorString(vendor), nameString(
name
)
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{
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fatal_if
(
vendorString
.size() != 12,
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"CPUID vendor string must be 12 characters\n"
);
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}
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void
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X86CPUID::addStandardFunc
(uint32_t func,
std::vector<uint32_t>
values)
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{
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capabilities
[func] = values;
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}
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void
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X86CPUID::addExtendedFunc
(uint32_t func,
std::vector<uint32_t>
values)
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{
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// Extended functions begin with 8000_0000h, but the enum is based from
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// zero, so we need to add that to the function value.
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capabilities
[func | 0x80000000] = values;
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}
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bool
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X86CPUID::doCpuid
(
ThreadContext
* tc, uint32_t function, uint32_t
index
,
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CpuidResult
&result)
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{
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constexpr
uint32_t
ext
= 0x80000000;
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DPRINTF
(X86,
"Calling CPUID function %x with index %d\n"
, function,
index
);
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// Handle the string-related CPUID functions specially
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if
(function ==
VendorAndLargestStdFunc
) {
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result =
CpuidResult
(
NumStandardCpuidFuncs
- 1,
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stringToRegister
(
vendorString
.c_str()),
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stringToRegister
(
vendorString
.c_str() + 4),
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stringToRegister
(
vendorString
.c_str() + 8));
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return
true
;
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}
else
if
(function == (
ext
|
VendorAndLargestExtFunc
)) {
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result =
CpuidResult
(0x80000000 +
NumExtendedCpuidFuncs
- 1,
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stringToRegister
(
vendorString
.c_str()),
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stringToRegister
(
vendorString
.c_str() + 4),
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stringToRegister
(
vendorString
.c_str() + 8));
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return
true
;
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}
else
if
((function == (
ext
|
NameString1
)) ||
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(function == (
ext
|
NameString2
)) ||
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(function == (
ext
|
NameString3
))) {
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// Zero fill anything beyond the end of the string. This
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// should go away once the string is a vetted parameter.
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char
cleanName[
nameStringSize
];
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memset(cleanName,
'\0'
,
nameStringSize
);
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strncpy(cleanName,
nameString
.c_str(),
nameStringSize
-1);
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int
funcNum =
bits
(function, 15, 0);
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int
offset
= (funcNum -
NameString1
) * 16;
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assert(
nameStringSize
>=
offset
+ 16);
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result =
CpuidResult
(
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stringToRegister
(cleanName +
offset
+ 0),
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stringToRegister
(cleanName +
offset
+ 4),
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stringToRegister
(cleanName +
offset
+ 12),
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stringToRegister
(cleanName +
offset
+ 8));
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return
true
;
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}
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// Ignore anything not in the map of supported CPUID functions.
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// This is checked after the string-related functions as those are not
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// in the capabilities map.
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if
(!
capabilities
.count(function)) {
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return
false
;
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}
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int
cap_offset = 0;
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// Ignore index values for functions that do not take index values.
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if
(
hasSignificantIndex
(function)) {
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cap_offset =
index
* 4;
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}
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// Ensure we have the offset and 4 dwords after it.
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assert(
capabilities
[function].size() >= (cap_offset + 4));
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auto
&cap_vec =
capabilities
[function];
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result =
CpuidResult
(cap_vec[cap_offset + 0], cap_vec[cap_offset + 1],
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cap_vec[cap_offset + 2], cap_vec[cap_offset + 3]);
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DPRINTF
(X86,
"CPUID function %x returning (%x, %x, %x, %x)\n"
,
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function, result.
rax
, result.
rbx
, result.
rdx
, result.
rcx
);
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return
true
;
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}
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uint64_t
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X86CPUID::stringToRegister
(
const
char
*str)
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{
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uint64_t
reg
= 0;
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for
(
int
pos = 3; pos >=0; pos--) {
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reg
<<= 8;
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reg
|= str[pos];
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}
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return
reg
;
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}
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// Return true if the CPUID function takes ECX index as an input AND
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// those multiple index values are supported in gem5.
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bool
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X86CPUID::hasSignificantIndex
(uint32_t function)
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{
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uint16_t family =
bits
(function, 31, 16);
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uint16_t funcNum =
bits
(function, 15, 0);
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if
(family == 0x0000) {
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switch
(funcNum) {
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case
ExtendedState
:
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return
true
;
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default
:
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return
false
;
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}
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}
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return
false
;
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}
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}
// namespace X86ISA
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}
// namespace gem5
DPRINTF
#define DPRINTF(x,...)
Definition
trace.hh:210
bitfield.hh
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition
guest_abi.test.cc:41
gem5::X86ISA::X86CPUID::hasSignificantIndex
bool hasSignificantIndex(uint32_t function)
Definition
cpuid.cc:147
gem5::X86ISA::X86CPUID::capabilities
std::unordered_map< uint32_t, std::vector< uint32_t > > capabilities
Definition
cpuid.hh:108
gem5::X86ISA::X86CPUID::addStandardFunc
void addStandardFunc(uint32_t func, std::vector< uint32_t > values)
Definition
cpuid.cc:50
gem5::X86ISA::X86CPUID::addExtendedFunc
void addExtendedFunc(uint32_t func, std::vector< uint32_t > values)
Definition
cpuid.cc:56
gem5::X86ISA::X86CPUID::nameString
const std::string nameString
Definition
cpuid.hh:107
gem5::X86ISA::X86CPUID::doCpuid
bool doCpuid(ThreadContext *tc, uint32_t function, uint32_t index, CpuidResult &result)
Definition
cpuid.cc:64
gem5::X86ISA::X86CPUID::vendorString
const std::string vendorString
Definition
cpuid.hh:106
gem5::X86ISA::X86CPUID::stringToRegister
uint64_t stringToRegister(const char *str)
Definition
cpuid.cc:134
gem5::X86ISA::X86CPUID::X86CPUID
X86CPUID(const std::string &vendor, const std::string &name)
Definition
cpuid.cc:42
std::vector
STL vector class.
Definition
stl.hh:37
thread_context.hh
cpuid.hh
gem5::bits
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition
bitfield.hh:79
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition
logging.hh:236
gem5::ArmISA::ext
Bitfield< 12 > ext
Definition
misc_types.hh:512
gem5::X86ISA::reg
Bitfield< 5, 3 > reg
Definition
types.hh:92
gem5::X86ISA::NameString3
@ NameString3
Definition
cpuid.hh:65
gem5::X86ISA::VendorAndLargestExtFunc
@ VendorAndLargestExtFunc
Definition
cpuid.hh:61
gem5::X86ISA::NameString1
@ NameString1
Definition
cpuid.hh:63
gem5::X86ISA::NumExtendedCpuidFuncs
@ NumExtendedCpuidFuncs
Definition
cpuid.hh:70
gem5::X86ISA::NameString2
@ NameString2
Definition
cpuid.hh:64
gem5::X86ISA::VendorAndLargestStdFunc
@ VendorAndLargestStdFunc
Definition
cpuid.hh:47
gem5::X86ISA::ExtendedState
@ ExtendedState
Definition
cpuid.hh:55
gem5::X86ISA::NumStandardCpuidFuncs
@ NumStandardCpuidFuncs
Definition
cpuid.hh:56
gem5::X86ISA::nameStringSize
constexpr int nameStringSize
Definition
cpuid.hh:73
gem5::X86ISA::index
Bitfield< 5, 3 > index
Definition
types.hh:98
gem5::X86ISA::offset
offset
Definition
misc.hh:1059
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
gem5::X86ISA::CpuidResult
Definition
cpuid.hh:76
gem5::X86ISA::CpuidResult::rbx
uint64_t rbx
Definition
cpuid.hh:78
gem5::X86ISA::CpuidResult::rdx
uint64_t rdx
Definition
cpuid.hh:80
gem5::X86ISA::CpuidResult::rax
uint64_t rax
Definition
cpuid.hh:77
gem5::X86ISA::CpuidResult::rcx
uint64_t rcx
Definition
cpuid.hh:79
name
const std::string & name()
Definition
trace.cc:48
isa.hh
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