The bit manipulating API.

Functions
constexpr uint64_t	gem5::mask (unsigned nbits)
	Generate a 64-bit mask of 'nbits' 1s, right justified.
template<class T >
constexpr T	gem5::bits (T val, unsigned first, unsigned last)
	Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
template<class T >
constexpr T	gem5::bits (T val, unsigned bit)
	Extract the bit from this position from 'val' and right justify it.
template<class T >
constexpr T	gem5::mbits (T val, unsigned first, unsigned last)
	Mask off the given bits in place like bits() but without shifting.
constexpr uint64_t	gem5::mask (unsigned first, unsigned last)
template<int N>
constexpr uint64_t	gem5::sext (uint64_t val)
	Sign-extend an N-bit value to 64 bits.
constexpr uint64_t	gem5::sext (uint64_t val, int N)
	Sign-extend an N-bit value to 64 bits.
template<int N>
constexpr uint64_t	gem5::szext (uint64_t val)
	Sign-extend an N-bit value to 64 bits.
template<class T , class B >
constexpr T	gem5::insertBits (T val, unsigned first, unsigned last, B bit_val)
	Returns val with bits first to last set to the LSBs of bit_val.
template<class T , class B >
constexpr T	gem5::insertBits (T val, unsigned bit, B bit_val)
	Overloaded for access to only one bit in value.
template<class T , class B >
constexpr void	gem5::replaceBits (T &val, unsigned first, unsigned last, B bit_val)
	A convenience function to replace bits first to last of val with bit_val in place.
template<class T , class B >
constexpr void	gem5::replaceBits (T &val, unsigned bit, B bit_val)
	Overloaded function to allow to access only 1 bit.
template<class T >
std::enable_if_t< std::is_integral_v< T >, T >	gem5::reverseBits (T val, size_t size=sizeof(T))
	Takes a value and returns the bit reversed version.
constexpr int	gem5::findMsbSet (uint64_t val)
	Returns the bit position of the MSB that is set in the input.
constexpr int	gem5::findLsbSet (uint64_t val)
	Returns the bit position of the LSB that is set in the input That function will either use a builtin that exploit a "count trailing zeros" instruction or use fall back method, findLsbSetFallback.
constexpr int	gem5::popCount (uint64_t val)
	Returns the number of set ones in the provided value.
constexpr uint64_t	gem5::alignToPowerOfTwo (uint64_t val)
	Align to the next highest power of two.
constexpr int	gem5::ctz32 (uint32_t value)
	Count trailing zeros in a 32-bit value.
constexpr int	gem5::ctz64 (uint64_t value)
	Count trailing zeros in a 64-bit value.
constexpr int	gem5::clz32 (uint32_t value)
	Count leading zeros in a 32-bit value.
constexpr int	gem5::clz64 (uint64_t value)
	Count leading zeros in a 64-bit value.

Detailed Description

These are a collection of methods for bit manipulations.

Function Documentation

alignToPowerOfTwo()

uint64_t gem5::alignToPowerOfTwo ( uint64_t val )

constexpr

Align to the next highest power of two.

The number passed in is aligned to the next highest power of two, if it is not already a power of two. Please note that if 0 is passed in, 0 is returned.

This code has been modified from the following: http://graphics.stanford.edu/~seander/bithacks.html#RoundUpPowerOf2

Definition at line 450 of file bitfield.hh.

References gem5::X86ISA::val.

Referenced by gem5::SuperBlk::calculateCompressionFactor(), gem5::compression::Multi::compress(), gem5::PciVirtIO::PciVirtIO(), TEST(), TEST(), TEST(), TEST(), TEST(), and TEST().

bits() [1/2]

template<class T >

T gem5::bits ( T val, unsigned bit )

constexpr

Extract the bit from this position from 'val' and right justify it.

Definition at line 93 of file bitfield.hh.

References gem5::bits(), and gem5::X86ISA::val.

bits() [2/2]

template<class T >

T gem5::bits ( T val, unsigned first, unsigned last )

constexpr

Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.

MSB is numbered 63, LSB is 0.

Definition at line 79 of file bitfield.hh.

References gem5::ArmISA::mask, and gem5::X86ISA::val.

Referenced by gem5::SparcISA::PageTableEntry::_size(), gem5::AddrRange::addIntlvBits(), gem5::ArmISA::addPAC(), gem5::ArmISA::TableWalker::LongDescriptor::af(), gem5::ArmISA::TableWalker::L1Descriptor::ap(), gem5::ArmISA::TableWalker::L2Descriptor::ap(), gem5::ArmISA::TableWalker::LongDescriptor::ap(), gem5::ArmISA::TableWalker::LongDescriptor::apTable(), gem5::ArmISA::ArmStaticInst::ArmStaticInst(), gem5::ArmISA::TableWalker::LongDescriptor::attrIndx(), gem5::ArmISA::auth(), gem5::bits(), gem5::ruby::bitSelect(), gem5::ArmISA::bitsToFp(), gem5::ArmISA::bitsToFp(), gem5::ArmISA::calculateTBI(), gem5::CopyEngine::CopyEngineChannel::channelRead(), gem5::ArmISA::TableWalker::checkAddrSizeFaultAArch64(), gem5::RiscvISA::checked_vtype(), gem5::X86ISA::Interrupts::checkInterrupts(), gem5::X86ISA::Interrupts::checkInterruptsRaw(), gem5::ArmISA::TableWalker::checkVAddrSizeFaultAArch64(), gem5::memory::DRAMInterface::chooseNextFRFCFS(), gem5::ItsCommand::collectionOutOfRange(), gem5::ArmISA::WatchPoint::compareAddress(), gem5::PowerISA::BranchCondOp::condOk(), gem5::ArmISA::TableWalker::LongDescriptor::contiguousHint(), gem5::SparcISA::PageTableEntry::cp(), gem5::ArmISA::ArmStaticInst::cpsrWriteByInstr(), gem5::PowerISA::BranchCondOp::ctrOk(), gem5::SparcISA::PageTableEntry::cv(), gem5::GenericPciHost::decodeAddress(), gem5::pseudo_inst::decodeAddrOffset(), gem5::SDMAEngine::decodeHeader(), gem5::ArmISA::decodeMrsMsrBankedReg(), gem5::compression::DictionaryCompressor< T >::MaskedPattern< mask >::decompress(), gem5::compression::DictionaryCompressor< T >::SignExtendedPattern< N >::decompress(), gem5::SkewedAssociative::dehash(), gem5::SkewedAssociative::deskew(), gem5::loader::ElfObject::determineArch(), gem5::GPUDynInst::doApertureCheck(), gem5::X86ISA::X86CPUID::doCpuid(), gem5::ArmISA::TableWalker::doL1Descriptor(), gem5::ArmISA::TableWalker::doL2Descriptor(), gem5::ArmISA::TableWalker::L1Descriptor::domain(), gem5::SparcISA::TLB::doMmuRegRead(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::SMMUTranslationProcess::doReadCD(), gem5::SMMUTranslationProcess::doReadSTE(), gem5::X86ISA::Decoder::doVex2Of3State(), gem5::X86ISA::Decoder::doVex3Of3State(), gem5::MipsISA::dspDpaq(), gem5::MipsISA::dspDpsq(), gem5::MipsISA::dspExtp(), gem5::MipsISA::dspExtpd(), gem5::MipsISA::dspExtr(), gem5::MipsISA::dspPick(), gem5::MipsISA::dspShll(), gem5::MipsISA::dspShra(), gem5::MipsISA::dspShrl(), gem5::X86ISA::EndBitUnion(), gem5::igbreg::txd_op::eop(), gem5::GenericTimer::CoreTimers::EventStream::eventTargetValue(), gem5::VegaISA::Inst_DS__DS_BPERMUTE_B32::execute(), gem5::VegaISA::Inst_DS__DS_PERMUTE_B32::execute(), gem5::VegaISA::Inst_DS__DS_SWIZZLE_B32::execute(), gem5::VegaISA::Inst_DS__DS_WRITE_B8_D16_HI::execute(), gem5::VegaISA::Inst_SOP1__S_BITSET0_B32::execute(), gem5::VegaISA::Inst_SOP1__S_BITSET0_B64::execute(), gem5::VegaISA::Inst_SOP1__S_BITSET1_B32::execute(), gem5::VegaISA::Inst_SOP1__S_BITSET1_B64::execute(), gem5::VegaISA::Inst_SOP1__S_SEXT_I32_I16::execute(), gem5::VegaISA::Inst_SOP1__S_SEXT_I32_I8::execute(), gem5::VegaISA::Inst_SOP2__S_ADD_I32::execute(), gem5::VegaISA::Inst_SOP2__S_ASHR_I32::execute(), gem5::VegaISA::Inst_SOP2__S_ASHR_I64::execute(), gem5::VegaISA::Inst_SOP2__S_BFE_I32::execute(), gem5::VegaISA::Inst_SOP2__S_BFE_I64::execute(), gem5::VegaISA::Inst_SOP2__S_BFE_U32::execute(), gem5::VegaISA::Inst_SOP2__S_BFE_U64::execute(), gem5::VegaISA::Inst_SOP2__S_BFM_B32::execute(), gem5::VegaISA::Inst_SOP2__S_BFM_B64::execute(), gem5::VegaISA::Inst_SOP2__S_LSHL_B32::execute(), gem5::VegaISA::Inst_SOP2__S_LSHL_B64::execute(), gem5::VegaISA::Inst_SOP2__S_LSHR_B32::execute(), gem5::VegaISA::Inst_SOP2__S_LSHR_B64::execute(), gem5::VegaISA::Inst_SOP2__S_SUB_I32::execute(), gem5::VegaISA::Inst_SOPC__S_BITCMP0_B32::execute(), gem5::VegaISA::Inst_SOPC__S_BITCMP0_B64::execute(), gem5::VegaISA::Inst_SOPC__S_BITCMP1_B32::execute(), gem5::VegaISA::Inst_SOPC__S_BITCMP1_B64::execute(), gem5::VegaISA::Inst_SOPK__S_ADDK_I32::execute(), gem5::VegaISA::Inst_SOPP__S_WAITCNT::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE0::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE1::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE2::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE3::execute(), gem5::VegaISA::Inst_VOP2__V_ADDC_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I32::execute(), gem5::VegaISA::Inst_VOP2__V_CNDMASK_B32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_SUBB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP3__V_ADD_LSHL_U32::execute(), gem5::VegaISA::Inst_VOP3__V_ADDC_CO_U32::execute(), gem5::VegaISA::Inst_VOP3__V_ALIGNBIT_B32::execute(), gem5::VegaISA::Inst_VOP3__V_ALIGNBYTE_B32::execute(), gem5::VegaISA::Inst_VOP3__V_ASHRREV_I16::execute(), gem5::VegaISA::Inst_VOP3__V_ASHRREV_I32::execute(), gem5::VegaISA::Inst_VOP3__V_ASHRREV_I64::execute(), gem5::VegaISA::Inst_VOP3__V_BFE_I32::execute(), gem5::VegaISA::Inst_VOP3__V_BFE_U32::execute(), gem5::VegaISA::Inst_VOP3__V_BFM_B32::execute(), gem5::VegaISA::Inst_VOP3__V_CMP_CLASS_F32::execute(), gem5::VegaISA::Inst_VOP3__V_CMP_CLASS_F64::execute(), gem5::VegaISA::Inst_VOP3__V_CMPX_CLASS_F32::execute(), gem5::VegaISA::Inst_VOP3__V_CMPX_CLASS_F64::execute(), gem5::VegaISA::Inst_VOP3__V_CNDMASK_B32::execute(), gem5::VegaISA::Inst_VOP3__V_CVT_F32_UBYTE0::execute(), gem5::VegaISA::Inst_VOP3__V_CVT_F32_UBYTE1::execute(), gem5::VegaISA::Inst_VOP3__V_CVT_F32_UBYTE2::execute(), gem5::VegaISA::Inst_VOP3__V_CVT_F32_UBYTE3::execute(), gem5::VegaISA::Inst_VOP3__V_CVT_PK_FP8_F32::execute(), gem5::VegaISA::Inst_VOP3__V_CVT_PK_U8_F32::execute(), gem5::VegaISA::Inst_VOP3__V_DIV_FMAS_F64::execute(), gem5::VegaISA::Inst_VOP3__V_LERP_U8::execute(), gem5::VegaISA::Inst_VOP3__V_LSHL_ADD_U32::execute(), gem5::VegaISA::Inst_VOP3__V_LSHL_ADD_U64::execute(), gem5::VegaISA::Inst_VOP3__V_LSHL_OR_B32::execute(), gem5::VegaISA::Inst_VOP3__V_LSHLREV_B16::execute(), gem5::VegaISA::Inst_VOP3__V_LSHLREV_B32::execute(), gem5::VegaISA::Inst_VOP3__V_LSHLREV_B64::execute(), gem5::VegaISA::Inst_VOP3__V_LSHRREV_B16::execute(), gem5::VegaISA::Inst_VOP3__V_LSHRREV_B32::execute(), gem5::VegaISA::Inst_VOP3__V_LSHRREV_B64::execute(), gem5::VegaISA::Inst_VOP3__V_MAD_I32_I24::execute(), gem5::VegaISA::Inst_VOP3__V_MAD_U32_U24::execute(), gem5::VegaISA::Inst_VOP3__V_MBCNT_HI_U32_B32::execute(), gem5::VegaISA::Inst_VOP3__V_MBCNT_LO_U32_B32::execute(), gem5::VegaISA::Inst_VOP3__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP3__V_MUL_HI_U32_U24::execute(), gem5::VegaISA::Inst_VOP3__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP3__V_MUL_U32_U24::execute(), gem5::VegaISA::Inst_VOP3__V_SAD_HI_U8::execute(), gem5::VegaISA::Inst_VOP3__V_SAD_U16::execute(), gem5::VegaISA::Inst_VOP3__V_SAD_U8::execute(), gem5::VegaISA::Inst_VOP3__V_SUBB_CO_U32::execute(), gem5::VegaISA::Inst_VOP3__V_SUBBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT2_F32_F16::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT2_I32_I16::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT2_U32_U16::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT4_I32_I8::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT4_U32_U8::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT8_I32_I4::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT8_U32_U4::execute(), gem5::VegaISA::Inst_VOP3P__V_PK_ADD_F32::execute(), gem5::VegaISA::Inst_VOP3P__V_PK_ASHRREV_B16::execute(), gem5::VegaISA::Inst_VOP3P__V_PK_FMA_F32::execute(), gem5::VegaISA::Inst_VOP3P__V_PK_LSHLREV_B16::execute(), gem5::VegaISA::Inst_VOP3P__V_PK_LSHRREV_B16::execute(), gem5::VegaISA::Inst_VOP3P__V_PK_MOV_B32::execute(), gem5::VegaISA::Inst_VOP3P__V_PK_MUL_F32::execute(), gem5::VegaISA::Inst_VOPC__V_CMP_CLASS_F32::execute(), gem5::VegaISA::Inst_VOPC__V_CMP_CLASS_F64::execute(), gem5::VegaISA::Inst_VOPC__V_CMPX_CLASS_F32::execute(), gem5::VegaISA::Inst_VOPC__V_CMPX_CLASS_F64::execute(), gem5::ArmISA::ArmStaticInst::extendReg64(), gem5::findMsbSet(), gem5::findNegative(), gem5::ArmISA::fixFpDFpSDest(), gem5::ArmISA::fixFpSFpDDest(), gem5::ArmISA::fplibFPToFixedJS(), gem5::ArmISA::fpRecipEstimate(), gem5::ArmISA::fprSqrtEstimate(), gem5::ArmISA::fpToBits(), gem5::ArmISA::fpToBits(), gem5::MipsISA::genCCVector(), gem5::VegaISA::Inst_SOPP::generateDisassembly(), gem5::VegaISA::Inst_VOP3P::generateDisassembly(), gem5::Gicv3CPUInterface::generateSGI(), gem5::RiscvISA::VConfOp::generateZimmDisassembly(), gem5::GenericSatCounter< T >::GenericSatCounter(), gem5::guest_abi::Argument< ABI, Arg, typename std::enable_if_t< std::is_integral_v< Arg > &&!ABI::template IsWideV< Arg > > >::get(), gem5::guest_abi::Argument< ArmISA::RegABI32, pseudo_inst::GuestAddr >::get(), gem5::guest_abi::Argument< RiscvISA::RegABI32, pseudo_inst::GuestAddr >::get(), gem5::ArmISA::BrkPoint::getAddrfromReg(), gem5::ArmISA::WatchPoint::getAddrfromReg(), gem5::ArmISA::BrkPoint::getContextfromReg(), gem5::igbreg::txd_op::getCso(), gem5::igbreg::txd_op::getCss(), gem5::RiscvISA::ISA::getFaultHandlerAddr(), gem5::ArmISA::AbortFault< T >::getFsr(), gem5::PM4PacketProcessor::getGARTAddr(), gem5::SDMAEngine::getGARTAddr(), gem5::igbreg::txd_op::getLen(), gem5::X86ISA::Interrupts::getRegArrayBit(), gem5::AMDGPUDevice::getRegVal(), gem5::ArmISA::getRestoredITBits(), gem5::branch_prediction::MPP_StatisticalCorrector_64KB::getSizeInBits(), gem5::branch_prediction::MPP_StatisticalCorrector_8KB::getSizeInBits(), gem5::branch_prediction::TAGEBase::getSizeInBits(), gem5::bitfield_backend::Signed< Storage, first, last >::getter(), gem5::bitfield_backend::Unsigned< Storage, first, last >::getter(), gem5::X86ISA::SegDescriptorLimit::getter(), gem5::igbreg::txd_op::getTsoLen(), gem5::igbreg::txd_op::getType(), gem5::X86ISA::I8259::getVector(), gem5::ArmISA::MMU::CachedState::getVMID(), gem5::ArmISA::BrkPoint::getVMIDfromReg(), gem5::ArmISA::TableWalker::L1Descriptor::global(), gem5::ArmISA::TableWalker::L2Descriptor::global(), gem5::ArmISA::TableWalker::LongDescriptor::global(), gem5::GenericTimer::handleStream(), gem5::bloom_filter::Block::hash(), gem5::bloom_filter::Bulk::hash(), gem5::bloom_filter::H3::hash(), gem5::bloom_filter::MultiBitSel::hash(), gem5::SkewedAssociative::hash(), gem5::X86ISA::X86CPUID::hasSignificantIndex(), gem5::igbreg::txd_op::hdrlen(), gem5::Gicv3CPUInterface::hppviCanPreempt(), gem5::igbreg::txd_op::ic(), gem5::igbreg::txd_op::ide(), gem5::SparcISA::PageTableEntry::ie(), gem5::igbreg::txd_op::ifcs(), gem5::ArmISA::V7LPageTableOps::index(), gem5::ArmISA::V8PageTableOps16k::index(), gem5::ArmISA::V8PageTableOps4k::index(), gem5::ArmISA::V8PageTableOps64k::index(), gem5::Wavefront::initRegState(), gem5::X86ISA::X86_64Process::initState(), gem5::PowerISA::PowerStaticInst::insertCRField(), gem5::ArmISA::TableWalker::L2Descriptor::invalid(), gem5::ItsCommand::invall(), gem5::ArmISA::AbortFault< T >::invoke(), gem5::RiscvISA::RiscvFault::invoke(), gem5::SparcISA::FastDataAccessMMUMiss::invoke(), gem5::SparcISA::FastInstructionAccessMMUMiss::invoke(), gem5::GPUComputeDriver::ioctl(), gem5::igbreg::txd_op::ip(), gem5::igbreg::txd_op::ipcse(), gem5::igbreg::txd_op::ipcso(), gem5::igbreg::txd_op::ipcss(), gem5::ArmISA::SelfDebug::isDebugEnabledForEL32(), gem5::PowerISA::FloatOp::isDenormalized(), gem5::GicV2::isGroup0(), gem5::PowerISA::FloatOp::isInfinity(), gem5::igbreg::txd_op::isLegacy(), gem5::GicV2::isLevelSensitive(), gem5::MipsISA::isNan(), gem5::PowerISA::FloatOp::isNan(), gem5::PowerISA::FloatOp::isNan(), gem5::PowerISA::FloatOp::isNegative(), gem5::PowerISA::FloatOp::isNormalized(), gem5::MipsISA::isQnan(), gem5::PowerISA::FloatOp::isQnan(), gem5::ArmISA::SecureMonitorCall::iss(), gem5::ArmISA::UndefinedInstruction::iss(), gem5::CacheBlk::isSet(), gem5::MipsISA::isSnan(), gem5::PowerISA::FloatOp::isSnan(), gem5::ArmISA::V7LPageTableOps::isWritable(), gem5::ArmISA::V8PageTableOps16k::isWritable(), gem5::ArmISA::V8PageTableOps4k::isWritable(), gem5::ArmISA::V8PageTableOps64k::isWritable(), gem5::PowerISA::FloatOp::isZero(), gem5::igbreg::txd_op::ixsm(), gem5::ArmISA::TableWalker::L2Descriptor::large(), gem5::SparcISA::PageTableEntry::locked(), gem5::ArmISA::MacroMemOp::MacroMemOp(), gem5::SparcISA::TLB::MakeTsbPtr(), gem5::ItsCommand::mapc(), gem5::ItsCommand::mapd(), gem5::ItsCommand::mapi(), gem5::PM4PacketProcessor::mapProcess(), gem5::ItsCommand::mapti(), gem5::ArmISA::maskTaggedAddr(), gem5::ArmISA::TableWalker::LongDescriptor::memAttr(), gem5::ArmISA::TableWalker::memAttrs(), gem5::ArmISA::TableWalker::memAttrsAArch64(), gem5::ArmISA::TableWalker::memAttrsLPAE(), gem5::scmi::Platform::messageID(), gem5::scmi::Platform::messageType(), gem5::RiscvISA::Decoder::moreBytes(), gem5::SparcISA::Decoder::moreBytes(), gem5::ItsCommand::movall(), gem5::ItsCommand::movi(), gem5::igbreg::txd_op::mss(), gem5::ArmISA::TableWalker::LongDescriptor::nextDescAddr(), gem5::ArmISA::TableWalker::LongDescriptor::nextTableAddr(), gem5::SparcISA::PageTableEntry::nofault(), sc_gem5::VcdTraceValInt< T >::output(), sc_gem5::VcdTraceValTime::output(), gem5::ArmISA::TableWalker::LongDescriptor::paddr(), gem5::Gicv3Its::pageAddress(), gem5::ArmISA::V7LPageTableOps::pageMask(), gem5::ArmISA::V8PageTableOps16k::pageMask(), gem5::ArmISA::V8PageTableOps4k::pageMask(), gem5::ArmISA::V8PageTableOps64k::pageMask(), gem5::TlbiOp::performTlbi(), gem5::bloom_filter::Bulk::permute(), gem5::ArmISA::TableWalker::L1Descriptor::pfn(), gem5::ArmISA::TableWalker::L2Descriptor::pfn(), gem5::SparcISA::PageTableEntry::pfn(), gem5::SparcISA::PageTableEntry::populate(), gem5::Plic::post(), gem5::ArmISA::PredImmOp::PredImmOp(), gem5::MsrBase::printMsrBase(), gem5::SparcISA::PageTableEntry::priv(), gem5::ArmISA::Decoder::process(), gem5::PM4PacketProcessor::processSDMAMQD(), gem5::ArmISA::TableWalker::processWalk(), gem5::ArmISA::TableWalker::processWalkAArch64(), gem5::ArmISA::TableWalker::processWalkLPAE(), gem5::scmi::Platform::protocolID(), gem5::ArmISA::MMU::purifyTaggedAddr(), gem5::ArmISA::purifyTaggedAddr(), gem5::ArmISA::TableWalker::LongDescriptor::pxn(), gem5::ArmISA::TableWalker::LongDescriptor::pxnTable(), gem5::VegaISA::quadMask(), gem5::Clint::raiseInterruptPin(), gem5::X86ISA::LongModePTE::read(), gem5::MHU::read32(), gem5::fastmodel::CortexA76TC::readCCRegFlat(), gem5::fastmodel::CortexR52TC::readCCRegFlat(), gem5::Plic::readClaim(), gem5::GenericWatchdog::readControl(), gem5::GicV2::readCpu(), gem5::RiscvISA::ISA::readMiscReg(), gem5::SparcISA::ISA::readMiscRegNoEffect(), gem5::AMDGPUVM::readMMIO(), gem5::Clint::readMSIP(), gem5::VegaISA::ScalarOperand< DataType, Const, NumDwords >::readSpecialVal(), gem5::o3::DynInst::readySrcIdx(), gem5::ps2::PS2Keyboard::recv(), gem5::memory::HBMCtrl::recvTimingReq(), gem5::SDMAEngine::registerRLCQueue(), gem5::X86ISA::I8259::requestInterrupt(), gem5::Sp804::Timer::restartCounter(), gem5::ArmISA::HTMCheckpoint::restore(), gem5::igbreg::txd_op::rs(), gem5::ArmISA::TableWalker::LongDescriptor::rw(), gem5::ArmISA::TableWalker::LongDescriptor::rwTable(), gem5::ArmISA::MMU::s1PermBits64(), gem5::ArmISA::ArmStaticInst::saturateOp(), gem5::VegaISA::sdwaInstDstImpl_helper(), gem5::VegaISA::sdwaInstSrcImpl_helper(), gem5::ArmISA::TableWalker::L1Descriptor::secure(), gem5::ArmISA::TableWalker::LongDescriptor::secure(), gem5::ArmISA::TableWalker::LongDescriptor::secureTable(), gem5::Iris::Interrupts::serialize(), gem5::PciDevice::serialize(), gem5::ArmISA::SelfDebug::setbSDD(), gem5::CacheBlk::setCoherenceBits(), gem5::branch_prediction::MultiperspectivePerceptron::setExtraBits(), gem5::SparcISA::ISA::setFSReg(), gem5::SDMAEngine::setGfxDoorbellOffsetLo(), gem5::SDMAEngine::setGfxSize(), gem5::X86ISA::I8237::setMaskBit(), gem5::ArmISA::SelfDebug::setMDBGen(), gem5::ArmISA::SelfDebug::setMDSCRvals(), gem5::ArmISA::ISA::setMiscReg(), gem5::RiscvISA::ISA::setMiscReg(), gem5::ArmISA::ISA::setMiscRegNoEffect(), gem5::SDMAEngine::setPageDoorbellOffsetLo(), gem5::SDMAEngine::setPageSize(), gem5::X86ISA::Interrupts::setReg(), gem5::X86ISA::I8237::setRequestBit(), gem5::ArmISA::ArmFault::setSyndrome(), gem5::X86ISA::SegDescriptorLimit::setter(), gem5::X86ISA::setThreadArea32Func(), gem5::sext(), gem5::sext(), gem5::ArmISA::TableWalker::LongDescriptor::sh(), gem5::ArmISA::TableWalker::L1Descriptor::shareable(), gem5::ArmISA::TableWalker::L2Descriptor::shareable(), gem5::ArmISA::ArmStaticInst::shiftReg64(), gem5::SparcISA::PageTableEntry::sideffect(), gem5::X86ISA::I8259::signalInterrupt(), gem5::ArmISA::simd_modified_imm(), gem5::MipsISA::simdPack(), gem5::MipsISA::simdUnpack(), gem5::ItsCommand::sizeOutOfRange(), gem5::SkewedAssociative::skew(), gem5::ArmISA::ArmStaticInst::spsrWriteByInstr(), gem5::X86ISA::Walker::WalkerState::stepWalk(), gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of_v< SparcISA::SEWorkload::BaseSyscallABI, ABI > > >::store(), gem5::ArmISA::stripPAC(), gem5::ArmISA::TableWalker::L1Descriptor::supersection(), gem5::szext(), gem5::igbreg::txd_op::tcp(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), gem5::ArmISA::BrkPoint::testAddrMatch(), gem5::ArmISA::BrkPoint::testAddrMissMatch(), gem5::ArmISA::BrkPoint::testContextMatch(), gem5::ArmISA::BrkPoint::testVMIDMatch(), gem5::ArmISA::TableWalker::L1Descriptor::texcb(), gem5::ArmISA::TableWalker::L2Descriptor::texcb(), gem5::TlbiOp64::tlbiAsid(), gem5::TlbiOp64::tlbiIpaS2(), gem5::TlbiOp64::tlbiRipaS2(), gem5::TlbiOp64::tlbiRva(), gem5::TlbiOp64::tlbiVa(), gem5::TlbiOp64::tlbiVaa(), gem5::AddrRange::to_string(), gem5::compression::Base::toChunks(), gem5::AMDGPUVM::GARTTranslationGen::translate(), gem5::SparcISA::TLB::translateFunctional(), gem5::X86ISA::GpuTLB::translateInt(), gem5::X86ISA::TLB::translateInt(), gem5::ArmISA::MMU::translateMmuOff(), gem5::igbreg::txd_op::tse(), gem5::igbreg::txd_op::tucse(), gem5::igbreg::txd_op::tucso(), gem5::igbreg::txd_op::tucss(), gem5::igbreg::txd_op::txsm(), gem5::ArmISA::TableWalker::LongDescriptor::type(), gem5::RiscvISA::unboxF16(), gem5::RiscvISA::unboxF32(), gem5::PciDevice::unserialize(), gem5::ArmISA::unsignedRecipEstimate(), gem5::ArmISA::unsignedRSqrtEstimate(), gem5::GicV2::updateIntState(), gem5::ArmISA::MMU::CachedState::updateMiscReg(), gem5::ArmISA::SelfDebug::updateOSLock(), gem5::ArmISA::TableWalker::LongDescriptor::user(), gem5::ArmISA::TableWalker::LongDescriptor::userTable(), gem5::igbreg::txd_op::utcmd(), gem5::SparcISA::TteTag::va(), gem5::SparcISA::PageTableEntry::valid(), gem5::SparcISA::TteTag::valid(), gem5::ArmISA::vcvtFpFpH(), gem5::ArmISA::vcvtFpHFp(), gem5::ArmISA::vfp_modified_imm(), gem5::Gicv3CPUInterface::virtualIncrementEOICount(), gem5::igbreg::txd_op::vle(), gem5::RiscvISA::vtype_regs_per_group(), gem5::RiscvISA::vtype_SEW(), gem5::RiscvISA::vtype_VLMAX(), gem5::RiscvISA::vtype_vlmul(), gem5::ArmISA::TableWalker::walkAddresses(), gem5::VegaISA::wholeQuadMode(), gem5::VegaISA::Inst_VOP3P::word(), gem5::SparcISA::PageTableEntry::writable(), gem5::CopyEngine::write(), gem5::FVPBasePwrCtrl::write(), gem5::Gicv3Distributor::write(), gem5::Gicv3Redistributor::write(), gem5::Sp805::write(), gem5::X86ISA::I8042::write(), gem5::X86ISA::I8259::write(), gem5::Intel8254Timer::writeControl(), gem5::GicV2::writeDistributor(), gem5::Plic::writeEnable(), gem5::Iob::writeIob(), gem5::Iob::writeJBus(), gem5::AMDGPUInterruptHandler::writeMMIO(), gem5::AMDGPUVM::writeMMIO(), gem5::SDMAEngine::writeMMIO(), gem5::Plic::writePriority(), gem5::X86ISA::I82094AA::writeReg(), gem5::ArmISA::TableWalker::L1Descriptor::xn(), gem5::ArmISA::TableWalker::L2Descriptor::xn(), gem5::ArmISA::TableWalker::LongDescriptor::xn(), and gem5::ArmISA::TableWalker::LongDescriptor::xnTable().

clz32()

int gem5::clz32 ( uint32_t value )

inlineconstexpr

Count leading zeros in a 32-bit value.

Parameters

An	input value

Returns

The number of trailing zeros or 32 if the value is zero.

Definition at line 501 of file bitfield.hh.

Referenced by TEST(), and TEST().

clz64()

int gem5::clz64 ( uint64_t value )

inlineconstexpr

Count leading zeros in a 64-bit value.

Parameters

An	input value

Returns

The number of trailing zeros or 64 if the value is zero.

Definition at line 515 of file bitfield.hh.

Referenced by TEST(), TEST(), and TEST().

ctz32()

int gem5::ctz32 ( uint32_t value )

constexpr

Count trailing zeros in a 32-bit value.

Parameters

An	input value

Returns

The number of trailing zeros or 32 if the value is zero.

Definition at line 473 of file bitfield.hh.

Referenced by gem5::Gicv3CPUInterface::highestActiveGroup(), gem5::Gicv3CPUInterface::highestActivePriority(), gem5::log2i(), gem5::LupioPIC::lupioPicRead(), TEST(), TEST(), gem5::Gicv3CPUInterface::virtualDropPriority(), and gem5::Gicv3CPUInterface::virtualHighestActivePriority().

ctz64()

int gem5::ctz64 ( uint64_t value )

constexpr

Count trailing zeros in a 64-bit value.

Parameters

An	input value

Returns

The number of trailing zeros or 64 if the value is zero.

Definition at line 487 of file bitfield.hh.

Referenced by gem5::AddrRange::addIntlvBits(), gem5::AddrRange::granularity(), gem5::RiscvISA::PMP::pmpDecodeNapot(), gem5::AddrRange::removeIntlvBits(), TEST(), TEST(), TEST(), and gem5::AddrRange::to_string().

findLsbSet()

int gem5::findLsbSet ( uint64_t val )

constexpr

Returns the bit position of the LSB that is set in the input That function will either use a builtin that exploit a "count trailing zeros" instruction or use fall back method, findLsbSetFallback.

Definition at line 369 of file bitfield.hh.

References gem5::X86ISA::val.

Referenced by gem5::VegaISA::Inst_VOP1__V_READFIRSTLANE_B32::execute(), gem5::VegaISA::findFirstOne(), gem5::VegaISA::findFirstZero(), gem5::findLsbSet(), gem5::PowerISA::IntLogicOp::findTrailingZeros(), gem5::PowerISA::IntLogicOp::findTrailingZeros(), gem5::WalkCache::pickSetIdx(), gem5::UFSHostDevice::requestHandler(), TEST(), TEST(), and TEST().

findMsbSet()

int gem5::findMsbSet ( uint64_t val )

constexpr

Returns the bit position of the MSB that is set in the input.

Definition at line 279 of file bitfield.hh.

References gem5::bits(), and gem5::X86ISA::val.

Referenced by gem5::BaseSemihosting::calcTickShift(), gem5::CopyEngine::CopyEngine(), gem5::VegaISA::countZeroBitsMsb(), gem5::HDLcd::createDmaEngine(), gem5::X86ISA::X86StaticInst::divideStep(), gem5::SparcISA::TLB::doMmuRegRead(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::VegaISA::findFirstOneMsb(), gem5::PowerISA::IntLogicOp::findLeadingZeros(), gem5::PowerISA::IntLogicOp::findLeadingZeros(), gem5::X86ISA::Interrupts::findRegArrayMSB(), gem5::X86ISA::I8259::getVector(), gem5::X86ISA::I8259::handleEOI(), gem5::KernelWorkload::KernelWorkload(), TEST(), TEST(), TEST(), and gem5::X86ISA::I8259::write().

insertBits() [1/2]

template<class T , class B >

T gem5::insertBits ( T val, unsigned bit, B bit_val )

constexpr

Overloaded for access to only one bit in value.

Definition at line 201 of file bitfield.hh.

References gem5::insertBits(), and gem5::X86ISA::val.

insertBits() [2/2]

template<class T , class B >

T gem5::insertBits ( T val, unsigned first, unsigned last, B bit_val )

constexpr

Returns val with bits first to last set to the LSBs of bit_val.

E.g.: first: 7 last: 4 val: 0xFFFF bit_val: 0x0000 returned: 0xFF0F

Definition at line 185 of file bitfield.hh.

References gem5::ArmISA::mask, and gem5::X86ISA::val.

Referenced by gem5::AddrRange::addIntlvBits(), gem5::GenericTimerMem::counterCtrlWrite(), gem5::SkewedAssociative::dehash(), gem5::MipsISA::dspDpaq(), gem5::MipsISA::dspDpsq(), gem5::MipsISA::dspExtp(), gem5::MipsISA::dspExtpd(), gem5::MipsISA::dspExtr(), gem5::MipsISA::dspMaq(), gem5::MipsISA::dspMulsaq(), gem5::MipsISA::dspPrecrq(), gem5::MipsISA::dspPrecrqu(), gem5::RiscvISA::fsgnj16(), gem5::RiscvISA::fsgnj32(), gem5::RiscvISA::fsgnj64(), gem5::SkewedAssociative::hash(), gem5::insertBits(), gem5::GenericSyscallABI32::mergeRegs(), gem5::X86ISA::ISA::readMiscReg(), gem5::AddrRange::removeIntlvBits(), gem5::replaceBits(), gem5::replaceBits(), gem5::VegaISA::sdwaInstDstImpl_helper(), gem5::fastmodel::CortexA76TC::setCCRegFlat(), gem5::fastmodel::CortexR52TC::setCCRegFlat(), gem5::SDMAEngine::setGfxBaseHi(), gem5::SDMAEngine::setGfxBaseLo(), gem5::SDMAEngine::setGfxDoorbellHi(), gem5::SDMAEngine::setGfxDoorbellLo(), gem5::SDMAEngine::setGfxDoorbellOffsetHi(), gem5::SDMAEngine::setGfxDoorbellOffsetLo(), gem5::SDMAEngine::setGfxRptrHi(), gem5::SDMAEngine::setGfxRptrLo(), gem5::SDMAEngine::setGfxWptrHi(), gem5::SDMAEngine::setGfxWptrLo(), gem5::SDMAEngine::setPageBaseHi(), gem5::SDMAEngine::setPageBaseLo(), gem5::SDMAEngine::setPageDoorbellHi(), gem5::SDMAEngine::setPageDoorbellLo(), gem5::SDMAEngine::setPageDoorbellOffsetHi(), gem5::SDMAEngine::setPageDoorbellOffsetLo(), gem5::SDMAEngine::setPageRptrHi(), gem5::SDMAEngine::setPageRptrLo(), gem5::SDMAEngine::setPageWptrHi(), gem5::SDMAEngine::setPageWptrLo(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), TEST(), gem5::GenericTimerMem::timerCtrlWrite(), gem5::GenericTimerFrame::timerWrite(), gem5::Gicv3CPUInterface::virtualIncrementEOICount(), gem5::GenericWatchdog::writeControl(), gem5::AMDGPUNbio::writeMMIO(), and gem5::AMDGPUVM::writeMMIO().

mask() [1/2]

uint64_t gem5::mask ( unsigned first, unsigned last )

constexpr

Definition at line 115 of file bitfield.hh.

References gem5::mbits().

mask() [2/2]

uint64_t gem5::mask ( unsigned nbits )

constexpr

Generate a 64-bit mask of 'nbits' 1s, right justified.

If a number of bits greater than 64 is given, it is truncated to 64.

Parameters

nbits

The number of bits set in the mask.

Definition at line 66 of file bitfield.hh.

mbits()

template<class T >

T gem5::mbits ( T val, unsigned first, unsigned last )

constexpr

Mask off the given bits in place like bits() but without shifting.

msb = 63, lsb = 0

Definition at line 106 of file bitfield.hh.

References gem5::ArmISA::mask, and gem5::X86ISA::val.

Referenced by gem5::IGbE::TxDescCache::actionAfterWb(), gem5::ruby::AddressProfiler::addTraceSample(), gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >::defaultPartialReader(), gem5::SkewedAssociative::dehash(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::X86ISA::EmuLinux::event(), gem5::GenericTimer::CoreTimers::EventStream::eventTargetValue(), gem5::RiscvISA::ISA::getFaultHandlerAddr(), gem5::SparcISA::TLB::GetTsbPtr(), gem5::ArmISA::TableWalker::L1Descriptor::l2Addr(), gem5::ruby::makeLineAddress(), gem5::SparcISA::TLB::MakeTsbPtr(), gem5::ItsCommand::mapd(), gem5::mask(), gem5::ruby::maskLowOrderBits(), gem5::ArmISA::V7LPageTableOps::nextLevelPointer(), gem5::ArmISA::V8PageTableOps16k::nextLevelPointer(), gem5::ArmISA::V8PageTableOps4k::nextLevelPointer(), gem5::ArmISA::V8PageTableOps64k::nextLevelPointer(), gem5::ArmISA::TableWalker::LongDescriptor::nextTableAddr(), gem5::ArmISA::TableWalker::L1Descriptor::paddr(), gem5::ArmISA::TableWalker::L1Descriptor::paddr(), gem5::ArmISA::TableWalker::L2Descriptor::paddr(), gem5::ArmISA::TableWalker::LongDescriptor::paddr(), gem5::SparcISA::PageTableEntry::paddr(), gem5::Gicv3Its::pageAddress(), gem5::ruby::RubyPrefetcher::pageAddress(), gem5::TlbiOp::performTlbi(), gem5::RiscvISA::PMP::pmpDecodeNapot(), gem5::SparcISA::PageTableEntry::populate(), gem5::ArmISA::TableWalker::processWalk(), gem5::ArmISA::TableWalker::processWalkLPAE(), gem5::GicV2::readDistributor(), gem5::RiscvISA::ISA::readMiscReg(), gem5::SparcISA::ISA::readMiscReg(), gem5::SparcISA::ISA::setMiscReg(), gem5::X86ISA::Walker::WalkerState::stepWalk(), TEST(), TEST(), gem5::SparcISA::TlbEntry::TlbEntry(), gem5::X86ISA::GpuTLB::translateInt(), gem5::X86ISA::TLB::translateInt(), gem5::ArmISA::TableWalker::walkAddresses(), and gem5::SparcISA::TLB::writeTagAccess().

popCount()

int gem5::popCount ( uint64_t val )

constexpr

Returns the number of set ones in the provided value.

PD algorithm from http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel

Definition at line 415 of file bitfield.hh.

References gem5::RiscvISA::sum, and gem5::X86ISA::val.

Referenced by gem5::AddrRange::addIntlvBits(), gem5::AddrRange::contains(), gem5::VegaISA::countZeroBits(), gem5::VegaISA::Inst_SOP1__S_BCNT1_I32_B32::execute(), gem5::VegaISA::Inst_SOP1__S_BCNT1_I32_B64::execute(), gem5::VegaISA::Inst_VOP3__V_BCNT_U32_B32::execute(), gem5::VegaISA::Inst_VOP3__V_MBCNT_HI_U32_B32::execute(), gem5::VegaISA::Inst_VOP3__V_MBCNT_LO_U32_B32::execute(), gem5::Dueler::setSample(), TEST(), TEST(), TEST(), and TEST().

replaceBits() [1/2]

template<class T , class B >

void gem5::replaceBits ( T & val, unsigned bit, B bit_val )

constexpr

Overloaded function to allow to access only 1 bit.

Definition at line 228 of file bitfield.hh.

References gem5::insertBits(), and gem5::X86ISA::val.

replaceBits() [2/2]

template<class T , class B >

void gem5::replaceBits ( T & val, unsigned first, unsigned last, B bit_val )

constexpr

A convenience function to replace bits first to last of val with bit_val in place.

It is functionally equivalent to insertBits.

Note

"first" is the MSB and "last" is the LSB. "first" >= "last"

Definition at line 216 of file bitfield.hh.

References gem5::insertBits(), and gem5::X86ISA::val.

Referenced by gem5::scmi::BaseProtocol::attributes(), gem5::VegaISA::Inst_DS__DS_READ_U16_D16::completeAcc(), gem5::VegaISA::Inst_DS__DS_READ_U16_D16_HI::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::completeAcc(), gem5::MipsISA::ISA::configCP(), gem5::FetchUnit::FetchBufDesc::decodeSplitInst(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::X86ISA::EndBitUnion(), gem5::VegaISA::Inst_VOP3__V_CVT_F16_F32::execute(), gem5::VegaISA::Inst_VOP3__V_CVT_PK_FP8_F32::execute(), gem5::compression::Base::fromChunks(), gem5::GenericTimerMem::GenericTimerMem(), gem5::DramGen::genStartAddr(), gem5::HybridGen::genStartAddr(), gem5::NvmGen::genStartAddr(), gem5::ArmISA::getMPIDR(), gem5::DramGen::getNextPacket(), gem5::DramRotGen::getNextPacket(), gem5::HybridGen::getNextPacket(), gem5::NvmGen::getNextPacket(), gem5::X86ISA::intelmp::IntAssignment::IntAssignment(), gem5::ArmISA::MacroMemOp::MacroMemOp(), gem5::memory::DRAMInterface::minBankPrep(), gem5::RiscvISA::Decoder::moreBytes(), gem5::X86ISA::intelmp::Processor::Processor(), gem5::o3::DynInst::readySrcIdx(), gem5::ArmISA::HTMCheckpoint::restore(), gem5::VegaISA::ScalarOperand< DataType, Const, NumDwords >::setBit(), gem5::igbreg::txd_op::setDd(), gem5::X86ISA::I8237::setMaskBit(), gem5::X86ISA::I8237::setRequestBit(), gem5::bitfield_backend::Signed< Storage, first, last >::setter(), gem5::bitfield_backend::Unsigned< Storage, first, last >::setter(), gem5::X86ISA::SegDescriptorLimit::setter(), gem5::IdeDisk::startCommand(), gem5::ArmISA::vcvtFpFpH(), gem5::ArmISA::vcvtFpHFp(), and gem5::VegaISA::ScalarOperand< DataType, Const, NumDwords >::write().

reverseBits()

template<class T >

std::enable_if_t< std::is_integral_v< T >, T > gem5::reverseBits	(	T	val,
		size_t	size = sizeof(T) )

Takes a value and returns the bit reversed version.

E.g.: val: 0x0303 returned: 0xc0c0

val: 0x0303 size: 1 returned: 0x03c0

Algorithm from: http://graphics.stanford.edu/~seander/bithacks.html#ReverseBitsByLookupTable

Parameters

val	variable length value
size	number of bytes to mirror

Returns

reversed value

Definition at line 255 of file bitfield.hh.

References gem5::ArmISA::mask, gem5::output(), gem5::reverseBitsLookUpTable, and gem5::X86ISA::val.

Referenced by gem5::crc32(), gem5::VegaISA::Inst_SOP1__S_BREV_B32::execute(), gem5::VegaISA::Inst_SOP1__S_BREV_B64::execute(), gem5::VegaISA::Inst_VOP1__V_BFREV_B32::execute(), gem5::VegaISA::Inst_VOP3__V_BFREV_B32::execute(), TEST(), and TEST().

sext() [1/2]

template<int N>

uint64_t gem5::sext ( uint64_t val )

constexpr

Sign-extend an N-bit value to 64 bits.

Assumes all bits past the sign are currently zero. For true sign extension regardless of the value of the sign bit, see szext.

Definition at line 129 of file bitfield.hh.

References gem5::bits(), and gem5::X86ISA::val.

Referenced by gem5::RiscvLinux32::archClone(), gem5::VegaISA::Inst_FLAT::calcAddr(), gem5::VegaISA::Inst_DS__DS_READ_I8::completeAcc(), gem5::compression::DictionaryCompressor< T >::SignExtendedPattern< N >::decompress(), gem5::X86ISA::Decoder::doDisplacementState(), gem5::X86ISA::Decoder::doImmediateState(), gem5::VegaISA::Inst_SOPK__S_ADDK_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMOVK_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_EQ_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_GE_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_GT_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LE_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LG_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LT_I32::execute(), gem5::VegaISA::Inst_SOPK__S_MOVK_I32::execute(), gem5::VegaISA::Inst_SOPK__S_MULK_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP3__V_MAD_I32_I24::execute(), gem5::VegaISA::Inst_VOP3__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP3__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT2_I32_I16::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT4_I32_I8::execute(), gem5::VegaISA::Inst_VOP3P__V_DOT8_I32_I4::execute(), gem5::guest_abi::Argument< ArmSemihosting::Abi32, Arg, typename std::enable_if_t<(std::is_integral_v< Arg >||std::is_same< Arg, pseudo_inst::GuestAddr >::value)> >::get(), gem5::guest_abi::Argument< RiscvSemihosting::Abi32, Arg, typename std::enable_if_t< std::is_integral_v< Arg > > >::get(), gem5::bitfield_backend::Signed< Storage, first, last >::getter(), gem5::RiscvISA::getVflmul(), gem5::ArmISA::TLBIMVA::lookupGen(), gem5::ArmISA::TLBIMVAA::lookupGen(), gem5::ArmISA::TableWalker::processWalkLPAE(), gem5::RiscvISA::Walker::WalkerState::recvPacket(), gem5::VegaISA::sdwaInstSrcImpl_helper(), gem5::ArchTimer::setTimerValue(), gem5::RiscvISA::Walker::WalkerState::setupWalk(), gem5::ArmISA::TLBIRange::startAddress(), gem5::RiscvISA::Walker::startWalkWrapper(), gem5::guest_abi::Result< Aapcs32, Integer, typename std::enable_if_t< std::is_integral_v< Integer > &&(sizeof(Integer)< sizeof(uint32_t))> >::store(), gem5::guest_abi::Result< RiscvISA::SEWorkload::SyscallABI32, SyscallReturn >::store(), TEST(), TEST(), TEST(), TEST(), gem5::RiscvISA::vtype_regs_per_group(), gem5::RiscvISA::vtype_VLMAX(), and gem5::RiscvISA::vtype_vlmul().

sext() [2/2]

uint64_t gem5::sext ( uint64_t val, int N )

constexpr

Sign-extend an N-bit value to 64 bits.

Assumes all bits past the sign are currently zero. For true sign extension regardless of the value of the sign bit, see szext.

Definition at line 145 of file bitfield.hh.

References gem5::bits(), and gem5::X86ISA::val.

szext()

template<int N>

uint64_t gem5::szext ( uint64_t val )

constexpr

Sign-extend an N-bit value to 64 bits.

Zero any bits past the sign if necessary.

Definition at line 161 of file bitfield.hh.

References gem5::bits(), gem5::ArmISA::mask, and gem5::X86ISA::val.

Referenced by gem5::compression::FPC::SignExtendedTwoHalfwords::decompress(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::compression::DictionaryCompressor< T >::SignExtendedPattern< N >::isPattern(), gem5::compression::FPC::SignExtendedTwoHalfwords::isPattern(), TEST(), TEST(), TEST(), and TEST().