gem5 v24.0.0.0
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cpuid.hh
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1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ARCH_X86_CPUID_HH__
30#define __ARCH_X86_CPUID_HH__
31
32#include <unordered_map>
33
34#include "base/types.hh"
35#include "params/X86ISA.hh"
36
37namespace gem5
38{
39
40class ThreadContext;
41
42namespace X86ISA
43{
44
58
72
73constexpr int nameStringSize = 48;
74
76{
77 uint64_t rax;
78 uint64_t rbx;
79 uint64_t rcx;
80 uint64_t rdx;
81
82 // These are not in alphebetical order on purpose. The order reflects
83 // how the CPUID orders the registers when it returns results.
84 CpuidResult(uint64_t _rax, uint64_t _rbx,
85 uint64_t _rdx, uint64_t _rcx) :
86 rax(_rax), rbx(_rbx), rcx(_rcx), rdx(_rdx)
87 {}
88
90 {}
91};
92
94{
95 public:
96 X86CPUID(const std::string& vendor, const std::string& name);
97
98 void addStandardFunc(uint32_t func, std::vector<uint32_t> values);
99 void addExtendedFunc(uint32_t func, std::vector<uint32_t> values);
100
101 bool doCpuid(ThreadContext * tc, uint32_t function,
102 uint32_t index, CpuidResult &result);
103 bool hasSignificantIndex(uint32_t function);
104
105 private:
106 const std::string vendorString;
107 const std::string nameString;
108 std::unordered_map<uint32_t, std::vector<uint32_t>> capabilities;
109
110 uint64_t stringToRegister(const char *str);
111};
112
113} // namespace X86ISA
114} // namespace gem5
115
116#endif
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
ThreadContext is the external interface to all thread state for anything outside of the CPU.
bool hasSignificantIndex(uint32_t function)
Definition cpuid.cc:147
std::unordered_map< uint32_t, std::vector< uint32_t > > capabilities
Definition cpuid.hh:108
void addStandardFunc(uint32_t func, std::vector< uint32_t > values)
Definition cpuid.cc:50
void addExtendedFunc(uint32_t func, std::vector< uint32_t > values)
Definition cpuid.cc:56
const std::string nameString
Definition cpuid.hh:107
bool doCpuid(ThreadContext *tc, uint32_t function, uint32_t index, CpuidResult &result)
Definition cpuid.cc:64
const std::string vendorString
Definition cpuid.hh:106
uint64_t stringToRegister(const char *str)
Definition cpuid.cc:134
X86CPUID(const std::string &vendor, const std::string &name)
Definition cpuid.cc:42
STL vector class.
Definition stl.hh:37
ExtendedCpuidFunctions
Definition cpuid.hh:60
@ NameString3
Definition cpuid.hh:65
@ LongModeAddressSize
Definition cpuid.hh:69
@ VendorAndLargestExtFunc
Definition cpuid.hh:61
@ NameString1
Definition cpuid.hh:63
@ NumExtendedCpuidFuncs
Definition cpuid.hh:70
@ NameString2
Definition cpuid.hh:64
@ FamilyModelSteppingBrandFeatures
Definition cpuid.hh:62
@ L1CacheAndTLB
Definition cpuid.hh:66
@ L2L3CacheAndL2TLB
Definition cpuid.hh:67
StandardCpuidFunction
Definition cpuid.hh:46
@ CacheAndTLB
Definition cpuid.hh:49
@ FamilyModelStepping
Definition cpuid.hh:48
@ ThermalPowerMgmt
Definition cpuid.hh:53
@ ExtendedFeatures
Definition cpuid.hh:54
@ CacheParams
Definition cpuid.hh:51
@ VendorAndLargestStdFunc
Definition cpuid.hh:47
@ ExtendedState
Definition cpuid.hh:55
@ NumStandardCpuidFuncs
Definition cpuid.hh:56
@ SerialNumber
Definition cpuid.hh:50
@ MonitorMwait
Definition cpuid.hh:52
constexpr int nameStringSize
Definition cpuid.hh:73
Bitfield< 5, 3 > index
Definition types.hh:98
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
CpuidResult(uint64_t _rax, uint64_t _rbx, uint64_t _rdx, uint64_t _rcx)
Definition cpuid.hh:84
const std::string & name()
Definition trace.cc:48

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