gem5  v22.1.0.0
cpuid.hh
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28 
29 #ifndef __ARCH_X86_CPUID_HH__
30 #define __ARCH_X86_CPUID_HH__
31 
32 #include "base/types.hh"
33 
34 namespace gem5
35 {
36 
37 class ThreadContext;
38 
39 namespace X86ISA
40 {
41  struct CpuidResult
42  {
43  uint64_t rax;
44  uint64_t rbx;
45  uint64_t rcx;
46  uint64_t rdx;
47 
48  // These are not in alphebetical order on purpose. The order reflects
49  // how the CPUID orders the registers when it returns results.
50  CpuidResult(uint64_t _rax, uint64_t _rbx,
51  uint64_t _rdx, uint64_t _rcx) :
52  rax(_rax), rbx(_rbx), rcx(_rcx), rdx(_rdx)
53  {}
54 
56  {}
57  };
58 
59  uint64_t stringToRegister(const char *str);
60 
61  bool doCpuid(ThreadContext * tc, uint32_t function,
62  uint32_t index, CpuidResult &result);
63 
64 } // namespace X86ISA
65 } // namespace gem5
66 
67 #endif
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
ThreadContext is the external interface to all thread state for anything outside of the CPU.
uint64_t stringToRegister(const char *str)
Definition: cpuid.cc:80
bool doCpuid(ThreadContext *tc, uint32_t function, uint32_t index, CpuidResult &result)
Definition: cpuid.cc:91
Bitfield< 5, 3 > index
Definition: types.hh:98
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
CpuidResult(uint64_t _rax, uint64_t _rbx, uint64_t _rdx, uint64_t _rcx)
Definition: cpuid.hh:50

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