gem5  v21.2.0.0
dram_gen.hh
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37 
44 #ifndef __CPU_TRAFFIC_GEN_DRAM_GEN_HH__
45 #define __CPU_TRAFFIC_GEN_DRAM_GEN_HH__
46 
47 #include "base/bitfield.hh"
48 #include "base/intmath.hh"
49 #include "enums/AddrMap.hh"
50 #include "mem/packet.hh"
51 #include "random_gen.hh"
52 
53 namespace gem5
54 {
55 
61 class DramGen : public RandomGen
62 {
63 
64  public:
65 
88  DramGen(SimObject &obj,
89  RequestorID requestor_id, Tick _duration,
90  Addr start_addr, Addr end_addr,
91  Addr _blocksize, Addr cacheline_size,
92  Tick min_period, Tick max_period,
93  uint8_t read_percent, Addr data_limit,
94  unsigned int num_seq_pkts, unsigned int page_size,
95  unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util,
96  enums::AddrMap addr_mapping,
97  unsigned int nbr_of_ranks);
98 
100 
107  void genStartAddr(unsigned int new_bank , unsigned int new_rank);
108 
109  protected:
110 
112  const unsigned int numSeqPkts;
113 
115  unsigned int countNumSeqPkts;
116 
119 
121  bool isRead;
122 
124  const unsigned int pageSize;
125 
127  const unsigned int pageBits;
128 
130  const unsigned int bankBits;
131 
133  const unsigned int blockBits;
134 
136  const unsigned int nbrOfBanksDRAM;
137 
139  const unsigned int nbrOfBanksUtil;
140 
142  enums::AddrMap addrMapping;
143 
145  const unsigned int rankBits;
146 
148  const unsigned int nbrOfRanks;
149 
150 };
151 
152 } // namespace gem5
153 
154 #endif
gem5::RandomGen
The random generator is similar to the linear one, but does not generate sequential addresses.
Definition: random_gen.hh:60
gem5::DramGen::pageBits
const unsigned int pageBits
Number of page bits in DRAM address.
Definition: dram_gen.hh:127
gem5::DramGen::addr
Addr addr
Address of request.
Definition: dram_gen.hh:118
gem5::DramGen::bankBits
const unsigned int bankBits
Number of bank bits in DRAM address.
Definition: dram_gen.hh:130
gem5::DramGen::numSeqPkts
const unsigned int numSeqPkts
Number of sequential DRAM packets to be generated per cpu request.
Definition: dram_gen.hh:112
gem5::DramGen::pageSize
const unsigned int pageSize
Page size of DRAM.
Definition: dram_gen.hh:124
gem5::DramGen::nbrOfBanksDRAM
const unsigned int nbrOfBanksDRAM
Number of banks in DRAM.
Definition: dram_gen.hh:136
packet.hh
bitfield.hh
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::DramGen::countNumSeqPkts
unsigned int countNumSeqPkts
Track number of sequential packets generated for a request
Definition: dram_gen.hh:115
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::DramGen::nbrOfBanksUtil
const unsigned int nbrOfBanksUtil
Number of banks to be utilized for a given configuration.
Definition: dram_gen.hh:139
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
random_gen.hh
gem5::DramGen::addrMapping
enums::AddrMap addrMapping
Address mapping to be used.
Definition: dram_gen.hh:142
gem5::DramGen::genStartAddr
void genStartAddr(unsigned int new_bank, unsigned int new_rank)
Insert bank, rank, and column bits into packed address to create address for 1st command in a series.
Definition: dram_gen.cc:146
gem5::DramGen::DramGen
DramGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks)
Create a DRAM address sequence generator.
Definition: dram_gen.cc:50
gem5::DramGen::isRead
bool isRead
Remember type of requests to be generated in series.
Definition: dram_gen.hh:121
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
gem5::DramGen::getNextPacket
PacketPtr getNextPacket()
Get the next generated packet.
Definition: dram_gen.cc:81
intmath.hh
gem5::DramGen
DRAM specific generator is for issuing request with variable page hit length and bank utilization.
Definition: dram_gen.hh:61
gem5::DramGen::nbrOfRanks
const unsigned int nbrOfRanks
Number of ranks to be utilized for a given configuration.
Definition: dram_gen.hh:148
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::DramGen::rankBits
const unsigned int rankBits
Number of rank bits in DRAM address.
Definition: dram_gen.hh:145
gem5::DramGen::blockBits
const unsigned int blockBits
Number of block bits in DRAM address.
Definition: dram_gen.hh:133

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