gem5 v24.0.0.0
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gem5_to_tlm.hh
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1/*
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27 * Copyright (c) 2015, University of Kaiserslautern
28 * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
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31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions are
33 * met:
34 *
35 * 1. Redistributions of source code must retain the above copyright notice,
36 * this list of conditions and the following disclaimer.
37 *
38 * 2. Redistributions in binary form must reproduce the above copyright
39 * notice, this list of conditions and the following disclaimer in the
40 * documentation and/or other materials provided with the distribution.
41 *
42 * 3. Neither the name of the copyright holder nor the names of its
43 * contributors may be used to endorse or promote products derived from
44 * this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
47 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
50 * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
51 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
53 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
54 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
55 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
56 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57 */
58
59#ifndef __SYSTEMC_TLM_BRIDGE_GEM5_TO_TLM_HH__
60#define __SYSTEMC_TLM_BRIDGE_GEM5_TO_TLM_HH__
61
62#include <functional>
63#include <string>
64#include <unordered_map>
65
66#include "mem/backdoor.hh"
67#include "mem/port.hh"
68#include "params/Gem5ToTlmBridgeBase.hh"
69#include "sim/system.hh"
75
76namespace sc_gem5
77{
78
80 std::function<void(gem5::PacketPtr pkt, tlm::tlm_generic_payload &trans)>;
81
83
85
87{
88 protected:
90};
91
92template <unsigned int BITWIDTH>
94{
95 private:
97 {
98 protected:
100
102 getAddrRanges() const override
103 {
104 return bridge.getAddrRanges();
105 }
108 {
109 return bridge.recvAtomic(pkt);
110 }
113 gem5::MemBackdoorPtr &backdoor) override
114 {
115 return bridge.recvAtomicBackdoor(pkt, backdoor);
116 }
117 void
119 {
120 return bridge.recvFunctional(pkt);
121 }
122 void
124 gem5::MemBackdoorPtr &backdoor) override
125 {
126 bridge.recvMemBackdoorReq(req, backdoor);
127 }
128 bool
130 {
131 return bridge.recvTimingReq(pkt);
132 }
133 bool
135 {
136 return bridge.tryTiming(pkt);
137 }
138 bool
140 {
141 return bridge.recvTimingSnoopResp(pkt);
142 }
143 void recvRespRetry() override { bridge.recvRespRetry(); }
144
145 public:
146 BridgeResponsePort(const std::string &name_,
147 Gem5ToTlmBridge<BITWIDTH> &bridge_) :
148 ResponsePort(name_), bridge(bridge_)
149 {}
150 };
151
156
158
164
170
176
181 std::unordered_map<tlm::tlm_generic_payload *, gem5::PacketPtr> packetMap;
182
184
185 protected:
186 void pec(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase);
187
190
191 // The gem5 port interface.
194 gem5::MemBackdoorPtr &backdoor);
195 void recvFunctional(gem5::PacketPtr packet);
197 gem5::MemBackdoorPtr &backdoor);
198 bool recvTimingReq(gem5::PacketPtr packet);
199 bool tryTiming(gem5::PacketPtr packet);
201 void recvRespRetry();
204
205 // The TLM initiator interface.
207 tlm::tlm_phase &phase,
210 sc_dt::uint64 start_range, sc_dt::uint64 end_range);
211
212 public:
213 gem5::Port &gem5_getPort(const std::string &if_name, int idx=-1) override;
214
215 typedef gem5::Gem5ToTlmBridgeBaseParams Params;
217
220 {
221 return socket;
222 }
223
224 void before_end_of_elaboration() override;
225};
226
227} // namespace sc_gem5
228
229#endif // __SYSTEMC_TLM_BRIDGE_GEM5_TO_TLM_HH__
The AddrRangeMap uses an STL map to implement an interval tree for address decoding.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
Ports are used to interface objects to each other.
Definition port.hh:62
A ResponsePort is a specialization of a port.
Definition port.hh:349
ResponsePort(const std::string &name, SimObject *_owner, PortID id=InvalidPortID)
Response port.
Definition port.cc:218
bool recvTimingSnoopResp(gem5::PacketPtr pkt) override
Receive a timing snoop response from the peer.
gem5::Tick recvAtomic(gem5::PacketPtr pkt) override
Receive an atomic request packet from the peer.
void recvMemBackdoorReq(const gem5::MemBackdoorReq &req, gem5::MemBackdoorPtr &backdoor) override
Receive a request for a back door to a range of memory.
gem5::AddrRangeList getAddrRanges() const override
Get a list of the non-overlapping address ranges the owner is responsible for.
Gem5ToTlmBridge< BITWIDTH > & bridge
bool recvTimingReq(gem5::PacketPtr pkt) override
Receive a timing request from the peer.
bool tryTiming(gem5::PacketPtr pkt) override
Availability request from the peer.
gem5::Tick recvAtomicBackdoor(gem5::PacketPtr pkt, gem5::MemBackdoorPtr &backdoor) override
Receive an atomic request packet from the peer, and optionally provide a backdoor to the data being a...
void recvFunctional(gem5::PacketPtr pkt) override
Receive a functional request packet from the peer.
void recvRespRetry() override
Called by the peer if sendTimingResp was called on this protocol (causing recvTimingResp to be called...
BridgeResponsePort(const std::string &name_, Gem5ToTlmBridge< BITWIDTH > &bridge_)
bool needToSendRequestRetry
Did another gem5 request arrive while currently blocked? This variable is needed when a retry should ...
std::unordered_map< tlm::tlm_generic_payload *, gem5::PacketPtr > packetMap
A map to record the association between payload and packet.
void before_end_of_elaboration() override
void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, sc_dt::uint64 end_range)
void pec(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase)
tlm::tlm_generic_payload * blockingRequest
A transaction after BEGIN_REQ has been sent but before END_REQ, which is blocking the request channel...
void recvMemBackdoorReq(const gem5::MemBackdoorReq &req, gem5::MemBackdoorPtr &backdoor)
gem5::AddrRangeList addrRanges
tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &t)
tlm_utils::simple_initiator_socket< Gem5ToTlmBridge< BITWIDTH >, BITWIDTH > & getSocket()
gem5::MemBackdoorPtr getBackdoor(tlm::tlm_generic_payload &trans)
gem5::Gem5ToTlmBridgeBaseParams Params
tlm_utils::simple_initiator_socket< Gem5ToTlmBridge< BITWIDTH >, BITWIDTH > socket
Gem5ToTlmBridge(const Params &p, const sc_core::sc_module_name &mn)
gem5::AddrRangeMap< gem5::MemBackdoorPtr > backdoorMap
void recvFunctionalSnoop(gem5::PacketPtr packet)
gem5::AddrRangeList getAddrRanges() const
gem5::Tick recvAtomic(gem5::PacketPtr packet)
gem5::Tick recvAtomicBackdoor(gem5::PacketPtr pkt, gem5::MemBackdoorPtr &backdoor)
bool tryTiming(gem5::PacketPtr packet)
bool recvTimingSnoopResp(gem5::PacketPtr packet)
gem5::Port & gem5_getPort(const std::string &if_name, int idx=-1) override
bool recvTimingReq(gem5::PacketPtr packet)
sc_gem5::TlmInitiatorWrapper< BITWIDTH > wrapper
void recvFunctional(gem5::PacketPtr packet)
tlm::tlm_generic_payload * blockingResponse
A response which has been asked to retry by gem5 and so is blocking the response channel.
BridgeResponsePort bridgeResponsePort
Port Object Declaration.
uint64_t Tick
Tick count type.
Definition types.hh:58
uint64_t uint64
Definition sc_nbdefs.hh:172
std::function< void(gem5::PacketPtr pkt, tlm::tlm_generic_payload &trans)> PacketToPayloadConversionStep
void addPacketToPayloadConversionStep(PacketToPayloadConversionStep step)
Notify the Gem5ToTlm bridge that we need an extra step to properly convert a gem5 packet to tlm paylo...
tlm::tlm_generic_payload * packet2payload(PacketPtr packet)
Convert a gem5 packet to TLM payload by copying all the relevant information to new payload.
tlm_sync_enum
Definition fw_bw_ifs.hh:31

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