gem5  v21.1.0.2
hw_scheduler.hh
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33 
34 #ifndef __DEV_HSA_HW_SCHEDULER_HH__
35 #define __DEV_HSA_HW_SCHEDULER_HH__
36 
37 #include <cstdint>
38 #include <map>
39 
40 #include "base/types.hh"
42 #include "sim/eventq.hh"
43 
44 // We allocate one PIO page for doorbells and each
45 // address is 8 bytes
46 #define MAX_ACTIVE_QUEUES (PAGE_SIZE/8)
47 
48 namespace gem5
49 {
50 
52 {
53  public:
54  HWScheduler(HSAPacketProcessor* hsa_pp, Tick wakeup_delay)
55  : hsaPP(hsa_pp), nextALId(0), nextRLId(0),
56  wakeupDelay(wakeup_delay), schedWakeupEvent(this)
57  {}
58  void write(Addr db_addr, uint64_t doorbell_reg);
59  void registerNewQueue(uint64_t hostReadIndexPointer,
60  uint64_t basePointer,
61  uint64_t queue_id,
62  uint32_t size, int doorbellSize);
63  void unregisterQueue(uint64_t queue_id, int doorbellSize);
64  void wakeup();
65  void schedWakeup();
66  class SchedulerWakeupEvent : public Event
67  {
68  private:
70  public:
71  SchedulerWakeupEvent(HWScheduler *hw_schdlr) : hwSchdlr(hw_schdlr) {}
72  virtual void process();
73  virtual const char *description() const;
74  };
75  bool isRLQIdle(uint32_t rl_idx);
76  bool findNextActiveALQ();
77  bool findNextIdleRLQ();
78  bool unmapQFromRQ();
79  bool contextSwitchQ();
80  bool findEmptyHWQ();
81  bool mapQIfSlotAvlbl(uint32_t al_idx, AQLRingBuffer* aql_buf,
82  HSAQueueDescriptor* q_desc);
83  void addQCntxt(uint32_t al_idx, AQLRingBuffer* aql_buf,
84  HSAQueueDescriptor* q_desc);
85  void removeQCntxt();
87  void updateRRVars(uint32_t al_idx, uint32_t rl_idx);
88 
89  private:
90  // Active list keeps track of all queues created
91  std::map<uint32_t, QCntxt> activeList;
92  //TODO: Modify this to support multi-process in the future.
93  // doorbell map, maps doorbells to active list entry
94  std::map<Addr, uint32_t> dbMap;
95  // regdListMap keeps track of the mapping of queues to
96  // registered list. regdListMap is indexed with active
97  // list index (which is same as queue ID)
98  std::map<uint32_t, uint32_t> regdListMap;
100 
101  // Scheduling information.
102  // For now, this is simple round robin but
103  // this will be changed to a sophisticated logic
104  // in the future. So, in the future, we will
105  // move these variables into a scheduler class
106  uint32_t nextALId;
107  uint32_t nextRLId;
110 };
111 
112 } // namespace gem5
113 
114 #endif // __DEV_HSA_HW_SCHEDULER_HH__
gem5::HWScheduler::SchedulerWakeupEvent::process
virtual void process()
Definition: hw_scheduler.cc:54
gem5::HWScheduler::nextRLId
uint32_t nextRLId
Definition: hw_scheduler.hh:107
gem5::HWScheduler::SchedulerWakeupEvent::description
virtual const char * description() const
Return a C string describing the event.
gem5::HWScheduler::removeQCntxt
void removeQCntxt()
Definition: hw_scheduler.cc:240
gem5::HWScheduler::SchedulerWakeupEvent::SchedulerWakeupEvent
SchedulerWakeupEvent(HWScheduler *hw_schdlr)
Definition: hw_scheduler.hh:71
gem5::HWScheduler::dbMap
std::map< Addr, uint32_t > dbMap
Definition: hw_scheduler.hh:94
gem5::HWScheduler::findEmptyHWQ
bool findEmptyHWQ()
Definition: hw_scheduler.cc:128
gem5::HWScheduler::wakeup
void wakeup()
Definition: hw_scheduler.cc:60
gem5::HWScheduler::unmapQFromRQ
bool unmapQFromRQ()
Definition: hw_scheduler.cc:228
hsa_packet_processor.hh
gem5::HWScheduler::findNextActiveALQ
bool findNextActiveALQ()
Definition: hw_scheduler.cc:260
gem5::HWScheduler::isRLQIdle
bool isRLQIdle(uint32_t rl_idx)
Definition: hw_scheduler.cc:296
gem5::HWScheduler::contextSwitchQ
bool contextSwitchQ()
Definition: hw_scheduler.cc:191
gem5::HWScheduler::schedWakeup
void schedWakeup()
Definition: hw_scheduler.cc:74
gem5::HSAPacketProcessor
Definition: hsa_packet_processor.hh:224
gem5::Event
Definition: eventq.hh:251
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::HWScheduler::SchedulerWakeupEvent
Definition: hw_scheduler.hh:66
gem5::HWScheduler::registerNewQueue
void registerNewQueue(uint64_t hostReadIndexPointer, uint64_t basePointer, uint64_t queue_id, uint32_t size, int doorbellSize)
Definition: hw_scheduler.cc:87
gem5::HSAQueueDescriptor
Definition: hsa_packet_processor.hh:76
gem5::HWScheduler::unregisterQueue
void unregisterQueue(uint64_t queue_id, int doorbellSize)
Definition: hw_scheduler.cc:336
gem5::HWScheduler::mapQIfSlotAvlbl
bool mapQIfSlotAvlbl(uint32_t al_idx, AQLRingBuffer *aql_buf, HSAQueueDescriptor *q_desc)
Definition: hw_scheduler.cc:150
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::HWScheduler
Definition: hw_scheduler.hh:51
gem5::HWScheduler::findNextIdleRLQ
bool findNextIdleRLQ()
Definition: hw_scheduler.cc:282
gem5::HWScheduler::activeList
std::map< uint32_t, QCntxt > activeList
Definition: hw_scheduler.hh:91
gem5::HWScheduler::addQCntxt
void addQCntxt(uint32_t al_idx, AQLRingBuffer *aql_buf, HSAQueueDescriptor *q_desc)
Definition: hw_scheduler.cc:176
gem5::HWScheduler::HWScheduler
HWScheduler(HSAPacketProcessor *hsa_pp, Tick wakeup_delay)
Definition: hw_scheduler.hh:54
gem5::HWScheduler::nextALId
uint32_t nextALId
Definition: hw_scheduler.hh:106
types.hh
gem5::HWScheduler::hsaPP
HSAPacketProcessor * hsaPP
Definition: hw_scheduler.hh:99
gem5::HWScheduler::scheduleAndWakeupMappedQ
void scheduleAndWakeupMappedQ()
Definition: hw_scheduler.cc:165
gem5::AQLRingBuffer
Internal ring buffer which is used to prefetch/store copies of the in-memory HSA ring buffer.
Definition: hsa_packet_processor.hh:129
gem5::HWScheduler::wakeupDelay
const Tick wakeupDelay
Definition: hw_scheduler.hh:108
gem5::HWScheduler::updateRRVars
void updateRRVars(uint32_t al_idx, uint32_t rl_idx)
Definition: hw_scheduler.cc:221
gem5::HWScheduler::SchedulerWakeupEvent::hwSchdlr
HWScheduler * hwSchdlr
Definition: hw_scheduler.hh:69
gem5::HWScheduler::schedWakeupEvent
SchedulerWakeupEvent schedWakeupEvent
Definition: hw_scheduler.hh:109
gem5::HWScheduler::write
void write(Addr db_addr, uint64_t doorbell_reg)
Definition: hw_scheduler.cc:319
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::HWScheduler::regdListMap
std::map< uint32_t, uint32_t > regdListMap
Definition: hw_scheduler.hh:98
eventq.hh

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