gem5 v24.0.0.0
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Classes | Public Member Functions | Private Attributes | List of all members
gem5::HWScheduler Class Reference

#include <hw_scheduler.hh>

Classes

class  SchedulerWakeupEvent
 

Public Member Functions

 HWScheduler (HSAPacketProcessor *hsa_pp, Tick wakeup_delay)
 
void write (Addr db_addr, uint64_t doorbell_reg)
 
void registerNewQueue (uint64_t hostReadIndexPointer, uint64_t basePointer, uint64_t queue_id, uint32_t size, int doorbellSize, GfxVersion gfxVersion, Addr offset=0, uint64_t rd_idx=0)
 
void unregisterQueue (uint64_t queue_id, int doorbellSize)
 
void wakeup ()
 
void schedWakeup ()
 
bool isRLQIdle (uint32_t rl_idx)
 
bool findNextActiveALQ ()
 
bool findNextIdleRLQ ()
 
bool unmapQFromRQ ()
 
bool contextSwitchQ ()
 
bool findEmptyHWQ ()
 
bool mapQIfSlotAvlbl (uint32_t al_idx, AQLRingBuffer *aql_buf, HSAQueueDescriptor *q_desc)
 
void addQCntxt (uint32_t al_idx, AQLRingBuffer *aql_buf, HSAQueueDescriptor *q_desc)
 
void removeQCntxt ()
 
void scheduleAndWakeupMappedQ ()
 
void updateRRVars (uint32_t al_idx, uint32_t rl_idx)
 

Private Attributes

std::map< uint32_t, QCntxt > activeList
 
std::map< Addr, uint32_t > dbMap
 
std::map< uint64_t, Addr > qidMap
 
std::map< uint32_t, uint32_t > regdListMap
 
HSAPacketProcessor * hsaPP
 
uint32_t nextALId
 
uint32_t nextRLId
 
const Tick wakeupDelay
 
SchedulerWakeupEvent schedWakeupEvent
 

Detailed Description

Definition at line 50 of file hw_scheduler.hh.

Constructor & Destructor Documentation

◆ HWScheduler()

gem5::HWScheduler::HWScheduler ( HSAPacketProcessor * hsa_pp,
Tick wakeup_delay )
inline

Definition at line 53 of file hw_scheduler.hh.

Member Function Documentation

◆ addQCntxt()

void gem5::HWScheduler::addQCntxt ( uint32_t al_idx,
AQLRingBuffer * aql_buf,
HSAQueueDescriptor * q_desc )

Definition at line 188 of file hw_scheduler.cc.

References gem5::QCntxt::aqlBuf, DPRINTF, gem5::HSAPacketProcessor::getRegdListEntry(), hsaPP, nextRLId, gem5::HSAPacketProcessor::RQLEntry::qCntxt, gem5::QCntxt::qDesc, and regdListMap.

Referenced by contextSwitchQ(), and mapQIfSlotAvlbl().

◆ contextSwitchQ()

bool gem5::HWScheduler::contextSwitchQ ( )

Definition at line 203 of file hw_scheduler.cc.

References activeList, addQCntxt(), DPRINTF, findNextActiveALQ(), mapQIfSlotAvlbl(), nextALId, nextRLId, scheduleAndWakeupMappedQ(), unmapQFromRQ(), and updateRRVars().

Referenced by unregisterQueue(), and wakeup().

◆ findEmptyHWQ()

bool gem5::HWScheduler::findEmptyHWQ ( )

Definition at line 140 of file hw_scheduler.cc.

References DPRINTF, gem5::HSAPacketProcessor::getRegdListEntry(), hsaPP, nextRLId, gem5::HSAPacketProcessor::numHWQueues, panic, gem5::HSAPacketProcessor::RQLEntry::qCntxt, gem5::QCntxt::qDesc, and regdListMap.

Referenced by mapQIfSlotAvlbl().

◆ findNextActiveALQ()

bool gem5::HWScheduler::findNextActiveALQ ( )

Definition at line 272 of file hw_scheduler.cc.

References activeList, DPRINTF, MAX_ACTIVE_QUEUES, nextALId, and regdListMap.

Referenced by contextSwitchQ().

◆ findNextIdleRLQ()

bool gem5::HWScheduler::findNextIdleRLQ ( )

Definition at line 294 of file hw_scheduler.cc.

References hsaPP, isRLQIdle(), nextRLId, and gem5::HSAPacketProcessor::numHWQueues.

Referenced by unmapQFromRQ().

◆ isRLQIdle()

bool gem5::HWScheduler::isRLQIdle ( uint32_t rl_idx)

Definition at line 308 of file hw_scheduler.cc.

References gem5::HSAQueueDescriptor::dmaInProgress, DPRINTF, gem5::HSAPacketProcessor::getRegdListEntry(), hsaPP, gem5::HSAPacketProcessor::inFlightPkts(), gem5::HSAPacketProcessor::RQLEntry::qCntxt, and gem5::QCntxt::qDesc.

Referenced by findNextIdleRLQ().

◆ mapQIfSlotAvlbl()

bool gem5::HWScheduler::mapQIfSlotAvlbl ( uint32_t al_idx,
AQLRingBuffer * aql_buf,
HSAQueueDescriptor * q_desc )

Definition at line 162 of file hw_scheduler.cc.

References addQCntxt(), DPRINTF, findEmptyHWQ(), nextRLId, scheduleAndWakeupMappedQ(), and updateRRVars().

Referenced by contextSwitchQ(), and registerNewQueue().

◆ registerNewQueue()

void gem5::HWScheduler::registerNewQueue ( uint64_t hostReadIndexPointer,
uint64_t basePointer,
uint64_t queue_id,
uint32_t size,
int doorbellSize,
GfxVersion gfxVersion,
Addr offset = 0,
uint64_t rd_idx = 0 )

Definition at line 85 of file hw_scheduler.cc.

References activeList, dbMap, DPRINTF, hsaPP, mapQIfSlotAvlbl(), MAX_ACTIVE_QUEUES, gem5::Named::name(), NUM_DMA_BUFS, gem5::ArmISA::offset, panic, qidMap, schedWakeup(), gem5::AQLRingBuffer::setDispIdx(), gem5::AQLRingBuffer::setRdIdx(), and gem5::AQLRingBuffer::setWrIdx().

Referenced by gem5::HSAPacketProcessor::setDeviceQueueDesc().

◆ removeQCntxt()

void gem5::HWScheduler::removeQCntxt ( )

Definition at line 252 of file hw_scheduler.cc.

References gem5::QCntxt::aqlBuf, dbMap, gem5::HSAPacketProcessor::RQLEntry::depSignalRdState, gem5::HSAPacketProcessor::SignalState::discardRead, gem5::HSAQueueDescriptor::doorbellPointer, gem5::HSAPacketProcessor::getRegdListEntry(), hsaPP, nextRLId, gem5::HSAPacketProcessor::RQLEntry::qCntxt, gem5::QCntxt::qDesc, regdListMap, and gem5::HSAPacketProcessor::SignalState::resetSigVals().

Referenced by unmapQFromRQ().

◆ scheduleAndWakeupMappedQ()

void gem5::HWScheduler::scheduleAndWakeupMappedQ ( )

Definition at line 177 of file hw_scheduler.cc.

References gem5::HSAPacketProcessor::getCommandsFromHost(), hsaPP, nextRLId, gem5::HSAPacketProcessor::regdQList, and gem5::HSAPacketProcessor::schedAQLProcessing().

Referenced by contextSwitchQ(), and mapQIfSlotAvlbl().

◆ schedWakeup()

void gem5::HWScheduler::schedWakeup ( )

Definition at line 72 of file hw_scheduler.cc.

References activeList, gem5::curTick(), DPRINTF, hsaPP, regdListMap, gem5::EventManager::schedule(), gem5::Event::scheduled(), schedWakeupEvent, and wakeupDelay.

Referenced by registerNewQueue(), unregisterQueue(), and wakeup().

◆ unmapQFromRQ()

bool gem5::HWScheduler::unmapQFromRQ ( )

Definition at line 240 of file hw_scheduler.cc.

References findNextIdleRLQ(), and removeQCntxt().

Referenced by contextSwitchQ().

◆ unregisterQueue()

void gem5::HWScheduler::unregisterQueue ( uint64_t queue_id,
int doorbellSize )

Definition at line 356 of file hw_scheduler.cc.

References activeList, gem5::QCntxt::aqlBuf, gem5::HSAPacketProcessor::RQLEntry::aqlProcessEvent, contextSwitchQ(), dbMap, gem5::HSAPacketProcessor::RQLEntry::depSignalRdState, gem5::HSAPacketProcessor::SignalState::discardRead, gem5::HSAPacketProcessor::getRegdListEntry(), hsaPP, panic, gem5::HSAPacketProcessor::RQLEntry::qCntxt, gem5::QCntxt::qDesc, qidMap, regdListMap, gem5::HSAPacketProcessor::SignalState::resetSigVals(), gem5::Event::scheduled(), schedWakeup(), and warn.

Referenced by gem5::HSAPacketProcessor::unsetDeviceQueueDesc().

◆ updateRRVars()

void gem5::HWScheduler::updateRRVars ( uint32_t al_idx,
uint32_t rl_idx )

Definition at line 233 of file hw_scheduler.cc.

References hsaPP, MAX_ACTIVE_QUEUES, nextALId, nextRLId, and gem5::HSAPacketProcessor::numHWQueues.

Referenced by contextSwitchQ(), and mapQIfSlotAvlbl().

◆ wakeup()

void gem5::HWScheduler::wakeup ( )

Definition at line 58 of file hw_scheduler.cc.

References contextSwitchQ(), and schedWakeup().

Referenced by gem5::HWScheduler::SchedulerWakeupEvent::process().

◆ write()

void gem5::HWScheduler::write ( Addr db_addr,
uint64_t doorbell_reg )

Definition at line 331 of file hw_scheduler.cc.

References activeList, dbMap, DPRINTF, gem5::HSAPacketProcessor::getCommandsFromHost(), hsaPP, panic, and regdListMap.

Referenced by gem5::HSAPacketProcessor::write(), and gem5::AMDGPUDevice::writeDoorbell().

Member Data Documentation

◆ activeList

std::map<uint32_t, QCntxt> gem5::HWScheduler::activeList
private

Definition at line 92 of file hw_scheduler.hh.

Referenced by contextSwitchQ(), findNextActiveALQ(), registerNewQueue(), schedWakeup(), unregisterQueue(), and write().

◆ dbMap

std::map<Addr, uint32_t> gem5::HWScheduler::dbMap
private

Definition at line 95 of file hw_scheduler.hh.

Referenced by registerNewQueue(), removeQCntxt(), unregisterQueue(), and write().

◆ hsaPP

HSAPacketProcessor* gem5::HWScheduler::hsaPP
private

Definition at line 102 of file hw_scheduler.hh.

Referenced by addQCntxt(), findEmptyHWQ(), findNextIdleRLQ(), isRLQIdle(), registerNewQueue(), removeQCntxt(), scheduleAndWakeupMappedQ(), schedWakeup(), unregisterQueue(), updateRRVars(), and write().

◆ nextALId

uint32_t gem5::HWScheduler::nextALId
private

Definition at line 109 of file hw_scheduler.hh.

Referenced by contextSwitchQ(), findNextActiveALQ(), and updateRRVars().

◆ nextRLId

uint32_t gem5::HWScheduler::nextRLId
private

Definition at line 110 of file hw_scheduler.hh.

Referenced by addQCntxt(), contextSwitchQ(), findEmptyHWQ(), findNextIdleRLQ(), mapQIfSlotAvlbl(), removeQCntxt(), scheduleAndWakeupMappedQ(), and updateRRVars().

◆ qidMap

std::map<uint64_t, Addr> gem5::HWScheduler::qidMap
private

Definition at line 97 of file hw_scheduler.hh.

Referenced by registerNewQueue(), and unregisterQueue().

◆ regdListMap

std::map<uint32_t, uint32_t> gem5::HWScheduler::regdListMap
private

Definition at line 101 of file hw_scheduler.hh.

Referenced by addQCntxt(), findEmptyHWQ(), findNextActiveALQ(), removeQCntxt(), schedWakeup(), unregisterQueue(), and write().

◆ schedWakeupEvent

SchedulerWakeupEvent gem5::HWScheduler::schedWakeupEvent
private

Definition at line 112 of file hw_scheduler.hh.

Referenced by schedWakeup().

◆ wakeupDelay

const Tick gem5::HWScheduler::wakeupDelay
private

Definition at line 111 of file hw_scheduler.hh.

Referenced by schedWakeup().

The documentation for this class was generated from the following files:
Generated on Tue Jun 18 2024 16:24:12 for gem5 by doxygen 1.11.0