gem5 v24.0.0.0
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Internal ring buffer which is used to prefetch/store copies of the in-memory HSA ring buffer. More...
#include <hsa_packet_processor.hh>
Public Member Functions | |
std::string | name () |
AQLRingBuffer (uint32_t size, const std::string name) | |
int | allocEntry (uint32_t nBufReq) |
bool | freeEntry (void *pkt) |
void | saveHostDispAddr (Addr host_pkt_addr, int num_pkts, int ix) |
the kernel may try to read from the dispatch packet, so we need to keep the host address that corresponds to each of the dispatch packets this AQL buffer is storing. | |
Addr | hostDispAddr () const |
bool | dispPending () const |
bool | isLastOutstandingPkt () const |
Packets aren't guaranteed to be completed in-order, and we need to know when the last packet is finished in order to un-set the barrier bit. | |
uint32_t | nFree () const |
void * | ptr (uint32_t ix) |
uint32_t | numObjs () const |
uint32_t | objSize () const |
uint64_t | dispIdx () const |
uint64_t | wrIdx () const |
uint64_t | rdIdx () const |
uint64_t * | rdIdxPtr () |
void | incRdIdx (uint64_t value) |
void | incWrIdx (uint64_t value) |
void | incDispIdx (uint64_t value) |
uint64_t | compltnPending () |
void | setRdIdx (uint64_t value) |
void | setWrIdx (uint64_t value) |
void | setDispIdx (uint64_t value) |
Private Attributes | |
std::vector< hsa_kernel_dispatch_packet_t > | _aqlBuf |
std::string | _name |
std::vector< Addr > | _hostDispAddresses |
std::vector< bool > | _aqlComplete |
uint64_t | _wrIdx |
uint64_t | _rdIdx |
uint64_t | _dispIdx |
Internal ring buffer which is used to prefetch/store copies of the in-memory HSA ring buffer.
Each packet in the queue has three implicit states tracked by a packet's relative location to the write, read, and dispatch pointers.
FREE: Entry is empty ALLOCATED: Entry has been allocated for a packet, but the DMA has not yet completed SUBMITTED: Packet has been submitted to the GPUCommandProcessor, but has not yet completed
Definition at line 141 of file hsa_packet_processor.hh.
gem5::AQLRingBuffer::AQLRingBuffer | ( | uint32_t | size, |
const std::string | name ) |
Definition at line 590 of file hsa_packet_processor.cc.
References _aqlBuf, _aqlComplete, _hostDispAddresses, and HSA_PACKET_TYPE_INVALID.
int gem5::AQLRingBuffer::allocEntry | ( | uint32_t | nBufReq | ) |
Definition at line 648 of file hsa_packet_processor.cc.
References DPRINTF, incWrIdx(), nFree(), and wrIdx().
Referenced by gem5::HSAPacketProcessor::getCommandsFromHost().
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Definition at line 221 of file hsa_packet_processor.hh.
References _dispIdx, and _rdIdx.
Referenced by gem5::HSAPacketProcessor::RQLEntry::compltnPending().
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Definition at line 214 of file hsa_packet_processor.hh.
References _dispIdx.
Referenced by gem5::HSAPacketProcessor::cmdQueueCmdDma(), hostDispAddr(), and gem5::HSAPacketProcessor::QueueProcessEvent::process().
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Definition at line 183 of file hsa_packet_processor.hh.
References _aqlBuf, _dispIdx, _wrIdx, HSA_PACKET_HEADER_TYPE, HSA_PACKET_HEADER_WIDTH_TYPE, and HSA_PACKET_TYPE_INVALID.
Referenced by gem5::HSAPacketProcessor::RQLEntry::dispPending().
bool gem5::AQLRingBuffer::freeEntry | ( | void * | pkt | ) |
Definition at line 622 of file hsa_packet_processor.cc.
References _aqlBuf, _aqlComplete, DPRINTF, HSA_PACKET_TYPE_INVALID, incRdIdx(), nFree(), numObjs(), rdIdx(), and wrIdx().
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Definition at line 177 of file hsa_packet_processor.hh.
References _hostDispAddresses, dispIdx(), and numObjs().
Referenced by gem5::HSAPacketProcessor::QueueProcessEvent::process().
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Definition at line 220 of file hsa_packet_processor.hh.
References _dispIdx.
Referenced by gem5::HSAPacketProcessor::QueueProcessEvent::process().
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Definition at line 218 of file hsa_packet_processor.hh.
References _rdIdx.
Referenced by freeEntry().
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Definition at line 219 of file hsa_packet_processor.hh.
References _wrIdx.
Referenced by allocEntry().
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Packets aren't guaranteed to be completed in-order, and we need to know when the last packet is finished in order to un-set the barrier bit.
In order to confirm if the packet at _rdIdx is the last packet, we check if the packets ahead of _rdIdx are finished. If they are, _rdIdx is the last packet. If not, there are other outstanding packets.
Definition at line 200 of file hsa_packet_processor.hh.
References _aqlBuf, _aqlComplete, _dispIdx, _rdIdx, and gem5::ArmISA::i.
Referenced by gem5::HSAPacketProcessor::RQLEntry::isLastOutstandingPkt().
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Definition at line 153 of file hsa_packet_processor.hh.
References _name.
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Definition at line 210 of file hsa_packet_processor.hh.
References _aqlBuf, _rdIdx, and _wrIdx.
Referenced by allocEntry(), and freeEntry().
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Definition at line 212 of file hsa_packet_processor.hh.
References _aqlBuf.
Referenced by freeEntry(), gem5::HSAPacketProcessor::getCommandsFromHost(), hostDispAddr(), and saveHostDispAddr().
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Definition at line 213 of file hsa_packet_processor.hh.
References AQL_PACKET_SIZE.
Referenced by saveHostDispAddr().
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Definition at line 211 of file hsa_packet_processor.hh.
References _aqlBuf.
Referenced by gem5::HSAPacketProcessor::getCommandsFromHost(), and gem5::HSAPacketProcessor::QueueProcessEvent::process().
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Definition at line 216 of file hsa_packet_processor.hh.
References _rdIdx.
Referenced by gem5::HSAPacketProcessor::cmdQueueCmdDma(), freeEntry(), gem5::HSAPacketProcessor::QueueProcessEvent::process(), and gem5::HSAPacketProcessor::updateReadIndex().
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Definition at line 217 of file hsa_packet_processor.hh.
References _rdIdx.
Referenced by gem5::HSAPacketProcessor::updateReadIndex().
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the kernel may try to read from the dispatch packet, so we need to keep the host address that corresponds to each of the dispatch packets this AQL buffer is storing.
when we call submitPkt(), we send along the corresponding host address for the packet so the wavefront can properly initialize its SGPRs - which may include a pointer to the dispatch packet
Definition at line 168 of file hsa_packet_processor.hh.
References _hostDispAddresses, gem5::ArmISA::i, numObjs(), and objSize().
Referenced by gem5::HSAPacketProcessor::getCommandsFromHost().
void gem5::AQLRingBuffer::setDispIdx | ( | uint64_t | value | ) |
Definition at line 616 of file hsa_packet_processor.cc.
References _dispIdx.
Referenced by gem5::HWScheduler::registerNewQueue().
void gem5::AQLRingBuffer::setRdIdx | ( | uint64_t | value | ) |
Definition at line 604 of file hsa_packet_processor.cc.
References _rdIdx.
Referenced by gem5::HWScheduler::registerNewQueue().
void gem5::AQLRingBuffer::setWrIdx | ( | uint64_t | value | ) |
Definition at line 610 of file hsa_packet_processor.cc.
References _wrIdx.
Referenced by gem5::HWScheduler::registerNewQueue().
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Definition at line 215 of file hsa_packet_processor.hh.
References _wrIdx.
Referenced by allocEntry(), gem5::HSAPacketProcessor::cmdQueueCmdDma(), freeEntry(), gem5::HSAPacketProcessor::getCommandsFromHost(), gem5::HSAPacketProcessor::QueueProcessEvent::process(), and gem5::HSAPacketProcessor::updateReadIndex().
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Definition at line 144 of file hsa_packet_processor.hh.
Referenced by AQLRingBuffer(), dispPending(), freeEntry(), isLastOutstandingPkt(), nFree(), numObjs(), and ptr().
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Definition at line 147 of file hsa_packet_processor.hh.
Referenced by AQLRingBuffer(), freeEntry(), and isLastOutstandingPkt().
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Definition at line 150 of file hsa_packet_processor.hh.
Referenced by compltnPending(), dispIdx(), dispPending(), incDispIdx(), isLastOutstandingPkt(), and setDispIdx().
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Definition at line 146 of file hsa_packet_processor.hh.
Referenced by AQLRingBuffer(), hostDispAddr(), and saveHostDispAddr().
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Definition at line 145 of file hsa_packet_processor.hh.
Referenced by name().
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Definition at line 149 of file hsa_packet_processor.hh.
Referenced by compltnPending(), incRdIdx(), isLastOutstandingPkt(), nFree(), rdIdx(), rdIdxPtr(), and setRdIdx().
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Definition at line 148 of file hsa_packet_processor.hh.
Referenced by dispPending(), incWrIdx(), nFree(), setWrIdx(), and wrIdx().