gem5 v24.0.0.0
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#include "cpu/minor/dyn_inst.hh"
#include <iomanip>
#include <sstream>
#include "cpu/base.hh"
#include "cpu/minor/trace.hh"
#include "cpu/null_static_inst.hh"
#include "cpu/reg_class.hh"
#include "debug/MinorExecute.hh"
#include "enums/OpClass.hh"
Go to the source code of this file.
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
namespace | gem5::minor |
Functions | |
std::ostream & | gem5::minor::operator<< (std::ostream &os, const InstId &id) |
Print this id in the usual slash-separated format expected by MinorTrace. | |
std::ostream & | gem5::minor::operator<< (std::ostream &os, const MinorDynInst &inst) |
Print a short reference to this instruction. | |
static void | gem5::minor::printRegName (std::ostream &os, const RegId ®) |
Print a register in the form r<n>, f<n>, m<n>(<name>) for integer, float, and misc given an 'architectural register number'. | |