gem5
v24.0.0.0
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cpu
pc_event.cc
Go to the documentation of this file.
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/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
cpu/pc_event.hh
"
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#include <algorithm>
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#include <string>
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#include <utility>
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#include "
base/debug.hh
"
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#include "
base/trace.hh
"
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#include "debug/PCEvent.hh"
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#include "
sim/cur_tick.hh
"
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#include "
sim/system.hh
"
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namespace
gem5
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{
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PCEventQueue::PCEventQueue
()
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{}
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PCEventQueue::~PCEventQueue
()
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{}
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bool
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PCEventQueue::remove
(
PCEvent
*
event
)
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{
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int
removed = 0;
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range_t
range =
equal_range
(
event
);
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iterator
i
= range.first;
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while
(
i
!= range.second &&
i
!=
pcMap
.end()) {
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if
(*
i
==
event
) {
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DPRINTF
(
PCEvent
,
"PC based event removed at %#x: %s\n"
,
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event
->
pc
(),
event
->descr());
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i
=
pcMap
.erase(
i
);
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++removed;
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}
else
{
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i
++;
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}
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}
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return
removed > 0;
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}
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bool
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PCEventQueue::schedule
(
PCEvent
*
event
)
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{
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pcMap
.push_back(
event
);
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std::sort(
pcMap
.begin(),
pcMap
.end(),
MapCompare
());
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DPRINTF
(
PCEvent
,
"PC based event scheduled for %#x: %s\n"
,
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event
->
pc
(),
event
->descr());
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return
true
;
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}
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bool
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PCEventQueue::doService
(
Addr
pc
,
ThreadContext
*tc)
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{
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// Using the raw PC address will fail to break on Alpha PALcode addresses,
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// but that is a rare use case.
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int
serviced = 0;
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range_t
range =
equal_range
(
pc
);
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for
(
iterator
i
= range.first;
i
!= range.second; ++
i
) {
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DPRINTF
(
PCEvent
,
"PC based event serviced at %#x: %s\n"
,
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(*i)->
pc
(), (*i)->descr());
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(*i)->process(tc);
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++serviced;
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}
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return
serviced > 0;
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}
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void
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PCEventQueue::dump
()
const
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{
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const_iterator
i
=
pcMap
.begin();
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const_iterator
e
=
pcMap
.end();
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for
(;
i
!=
e
; ++
i
)
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cprintf
(
"%d: event at %#x: %s\n"
,
curTick
(), (*i)->pc(),
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(*i)->descr());
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}
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PCEventQueue::range_t
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PCEventQueue::equal_range
(
Addr
pc
)
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{
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return
std::equal_range(
pcMap
.begin(),
pcMap
.end(),
pc
,
MapCompare
());
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}
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BreakPCEvent::BreakPCEvent
(
PCEventScope
*
s
,
const
std::string &desc,
Addr
addr
,
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bool
del)
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:
PCEvent
(
s
, desc,
addr
), remove(del)
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{
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}
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void
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BreakPCEvent::process
(
ThreadContext
*tc)
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{
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StringWrap
name
(
"break_event"
);
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DPRINTFN
(
"break event %s triggered\n"
,
descr
());
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debug::breakpoint
();
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if
(
remove
)
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delete
this
;
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}
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PanicPCEvent::PanicPCEvent
(
PCEventScope
*
s
,
const
std::string &desc,
Addr
pc
)
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:
PCEvent
(
s
, desc,
pc
)
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{
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}
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void
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PanicPCEvent::process
(
ThreadContext
*tc)
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{
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StringWrap
name
(
"panic_event"
);
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panic
(
descr
());
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}
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}
// namespace gem5
debug.hh
trace.hh
DPRINTFN
#define DPRINTFN(...)
Definition
trace.hh:238
DPRINTF
#define DPRINTF(x,...)
Definition
trace.hh:210
gem5::BreakPCEvent::remove
bool remove
Definition
pc_event.hh:151
gem5::BreakPCEvent::BreakPCEvent
BreakPCEvent(PCEventScope *s, const std::string &desc, Addr addr, bool del=false)
Definition
pc_event.cc:117
gem5::BreakPCEvent::process
virtual void process(ThreadContext *tc)
Definition
pc_event.cc:124
gem5::PCEventQueue::MapCompare
Definition
pc_event.hh:78
gem5::PCEventQueue::pcMap
Map pcMap
Definition
pc_event.hh:107
gem5::PCEventQueue::equal_range
range_t equal_range(Addr pc)
Definition
pc_event.cc:112
gem5::PCEventQueue::~PCEventQueue
~PCEventQueue()
Definition
pc_event.cc:47
gem5::PCEventQueue::iterator
Map::iterator iterator
Definition
pc_event.hh:99
gem5::PCEventQueue::const_iterator
Map::const_iterator const_iterator
Definition
pc_event.hh:100
gem5::PCEventQueue::PCEventQueue
PCEventQueue()
Definition
pc_event.cc:44
gem5::PCEventQueue::remove
bool remove(PCEvent *event) override
Definition
pc_event.cc:51
gem5::PCEventQueue::dump
void dump() const
Definition
pc_event.cc:101
gem5::PCEventQueue::doService
bool doService(Addr pc, ThreadContext *tc)
Definition
pc_event.cc:83
gem5::PCEventQueue::schedule
bool schedule(PCEvent *event) override
Definition
pc_event.cc:71
gem5::PCEventScope
Definition
pc_event.hh:68
gem5::PCEvent
Definition
pc_event.hh:46
gem5::PCEvent::name
virtual const std::string name() const
Definition
pc_event.hh:58
gem5::PCEvent::pc
Addr pc() const
Definition
pc_event.hh:61
gem5::PCEvent::descr
std::string descr() const
Definition
pc_event.hh:60
gem5::PanicPCEvent::PanicPCEvent
PanicPCEvent(PCEventScope *s, const std::string &desc, Addr pc)
Definition
pc_event.cc:133
gem5::PanicPCEvent::process
virtual void process(ThreadContext *tc)
Definition
pc_event.cc:139
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition
guest_abi.test.cc:41
std::pair
STL pair class.
Definition
stl.hh:58
cur_tick.hh
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition
logging.hh:188
gem5::ArmISA::s
Bitfield< 4 > s
Definition
misc_types.hh:646
gem5::ArmISA::i
Bitfield< 7 > i
Definition
misc_types.hh:67
gem5::ArmISA::e
Bitfield< 9 > e
Definition
misc_types.hh:65
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition
pra_constants.hh:243
gem5::MipsISA::event
Bitfield< 10, 5 > event
Definition
pra_constants.hh:300
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition
types.hh:84
gem5::debug::breakpoint
void breakpoint()
Definition
debug.cc:64
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
gem5::cprintf
void cprintf(const char *format, const Args &...args)
Definition
cprintf.hh:155
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition
cur_tick.hh:46
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition
types.hh:147
pc_event.hh
system.hh
gem5::StringWrap
Definition
trace.hh:170
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