gem5  v21.2.0.0
pagetable.cc
Go to the documentation of this file.
1 /*
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3  * Copyright (c) 2007 MIPS Technologies, Inc.
4  * Copyright (c) 2020 Barkhausen Institut
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30 
31 #include "arch/riscv/pagetable.hh"
32 
33 #include "sim/serialize.hh"
34 
35 namespace gem5
36 {
37 
38 namespace RiscvISA
39 {
40 
41 void
43 {
50 }
51 
52 void
54 {
61 }
62 
63 } // namespace RiscvISA
64 } // namespace gem5
serialize.hh
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:575
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::RiscvISA::TlbEntry::pte
PTESv39 pte
Definition: pagetable.hh:94
gem5::RiscvISA::TlbEntry::logBytes
unsigned logBytes
Definition: pagetable.hh:90
gem5::RiscvISA::TlbEntry::vaddr
Addr vaddr
Definition: pagetable.hh:88
gem5::RiscvISA::TlbEntry::asid
uint16_t asid
Definition: pagetable.hh:92
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:568
gem5::RiscvISA::TlbEntry::paddr
Addr paddr
Definition: pagetable.hh:85
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::RiscvISA::TlbEntry::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pagetable.cc:42
gem5::RiscvISA::TlbEntry::lruSeq
uint64_t lruSeq
Definition: pagetable.hh:99
pagetable.hh
gem5::RiscvISA::TlbEntry::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pagetable.cc:53

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