gem5  v21.1.0.2
pagetable.hh
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30 
31 #ifndef __ARCH_RISCV_PAGETABLE_H__
32 #define __ARCH_RISCV_PAGETABLE_H__
33 
34 #include "base/bitunion.hh"
35 #include "base/logging.hh"
36 #include "base/trie.hh"
37 #include "base/types.hh"
38 #include "sim/serialize.hh"
39 
40 namespace gem5
41 {
42 
43 namespace RiscvISA {
44 
45 BitUnion64(SATP)
46  Bitfield<63, 60> mode;
47  Bitfield<59, 44> asid;
48  Bitfield<43, 0> ppn;
50 
51 enum AddrXlateMode
52 {
53  BARE = 0,
54  SV39 = 8,
55  SV48 = 9,
56 };
57 
58 // Sv39 paging
59 const Addr VADDR_BITS = 39;
60 const Addr LEVEL_BITS = 9;
61 const Addr LEVEL_MASK = (1 << LEVEL_BITS) - 1;
62 
63 BitUnion64(PTESv39)
64  Bitfield<53, 10> ppn;
65  Bitfield<53, 28> ppn2;
66  Bitfield<27, 19> ppn1;
67  Bitfield<18, 10> ppn0;
68  Bitfield<7> d;
69  Bitfield<6> a;
70  Bitfield<5> g;
71  Bitfield<4> u;
72  Bitfield<3, 1> perm;
73  Bitfield<3> x;
74  Bitfield<2> w;
75  Bitfield<1> r;
76  Bitfield<0> v;
77 EndBitUnion(PTESv39)
78 
79 struct TlbEntry;
81 
82 struct TlbEntry : public Serializable
83 {
84  // The base of the physical page.
86 
87  // The beginning of the virtual page this entry maps.
89  // The size of the page this represents, in address bits.
90  unsigned logBytes;
91 
92  uint16_t asid;
93 
94  PTESv39 pte;
95 
97 
98  // A sequence number to keep track of LRU.
99  uint64_t lruSeq;
100 
102  : paddr(0), vaddr(0), logBytes(0), pte(), lruSeq(0)
103  {}
104 
105  // Return the page size in bytes
106  Addr size() const
107  {
108  return (static_cast<Addr>(1) << logBytes);
109  }
110 
111  void serialize(CheckpointOut &cp) const override;
112  void unserialize(CheckpointIn &cp) override;
113 };
114 
115 } // namespace RiscvISA
116 } // namespace gem5
117 
118 #endif // __ARCH_RISCV_PAGETABLE_H__
gem5::RiscvISA::perm
Bitfield< 3, 1 > perm
Definition: pagetable.hh:72
serialize.hh
gem5::RiscvISA::ppn
Bitfield< 43, 0 > ppn
Definition: pagetable.hh:48
gem5::RiscvISA::LEVEL_MASK
const Addr LEVEL_MASK
Definition: pagetable.hh:61
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::RiscvISA::TlbEntry::size
Addr size() const
Definition: pagetable.hh:106
gem5::RiscvISA::TlbEntry::pte
PTESv39 pte
Definition: pagetable.hh:94
gem5::RiscvISA::TlbEntry::logBytes
unsigned logBytes
Definition: pagetable.hh:90
gem5::RiscvISA::ppn0
Bitfield< 18, 10 > ppn0
Definition: pagetable.hh:67
gem5::RiscvISA::TlbEntry::vaddr
Addr vaddr
Definition: pagetable.hh:88
gem5::RiscvISA::LEVEL_BITS
const Addr LEVEL_BITS
Definition: pagetable.hh:60
gem5::Trie< Addr, TlbEntry >
gem5::Serializable
Basic support for object serialization.
Definition: serialize.hh:169
gem5::statistics::Node
Base class for formula statistic node.
Definition: statistics.hh:1520
gem5::RiscvISA::w
Bitfield< 2 > w
Definition: pagetable.hh:74
gem5::RiscvISA::TlbEntry
Definition: pagetable.hh:82
gem5::RiscvISA::v
Bitfield< 0 > v
Definition: pagetable.hh:76
gem5::RiscvISA::u
Bitfield< 4 > u
Definition: pagetable.hh:71
bitunion.hh
gem5::RiscvISA::r
Bitfield< 1 > r
Definition: pagetable.hh:75
gem5::RiscvISA::TlbEntry::asid
uint16_t asid
Definition: pagetable.hh:92
gem5::RiscvISA::asid
Bitfield< 59, 44 > asid
Definition: pagetable.hh:47
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::RiscvISA::g
Bitfield< 5 > g
Definition: pagetable.hh:70
gem5::RiscvISA::ppn2
Bitfield< 53, 28 > ppn2
Definition: pagetable.hh:65
gem5::RiscvISA::VADDR_BITS
const Addr VADDR_BITS
Definition: pagetable.hh:59
gem5::RiscvISA::a
Bitfield< 6 > a
Definition: pagetable.hh:69
gem5::RiscvISA::TlbEntryTrie
Trie< Addr, TlbEntry > TlbEntryTrie
Definition: pagetable.hh:80
gem5::RiscvISA::x
Bitfield< 3 > x
Definition: pagetable.hh:73
gem5::RiscvISA::TlbEntry::paddr
Addr paddr
Definition: pagetable.hh:85
types.hh
gem5::RiscvISA::mode
mode
Definition: pagetable.hh:46
gem5::RiscvISA::d
Bitfield< 7 > d
Definition: pagetable.hh:68
logging.hh
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::RiscvISA::ppn1
Bitfield< 27, 19 > ppn1
Definition: pagetable.hh:66
gem5::RiscvISA::TlbEntry::TlbEntry
TlbEntry()
Definition: pagetable.hh:101
gem5::RiscvISA::EndBitUnion
EndBitUnion(SATP) enum AddrXlateMode
Definition: pagetable.hh:49
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::RiscvISA::TlbEntry::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pagetable.cc:42
gem5::RiscvISA::TlbEntry::trieHandle
TlbEntryTrie::Handle trieHandle
Definition: pagetable.hh:96
gem5::RiscvISA::TlbEntry::lruSeq
uint64_t lruSeq
Definition: pagetable.hh:99
gem5::RiscvISA::BitUnion64
BitUnion64(SATP) Bitfield< 63
trie.hh
gem5::RiscvISA::TlbEntry::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pagetable.cc:53

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