gem5
v24.0.0.0
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arch
riscv
stacktrace.hh
Go to the documentation of this file.
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/*
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* Copyright (c) 2005 The Regents of The University of Michigan
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* Copyright (c) 2007-2008 The Florida State University
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* Copyright (c) 2009 The University of Edinburgh
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_RISCV_STACKTRACE_HH__
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#define __ARCH_RISCV_STACKTRACE_HH__
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#include "
base/logging.hh
"
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#include "
cpu/profile.hh
"
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namespace
gem5
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{
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namespace
RiscvISA
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{
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class
StackTrace
:
public
BaseStackTrace
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{
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protected
:
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void
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trace
(
ThreadContext
*
tc
,
bool
is_call)
override
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{
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panic
(
"StackTrace::trace not implemented."
);
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}
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};
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}
// namespace RiscvISA
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}
// namespace gem5
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#endif
// __ARCH_RISCV_STACKTRACE_HH__
gem5::BaseStackTrace
Definition
profile.hh:52
gem5::BaseStackTrace::tc
ThreadContext * tc
Definition
profile.hh:57
gem5::RiscvISA::StackTrace
Definition
stacktrace.hh:44
gem5::RiscvISA::StackTrace::trace
void trace(ThreadContext *tc, bool is_call) override
Definition
stacktrace.hh:47
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition
guest_abi.test.cc:41
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition
logging.hh:188
logging.hh
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
profile.hh
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