gem5
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mem
se_translating_port_proxy.cc
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/*
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* Copyright (c) 2011 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2001-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
mem/se_translating_port_proxy.hh
"
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#include "
sim/process.hh
"
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#include "
sim/system.hh
"
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namespace
gem5
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{
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SETranslatingPortProxy::SETranslatingPortProxy
(
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ThreadContext
*tc,
AllocType
alloc,
Request::Flags
_flags) :
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TranslatingPortProxy
(tc, _flags), allocating(alloc)
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{}
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bool
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SETranslatingPortProxy::fixupRange
(
const
TranslationGen::Range
&range,
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BaseMMU::Mode
mode
)
const
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{
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auto
*process =
_tc
->
getProcessPtr
();
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if
(
mode
==
BaseMMU::Write
) {
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if
(
allocating
==
Always
) {
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process->
allocateMem
(range.
vaddr
, range.
size
);
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return
true
;
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}
else
if
(
allocating
==
NextPage
&&
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process->fixupFault(range.
vaddr
)) {
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// We've accessed the next page on the stack.
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return
true
;
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}
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}
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return
false
;
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}
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}
// namespace gem5
gem5::BaseMMU::Mode
Mode
Definition
mmu.hh:56
gem5::BaseMMU::Write
@ Write
Definition
mmu.hh:56
gem5::Flags< FlagsType >
gem5::Process::allocateMem
void allocateMem(Addr vaddr, int64_t size, bool clobber=false)
Definition
process.cc:317
gem5::SETranslatingPortProxy::SETranslatingPortProxy
SETranslatingPortProxy(ThreadContext *tc, AllocType alloc=NextPage, Request::Flags _flags=0)
Definition
se_translating_port_proxy.cc:49
gem5::SETranslatingPortProxy::AllocType
AllocType
Definition
se_translating_port_proxy.hh:54
gem5::SETranslatingPortProxy::Always
@ Always
Definition
se_translating_port_proxy.hh:55
gem5::SETranslatingPortProxy::NextPage
@ NextPage
Definition
se_translating_port_proxy.hh:57
gem5::SETranslatingPortProxy::allocating
AllocType allocating
Definition
se_translating_port_proxy.hh:61
gem5::SETranslatingPortProxy::fixupRange
bool fixupRange(const TranslationGen::Range &range, BaseMMU::Mode mode) const override
Definition
se_translating_port_proxy.cc:55
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition
guest_abi.test.cc:41
gem5::ThreadContext::getProcessPtr
virtual Process * getProcessPtr()=0
gem5::TranslatingPortProxy
This proxy attempts to translate virtual addresses using the TLBs.
Definition
translating_port_proxy.hh:61
gem5::TranslatingPortProxy::_tc
ThreadContext * _tc
Definition
translating_port_proxy.hh:63
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition
misc_types.hh:74
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
se_translating_port_proxy.hh
process.hh
system.hh
gem5::TranslationGen::Range
This structure represents a single, contiguous translation, or carries information about whatever fau...
Definition
translation_gen.hh:70
gem5::TranslationGen::Range::size
Addr size
Definition
translation_gen.hh:72
gem5::TranslationGen::Range::vaddr
Addr vaddr
Definition
translation_gen.hh:71
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