gem5  v21.1.0.2
mmu.hh
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37 
38 #ifndef __ARCH_GENERIC_MMU_HH__
39 #define __ARCH_GENERIC_MMU_HH__
40 
41 #include "params/BaseMMU.hh"
42 #include "mem/request.hh"
43 #include "sim/sim_object.hh"
44 
45 namespace gem5
46 {
47 
48 class BaseTLB;
49 
50 class BaseMMU : public SimObject
51 {
52  public:
53  enum Mode { Read, Write, Execute };
54 
56  {
57  public:
58  virtual ~Translation()
59  {}
60 
65  virtual void markDelayed() = 0;
66 
67  /*
68  * The memory for this object may be dynamically allocated, and it may
69  * be responsible for cleaning itself up which will happen in this
70  * function. Once it's called, the object is no longer valid.
71  */
72  virtual void finish(const Fault &fault, const RequestPtr &req,
74 
81  virtual bool squashed() const { return false; }
82  };
83 
84  protected:
85  typedef BaseMMUParams Params;
86 
87  BaseMMU(const Params &p)
88  : SimObject(p), dtb(p.dtb), itb(p.itb)
89  {}
90 
91  BaseTLB*
92  getTlb(Mode mode) const
93  {
94  if (mode == Execute)
95  return itb;
96  else
97  return dtb;
98  }
99 
100  public:
101  virtual void flushAll();
102 
103  void demapPage(Addr vaddr, uint64_t asn);
104 
106  Mode mode);
107 
108  void translateTiming(const RequestPtr &req, ThreadContext *tc,
109  Translation *translation, Mode mode);
110 
112  Mode mode);
113 
115  Mode mode) const;
116 
117  virtual void takeOverFrom(BaseMMU *old_mmu);
118 
119  public:
122 };
123 
124 } // namespace gem5
125 
126 #endif
gem5::BaseMMU::getTlb
BaseTLB * getTlb(Mode mode) const
Definition: mmu.hh:92
gem5::BaseMMU::Translation::squashed
virtual bool squashed() const
This function is used by the page table walker to determine if it should translate the a pending requ...
Definition: mmu.hh:81
gem5::BaseMMU::Read
@ Read
Definition: mmu.hh:53
gem5::BaseMMU::dtb
BaseTLB * dtb
Definition: mmu.hh:120
gem5::BaseMMU::Mode
Mode
Definition: mmu.hh:53
gem5::BaseMMU::Write
@ Write
Definition: mmu.hh:53
gem5::BaseMMU::Translation::markDelayed
virtual void markDelayed()=0
Signal that the translation has been delayed due to a hw page table walk.
gem5::BaseMMU::Params
BaseMMUParams Params
Definition: mmu.hh:85
request.hh
gem5::BaseMMU::Execute
@ Execute
Definition: mmu.hh:53
gem5::BaseMMU
Definition: mmu.hh:50
gem5::BaseMMU::translateFunctional
Fault translateFunctional(const RequestPtr &req, ThreadContext *tc, Mode mode)
Definition: mmu.cc:79
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:255
sim_object.hh
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::RequestPtr
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
gem5::BaseTLB
Definition: tlb.hh:54
gem5::BaseMMU::demapPage
void demapPage(Addr vaddr, uint64_t asn)
Definition: mmu.cc:58
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::BaseMMU::translateTiming
void translateTiming(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode)
Definition: mmu.cc:72
gem5::BaseMMU::Translation
Definition: mmu.hh:55
gem5::BaseMMU::flushAll
virtual void flushAll()
Definition: mmu.cc:51
gem5::MipsISA::vaddr
vaddr
Definition: pra_constants.hh:278
gem5::BaseMMU::finalizePhysical
Fault finalizePhysical(const RequestPtr &req, ThreadContext *tc, Mode mode) const
Definition: mmu.cc:86
gem5::BaseMMU::translateAtomic
Fault translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode)
Definition: mmu.cc:65
gem5::BaseMMU::Translation::~Translation
virtual ~Translation()
Definition: mmu.hh:58
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::BaseMMU::BaseMMU
BaseMMU(const Params &p)
Definition: mmu.hh:87
gem5::BaseMMU::takeOverFrom
virtual void takeOverFrom(BaseMMU *old_mmu)
Definition: mmu.cc:93
gem5::BaseMMU::Translation::finish
virtual void finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode)=0
gem5::BaseMMU::itb
BaseTLB * itb
Definition: mmu.hh:121
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:73

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