gem5  v21.2.1.1
mmu.hh
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37 
38 #ifndef __ARCH_GENERIC_MMU_HH__
39 #define __ARCH_GENERIC_MMU_HH__
40 
41 #include <set>
42 
43 #include "mem/request.hh"
44 #include "mem/translation_gen.hh"
45 #include "params/BaseMMU.hh"
46 #include "sim/sim_object.hh"
47 
48 namespace gem5
49 {
50 
51 class BaseTLB;
52 
53 class BaseMMU : public SimObject
54 {
55  public:
56  enum Mode { Read, Write, Execute };
57 
59  {
60  public:
61  virtual ~Translation()
62  {}
63 
68  virtual void markDelayed() = 0;
69 
70  /*
71  * The memory for this object may be dynamically allocated, and it may
72  * be responsible for cleaning itself up which will happen in this
73  * function. Once it's called, the object is no longer valid.
74  */
75  virtual void finish(const Fault &fault, const RequestPtr &req,
77 
84  virtual bool squashed() const { return false; }
85  };
86 
87  protected:
88  typedef BaseMMUParams Params;
89 
90  BaseMMU(const Params &p)
91  : SimObject(p), dtb(p.dtb), itb(p.itb)
92  {}
93 
94  BaseTLB*
95  getTlb(Mode mode) const
96  {
97  if (mode == Execute)
98  return itb;
99  else
100  return dtb;
101  }
102 
103  public:
108  void init() override;
109 
110  virtual void flushAll();
111 
112  void demapPage(Addr vaddr, uint64_t asn);
113 
114  virtual Fault
115  translateAtomic(const RequestPtr &req, ThreadContext *tc,
116  Mode mode);
117 
118  virtual void
119  translateTiming(const RequestPtr &req, ThreadContext *tc,
120  Translation *translation, Mode mode);
121 
122  virtual Fault
124  Mode mode);
125 
127  {
128  private:
135 
136  void translate(Range &range) const override;
137 
138  public:
139  MMUTranslationGen(Addr page_bytes, Addr new_start, Addr new_size,
140  ThreadContext *new_tc, BaseMMU *new_mmu,
141  BaseMMU::Mode new_mode, Request::Flags new_flags);
142  };
143 
148  virtual TranslationGenPtr translateFunctional(Addr start, Addr size,
150 
151  virtual Fault
152  finalizePhysical(const RequestPtr &req, ThreadContext *tc,
153  Mode mode) const;
154 
155  virtual void takeOverFrom(BaseMMU *old_mmu);
156 
157  public:
160 
161  protected:
181  std::set<BaseTLB*> instruction;
182  std::set<BaseTLB*> data;
183  std::set<BaseTLB*> unified;
184 
185 };
186 
187 } // namespace gem5
188 
189 #endif
gem5::BaseMMU::getTlb
BaseTLB * getTlb(Mode mode) const
Definition: mmu.hh:95
gem5::BaseMMU::Translation::squashed
virtual bool squashed() const
This function is used by the page table walker to determine if it should translate the a pending requ...
Definition: mmu.hh:84
gem5::BaseMMU::Read
@ Read
Definition: mmu.hh:56
gem5::BaseMMU::dtb
BaseTLB * dtb
Definition: mmu.hh:158
gem5::BaseMMU::Mode
Mode
Definition: mmu.hh:56
gem5::BaseMMU::MMUTranslationGen::translate
void translate(Range &range) const override
Subclasses implement this function to complete TranslationGen.
Definition: mmu.cc:140
gem5::BaseMMU::Write
@ Write
Definition: mmu.hh:56
gem5::BaseMMU::Translation::markDelayed
virtual void markDelayed()=0
Signal that the translation has been delayed due to a hw page table walk.
gem5::BaseMMU::init
void init() override
Called at init time, this method is traversing the TLB hierarchy and pupulating the instruction/data/...
Definition: mmu.cc:53
gem5::BaseMMU::Params
BaseMMUParams Params
Definition: mmu.hh:88
gem5::BaseMMU::MMUTranslationGen::pageBytes
const Addr pageBytes
Definition: mmu.hh:134
gem5::BaseMMU::MMUTranslationGen::cid
ContextID cid
Definition: mmu.hh:130
request.hh
gem5::BaseMMU::MMUTranslationGen::mmu
BaseMMU * mmu
Definition: mmu.hh:131
gem5::TranslationGen::Range
This structure represents a single, contiguous translation, or carries information about whatever fau...
Definition: translation_gen.hh:68
gem5::BaseMMU::Execute
@ Execute
Definition: mmu.hh:56
gem5::BaseMMU
Definition: mmu.hh:53
gem5::BaseMMU::translateFunctional
virtual Fault translateFunctional(const RequestPtr &req, ThreadContext *tc, Mode mode)
Definition: mmu.cc:118
gem5::BaseMMU::MMUTranslationGen::tc
ThreadContext * tc
Definition: mmu.hh:129
gem5::Flags< FlagsType >
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:94
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:255
sim_object.hh
gem5::BaseMMU::unified
std::set< BaseTLB * > unified
Definition: mmu.hh:183
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
translation_gen.hh
gem5::RequestPtr
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
gem5::BaseTLB
Definition: tlb.hh:58
gem5::BaseMMU::demapPage
void demapPage(Addr vaddr, uint64_t asn)
Definition: mmu.cc:97
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::TranslationGen
TranslationGen is a base class for a generator object which returns information about address transla...
Definition: translation_gen.hh:60
gem5::BaseMMU::translateTiming
virtual void translateTiming(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode)
Definition: mmu.cc:111
gem5::BaseMMU::instruction
std::set< BaseTLB * > instruction
It is possible from the MMU to traverse the entire hierarchy of TLBs, starting from the DTB and ITB (...
Definition: mmu.hh:181
gem5::BaseMMU::Translation
Definition: mmu.hh:58
gem5::ContextID
int ContextID
Globally unique thread context ID.
Definition: types.hh:246
gem5::BaseMMU::flushAll
virtual void flushAll()
Definition: mmu.cc:81
gem5::BaseMMU::MMUTranslationGen::flags
Request::Flags flags
Definition: mmu.hh:133
gem5::MipsISA::vaddr
vaddr
Definition: pra_constants.hh:278
gem5::BaseMMU::finalizePhysical
virtual Fault finalizePhysical(const RequestPtr &req, ThreadContext *tc, Mode mode) const
Definition: mmu.cc:125
gem5::BaseMMU::translateAtomic
virtual Fault translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode)
Definition: mmu.cc:104
gem5::BaseMMU::Translation::~Translation
virtual ~Translation()
Definition: mmu.hh:61
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::BaseMMU::BaseMMU
BaseMMU(const Params &p)
Definition: mmu.hh:90
gem5::BaseMMU::MMUTranslationGen::MMUTranslationGen
MMUTranslationGen(Addr page_bytes, Addr new_start, Addr new_size, ThreadContext *new_tc, BaseMMU *new_mmu, BaseMMU::Mode new_mode, Request::Flags new_flags)
Definition: mmu.cc:131
gem5::BaseMMU::takeOverFrom
virtual void takeOverFrom(BaseMMU *old_mmu)
Definition: mmu.cc:157
gem5::BaseMMU::Translation::finish
virtual void finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode)=0
gem5::BaseMMU::data
std::set< BaseTLB * > data
Definition: mmu.hh:182
gem5::TranslationGenPtr
std::unique_ptr< TranslationGen > TranslationGenPtr
Definition: translation_gen.hh:128
gem5::BaseMMU::itb
BaseTLB * itb
Definition: mmu.hh:159
gem5::BaseMMU::MMUTranslationGen
Definition: mmu.hh:126
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:74
gem5::BaseMMU::MMUTranslationGen::mode
BaseMMU::Mode mode
Definition: mmu.hh:132

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