gem5 v24.0.0.0
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smmu_v3_caches.cc File Reference
#include "dev/arm/smmu_v3_caches.hh"
#include <numeric>
#include "base/bitfield.hh"
#include "base/intmath.hh"
#include "base/logging.hh"
#include "sim/stats.hh"

Go to the source code of this file.

Namespaces

namespace  gem5
 Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
 

Macros

#define SMMUTLB_SEED   0xEA752DFE
 
#define ARMARCHTLB_SEED   0x8B021FA1
 
#define IPACACHE_SEED   0xE5A0CC0F
 
#define CONFIGCACHE_SEED   0xB56F74E8
 
#define WALKCACHE_SEED   0x18ACF3D6
 

Macro Definition Documentation

◆ ARMARCHTLB_SEED

#define ARMARCHTLB_SEED   0x8B021FA1

Definition at line 50 of file smmu_v3_caches.cc.

◆ CONFIGCACHE_SEED

#define CONFIGCACHE_SEED   0xB56F74E8

Definition at line 52 of file smmu_v3_caches.cc.

◆ IPACACHE_SEED

#define IPACACHE_SEED   0xE5A0CC0F

Definition at line 51 of file smmu_v3_caches.cc.

◆ SMMUTLB_SEED

#define SMMUTLB_SEED   0xEA752DFE

Definition at line 49 of file smmu_v3_caches.cc.

◆ WALKCACHE_SEED

#define WALKCACHE_SEED   0x18ACF3D6

Definition at line 53 of file smmu_v3_caches.cc.


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