gem5::VegaISA::InFmt_MIMG Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	OPM: 1
unsigned int	pad_1_7: 7
unsigned int	DMASK: 4
unsigned int	UNRM: 1
unsigned int	GLC: 1
unsigned int	DA: 1
unsigned int	A16: 1
unsigned int	TFE: 1
unsigned int	LWE: 1
unsigned int	OP: 7
unsigned int	SLC: 1
unsigned int	ENCODING: 6

Detailed Description

Definition at line 1738 of file gpu_decoder.hh.

Member Data Documentation

A16

unsigned int gem5::VegaISA::InFmt_MIMG::A16

Definition at line 1745 of file gpu_decoder.hh.

DA

unsigned int gem5::VegaISA::InFmt_MIMG::DA

Definition at line 1744 of file gpu_decoder.hh.

DMASK

unsigned int gem5::VegaISA::InFmt_MIMG::DMASK

Definition at line 1741 of file gpu_decoder.hh.

ENCODING

unsigned int gem5::VegaISA::InFmt_MIMG::ENCODING

Definition at line 1750 of file gpu_decoder.hh.

GLC

unsigned int gem5::VegaISA::InFmt_MIMG::GLC

Definition at line 1743 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_MIMG::Inst_MIMG(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_ADD::Inst_MIMG__IMAGE_ATOMIC_ADD(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_AND::Inst_MIMG__IMAGE_ATOMIC_AND(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_CMPSWAP::Inst_MIMG__IMAGE_ATOMIC_CMPSWAP(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_DEC::Inst_MIMG__IMAGE_ATOMIC_DEC(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_INC::Inst_MIMG__IMAGE_ATOMIC_INC(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_OR::Inst_MIMG__IMAGE_ATOMIC_OR(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_SMAX::Inst_MIMG__IMAGE_ATOMIC_SMAX(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_SMIN::Inst_MIMG__IMAGE_ATOMIC_SMIN(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_SUB::Inst_MIMG__IMAGE_ATOMIC_SUB(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_SWAP::Inst_MIMG__IMAGE_ATOMIC_SWAP(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_UMAX::Inst_MIMG__IMAGE_ATOMIC_UMAX(), gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_UMIN::Inst_MIMG__IMAGE_ATOMIC_UMIN(), and gem5::VegaISA::Inst_MIMG__IMAGE_ATOMIC_XOR::Inst_MIMG__IMAGE_ATOMIC_XOR().

LWE

unsigned int gem5::VegaISA::InFmt_MIMG::LWE

Definition at line 1747 of file gpu_decoder.hh.

OP

unsigned int gem5::VegaISA::InFmt_MIMG::OP

Definition at line 1748 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Decoder::subDecode_OP_MIMG().

OPM

unsigned int gem5::VegaISA::InFmt_MIMG::OPM

Definition at line 1739 of file gpu_decoder.hh.

pad_1_7

unsigned int gem5::VegaISA::InFmt_MIMG::pad_1_7

Definition at line 1740 of file gpu_decoder.hh.

SLC

unsigned int gem5::VegaISA::InFmt_MIMG::SLC

Definition at line 1749 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_MIMG::Inst_MIMG().

TFE

unsigned int gem5::VegaISA::InFmt_MIMG::TFE

Definition at line 1746 of file gpu_decoder.hh.

UNRM

unsigned int gem5::VegaISA::InFmt_MIMG::UNRM

Definition at line 1742 of file gpu_decoder.hh.

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The documentation for this struct was generated from the following file:

• arch/amdgpu/vega/gpu_decoder.hh