gem5::VegaISA::InFmt_VOP1 Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	SRC0: 9
unsigned int	OP: 8
unsigned int	VDST: 8
unsigned int	ENCODING: 7

Detailed Description

Definition at line 1867 of file gpu_decoder.hh.

Member Data Documentation

ENCODING

unsigned int gem5::VegaISA::InFmt_VOP1::ENCODING

Definition at line 1871 of file gpu_decoder.hh.

OP

unsigned int gem5::VegaISA::InFmt_VOP1::OP

Definition at line 1869 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_VOP1::initOperandInfo(), and gem5::VegaISA::Decoder::subDecode_OP_VOP1().

SRC0

unsigned int gem5::VegaISA::InFmt_VOP1::SRC0

Definition at line 1868 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_VOP1__V_ACCVGPR_MOV_B32::execute(), gem5::VegaISA::Inst_VOP1__V_BFREV_B32::execute(), gem5::VegaISA::Inst_VOP1__V_CEIL_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CEIL_F64::execute(), gem5::VegaISA::Inst_VOP1__V_COS_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F16_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_F16::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_I32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_U32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE0::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE1::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE2::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE3::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_I32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_U32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_FLR_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_I32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_RPI_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_U32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_U32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_EXP_F32::execute(), gem5::VegaISA::Inst_VOP1__V_EXP_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBH_I32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBH_U32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBL_B32::execute(), gem5::VegaISA::Inst_VOP1__V_FLOOR_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FLOOR_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FRACT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FRACT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_LOG_F32::execute(), gem5::VegaISA::Inst_VOP1__V_LOG_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP1__V_MOV_B32::execute(), gem5::VegaISA::Inst_VOP1__V_MOV_B64::execute(), gem5::VegaISA::Inst_VOP1__V_NOT_B32::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_F64::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_IFLAG_F32::execute(), gem5::VegaISA::Inst_VOP1__V_READFIRSTLANE_B32::execute(), gem5::VegaISA::Inst_VOP1__V_RNDNE_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RNDNE_F64::execute(), gem5::VegaISA::Inst_VOP1__V_RSQ_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RSQ_F64::execute(), gem5::VegaISA::Inst_VOP1__V_SIN_F32::execute(), gem5::VegaISA::Inst_VOP1__V_SQRT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_SQRT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_TRUNC_F32::execute(), gem5::VegaISA::Inst_VOP1__V_TRUNC_F64::execute(), gem5::VegaISA::Inst_VOP1::generateDisassembly(), gem5::VegaISA::Inst_VOP1::hasSecondDword(), gem5::VegaISA::Inst_VOP1::initOperandInfo(), and gem5::VegaISA::Inst_VOP1::Inst_VOP1().

VDST

unsigned int gem5::VegaISA::InFmt_VOP1::VDST

Definition at line 1870 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_VOP1__V_ACCVGPR_MOV_B32::execute(), gem5::VegaISA::Inst_VOP1__V_BFREV_B32::execute(), gem5::VegaISA::Inst_VOP1__V_CEIL_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CEIL_F64::execute(), gem5::VegaISA::Inst_VOP1__V_COS_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F16_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_F16::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_I32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_U32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE0::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE1::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE2::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F32_UBYTE3::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_I32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_F64_U32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_FLR_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_I32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_RPI_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_U32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_CVT_U32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_EXP_F32::execute(), gem5::VegaISA::Inst_VOP1__V_EXP_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBH_I32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBH_U32::execute(), gem5::VegaISA::Inst_VOP1__V_FFBL_B32::execute(), gem5::VegaISA::Inst_VOP1__V_FLOOR_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FLOOR_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FRACT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FRACT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I32_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_EXP_I32_F64::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_FREXP_MANT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_LOG_F32::execute(), gem5::VegaISA::Inst_VOP1__V_LOG_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP1__V_MOV_B32::execute(), gem5::VegaISA::Inst_VOP1__V_MOV_B64::execute(), gem5::VegaISA::Inst_VOP1__V_NOT_B32::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_F64::execute(), gem5::VegaISA::Inst_VOP1__V_RCP_IFLAG_F32::execute(), gem5::VegaISA::Inst_VOP1__V_READFIRSTLANE_B32::execute(), gem5::VegaISA::Inst_VOP1__V_RNDNE_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RNDNE_F64::execute(), gem5::VegaISA::Inst_VOP1__V_RSQ_F32::execute(), gem5::VegaISA::Inst_VOP1__V_RSQ_F64::execute(), gem5::VegaISA::Inst_VOP1__V_SIN_F32::execute(), gem5::VegaISA::Inst_VOP1__V_SQRT_F32::execute(), gem5::VegaISA::Inst_VOP1__V_SQRT_F64::execute(), gem5::VegaISA::Inst_VOP1__V_TRUNC_F32::execute(), gem5::VegaISA::Inst_VOP1__V_TRUNC_F64::execute(), gem5::VegaISA::Inst_VOP1::generateDisassembly(), and gem5::VegaISA::Inst_VOP1::initOperandInfo().

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The documentation for this struct was generated from the following file:

• arch/amdgpu/vega/gpu_decoder.hh