gem5  v21.1.0.2
Public Attributes | List of all members
gem5::VegaISA::InFmt_VOP2 Struct Reference

#include <gpu_decoder.hh>

Public Attributes

unsigned int SRC0: 9
 
unsigned int VSRC1: 8
 
unsigned int VDST: 8
 
unsigned int OP: 6
 
unsigned int ENCODING: 1
 

Detailed Description

Definition at line 1794 of file gpu_decoder.hh.

Member Data Documentation

◆ ENCODING

unsigned int gem5::VegaISA::InFmt_VOP2::ENCODING

Definition at line 1799 of file gpu_decoder.hh.

◆ OP

unsigned int gem5::VegaISA::InFmt_VOP2::OP

◆ SRC0

unsigned int gem5::VegaISA::InFmt_VOP2::SRC0

Definition at line 1795 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_VOP2__V_CNDMASK_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_AND_B32::execute(), gem5::VegaISA::Inst_VOP2__V_OR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_XOR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_MAC_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADMK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADAK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADDC_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LO_U16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I16::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U32::execute(), gem5::VegaISA::Inst_VOP2::generateDisassembly(), gem5::VegaISA::Inst_VOP2::hasSecondDword(), gem5::VegaISA::Inst_VOP2::initOperandInfo(), and gem5::VegaISA::Inst_VOP2::Inst_VOP2().

◆ VDST

unsigned int gem5::VegaISA::InFmt_VOP2::VDST

Definition at line 1797 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_VOP2__V_CNDMASK_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_AND_B32::execute(), gem5::VegaISA::Inst_VOP2__V_OR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_XOR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_MAC_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADMK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADAK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADDC_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LO_U16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I16::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U32::execute(), gem5::VegaISA::Inst_VOP2::generateDisassembly(), and gem5::VegaISA::Inst_VOP2::initOperandInfo().

◆ VSRC1

unsigned int gem5::VegaISA::InFmt_VOP2::VSRC1

Definition at line 1796 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_VOP2__V_CNDMASK_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_F32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LEGACY_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_I32_I24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_HI_U32_U24::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I32::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U32::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I32::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B32::execute(), gem5::VegaISA::Inst_VOP2__V_AND_B32::execute(), gem5::VegaISA::Inst_VOP2__V_OR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_XOR_B32::execute(), gem5::VegaISA::Inst_VOP2__V_MAC_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADMK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_MADAK_F32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADDC_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBB_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBBREV_CO_U32::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U16::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MUL_LO_U16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHLREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_LSHRREV_B16::execute(), gem5::VegaISA::Inst_VOP2__V_ASHRREV_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MAX_I16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_U16::execute(), gem5::VegaISA::Inst_VOP2__V_MIN_I16::execute(), gem5::VegaISA::Inst_VOP2__V_ADD_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUB_U32::execute(), gem5::VegaISA::Inst_VOP2__V_SUBREV_U32::execute(), gem5::VegaISA::Inst_VOP2::generateDisassembly(), and gem5::VegaISA::Inst_VOP2::initOperandInfo().


The documentation for this struct was generated from the following file:

Generated on Tue Sep 21 2021 12:32:37 for gem5 by doxygen 1.8.17