gem5 v24.0.0.0
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gem5::VegaISA::InFmt_VOP_SDWA Struct Reference

#include <gpu_decoder.hh>

Public Attributes

unsigned int SRC0: 8
 
unsigned int DST_SEL: 3
 
unsigned int DST_U: 2
 
unsigned int CLMP: 1
 
unsigned int OMOD: 2
 
unsigned int SRC0_SEL: 3
 
unsigned int SRC0_SEXT: 1
 
unsigned int SRC0_NEG: 1
 
unsigned int SRC0_ABS: 1
 
unsigned int pad_22: 1
 
unsigned int S0: 1
 
unsigned int SRC1_SEL: 3
 
unsigned int SRC1_SEXT: 1
 
unsigned int SRC1_NEG: 1
 
unsigned int SRC1_ABS: 1
 
unsigned int pad_30: 1
 
unsigned int S1: 1
 

Detailed Description

Definition at line 1927 of file gpu_decoder.hh.

Member Data Documentation

◆ CLMP

◆ DST_SEL

◆ DST_U

◆ OMOD

unsigned int gem5::VegaISA::InFmt_VOP_SDWA::OMOD

Definition at line 1932 of file gpu_decoder.hh.

◆ pad_22

unsigned int gem5::VegaISA::InFmt_VOP_SDWA::pad_22

Definition at line 1937 of file gpu_decoder.hh.

◆ pad_30

unsigned int gem5::VegaISA::InFmt_VOP_SDWA::pad_30

Definition at line 1943 of file gpu_decoder.hh.

◆ S0

unsigned int gem5::VegaISA::InFmt_VOP_SDWA::S0

Definition at line 1938 of file gpu_decoder.hh.

◆ S1

unsigned int gem5::VegaISA::InFmt_VOP_SDWA::S1

Definition at line 1944 of file gpu_decoder.hh.

◆ SRC0

◆ SRC0_ABS

◆ SRC0_NEG

◆ SRC0_SEL

◆ SRC0_SEXT

◆ SRC1_ABS

◆ SRC1_NEG

◆ SRC1_SEL

◆ SRC1_SEXT


The documentation for this struct was generated from the following file:

Generated on Tue Jun 18 2024 16:24:25 for gem5 by doxygen 1.11.0