gem5  v22.0.0.2
system_hub.cc
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31 
32 #include "dev/amdgpu/system_hub.hh"
33 
34 #include "mem/port.hh"
35 
36 namespace gem5
37 {
38 
39 void
41 {
42  ResponseEvent *dmaRespEvent = new ResponseEvent(callback);
43  Tick delay = 0;
44 
45  if (pkt->isWrite()) {
46  dmaWrite(pkt->getAddr(), pkt->getSize(), dmaRespEvent,
47  pkt->getPtr<uint8_t>(), 0, 0, delay);
48  } else {
49  assert(pkt->isRead());
50  dmaRead(pkt->getAddr(), pkt->getSize(), dmaRespEvent,
51  pkt->getPtr<uint8_t>(), 0, 0, delay);
52  }
53 }
54 
55 void
57 {
58 }
59 
61  : callback(_callback)
62 {
63  // Delete this event after process is called
65 }
66 
67 void
69 {
70  callback->process();
71 }
72 
75 {
76  AddrRangeList ranges;
77  return ranges;
78 }
79 
80 } // namespace gem5
gem5::AMDGPUSystemHub::getAddrRanges
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
Definition: system_hub.cc:74
gem5::Packet::isWrite
bool isWrite() const
Definition: packet.hh:591
gem5::AMDGPUSystemHub::sendRequest
void sendRequest(PacketPtr pkt, Event *callback)
Definition: system_hub.cc:40
gem5::AMDGPUSystemHub::ResponseEvent::ResponseEvent
ResponseEvent(Event *_callback)
Definition: system_hub.cc:60
gem5::DmaDevice::dmaRead
void dmaRead(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
Definition: dma_device.hh:228
gem5::AMDGPUSystemHub::ResponseEvent::process
void process()
Definition: system_hub.cc:68
gem5::Event::setFlags
void setFlags(Flags _flags)
Definition: eventq.hh:328
gem5::EventBase::AutoDelete
static const FlagsType AutoDelete
Definition: eventq.hh:107
gem5::Packet::isRead
bool isRead() const
Definition: packet.hh:590
gem5::Event
Definition: eventq.hh:251
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:291
system_hub.hh
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
port.hh
gem5::DmaDevice::dmaWrite
void dmaWrite(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
Definition: dma_device.hh:214
gem5::AMDGPUSystemHub::dmaResponse
void dmaResponse(PacketPtr pkt)
Definition: system_hub.cc:56
gem5::AMDGPUSystemHub::ResponseEvent
Definition: system_hub.hh:67
std::list< AddrRange >
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:790
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:800
gem5::Packet::getPtr
T * getPtr()
get a pointer to the data ptr.
Definition: packet.hh:1197

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