gem5 v24.0.0.0
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ide_ctrl.hh
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1/*
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27
28#ifndef __DEV_X86_IDE_CTRL_HH__
29#define __DEV_X86_IDE_CTRL_HH__
30
31#include <vector>
32
33#include "dev/intpin.hh"
35#include "params/X86IdeController.hh"
36
37namespace gem5
38{
39
41{
42 private:
45
46 public:
49
50 Port &getPort(const std::string &if_name,
51 PortID idx=InvalidPortID) override;
52
53 void postInterrupt(bool is_primary) override;
54 void clearInterrupt(bool is_primary) override;
55};
56
57} // namespace gem5
58
59#endif // __DEV_X86_IDE_CTRL_HH_
DmaDeviceParams Params
Device model for an Intel PIIX4 IDE controller.
Definition ide_ctrl.hh:53
Ports are used to interface objects to each other.
Definition port.hh:62
std::vector< IntSourcePin< X86IdeController > * > intPrimary
Definition ide_ctrl.hh:43
void clearInterrupt(bool is_primary) override
Definition ide_ctrl.cc:54
PARAMS(X86IdeController)
X86IdeController(const Params &p)
Definition ide_ctrl.cc:33
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition ide_ctrl.cc:62
void postInterrupt(bool is_primary) override
Definition ide_ctrl.cc:46
std::vector< IntSourcePin< X86IdeController > * > intSecondary
Definition ide_ctrl.hh:44
STL vector class.
Definition stl.hh:37
Bitfield< 0 > p
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
const PortID InvalidPortID
Definition types.hh:246
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition types.hh:245
Simple PCI IDE controller with bus mastering capability and UDMA modeled after controller in the Inte...

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