gem5 v24.0.0.0
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gem5::IdeController Class Reference

Device model for an Intel PIIX4 IDE controller. More...

#include <ide_ctrl.hh>

Inheritance diagram for gem5::IdeController:
gem5::PciDevice gem5::DmaDevice gem5::PioDevice gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named gem5::X86IdeController

Classes

class  Channel
 

Public Member Functions

 PARAMS (IdeController)
 
 IdeController (const Params &p)
 
virtual void postInterrupt (bool is_primary)
 
virtual void clearInterrupt (bool is_primary)
 
Tick writeConfig (PacketPtr pkt) override
 Write to the PCI config space data that is stored locally.
 
Tick readConfig (PacketPtr pkt) override
 Read from the PCI config space data that is stored locally.
 
Tick read (PacketPtr pkt) override
 Pure virtual function that the device must implement.
 
Tick write (PacketPtr pkt) override
 Pure virtual function that the device must implement.
 
void serialize (CheckpointOut &cp) const override
 Serialize an object.
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object.
 
- Public Member Functions inherited from gem5::PciDevice
Addr pciToDma (Addr pci_addr) const
 
void intrPost ()
 
void intrClear ()
 
uint8_t interruptLine () const
 
AddrRangeList getAddrRanges () const override
 Determine the address ranges that this device responds to.
 
 PciDevice (const PciDeviceParams &params)
 Constructor for PCI Dev.
 
void serialize (CheckpointOut &cp) const override
 Serialize this object to the given output stream.
 
void unserialize (CheckpointIn &cp) override
 Reconstruct the state of this object from a checkpoint.
 
const PciBusAddrbusAddr () const
 
- Public Member Functions inherited from gem5::DmaDevice
 DmaDevice (const Params &p)
 
virtual ~DmaDevice ()=default
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
bool dmaPending () const
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected.
 
Addr cacheBlockSize () const
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index.
 
- Public Member Functions inherited from gem5::PioDevice
 PioDevice (const Params &p)
 
virtual ~PioDevice ()
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected.
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index.
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint.
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint.
 
virtual void regProbePoints ()
 Register probe points for this object.
 
virtual void regProbeListeners ()
 Register probe listeners for this object.
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object.
 
virtual void startup ()
 startup() is the final initialization call before simulation.
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining.
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes.
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers.
 
void serialize (CheckpointOut &cp) const override
 Serialize an object.
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object.
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue.
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section.
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object.
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object.
 
virtual void notifyFork ()
 Notify a child process of a fork.
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group.
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters.
 
virtual void resetStats ()
 Callback to reset stats.
 
virtual void preDumpStats ()
 Callback before stats are dumped.
 
void addStat (statistics::Info *info)
 Register a stat with this group.
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object.
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object.
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block.
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group.
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block.
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick.
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge.
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Private Member Functions

 BitUnion8 (BMIStatusReg) Bitfield< 6 > dmaCap0
 
 EndBitUnion (BMIStatusReg) BitUnion8(BMICommandReg) Bitfield< 3 > rw
 
void dispatchAccess (PacketPtr pkt, bool read)
 

Private Attributes

Bitfield< 5 > dmaCap1
 
Bitfield< 2 > intStatus
 
Bitfield< 1 > dmaError
 
Bitfield< 0 > active
 
Bitfield< 0 > startStop
 
EndBitUnion(BMICommandReg) class ConfigSpaceRegs ConfigSpaceRegs configSpaceRegs
 Registers used in device specific PCI configuration.
 
Channel primary
 
Channel secondary
 
uint32_t ioShift
 
uint32_t ctrlOffset
 

Additional Inherited Members

- Public Types inherited from gem5::DmaDevice
typedef DmaDeviceParams Params
 
- Public Types inherited from gem5::PioDevice
using Params = PioDeviceParams
 
- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject.
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system.
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it.
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section.
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it.
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 
- Protected Member Functions inherited from gem5::PciDevice
bool getBAR (Addr addr, int &num, Addr &offs)
 Which base address register (if any) maps the given address?
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain.
 
void signalDrainDone () const
 Signal that an object is drained.
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters.
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance.
 
void resetClock () const
 Reset the object's clock using the current global tick value.
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.
 
- Protected Attributes inherited from gem5::PciDevice
const PciBusAddr _busAddr
 
PCIConfig config
 The current config space.
 
std::vector< MSIXTablemsix_table
 MSIX Table and PBA Structures.
 
std::vector< MSIXPbaEntrymsix_pba
 
std::array< PciBar *, 6 > BARs {}
 
PciHost::DeviceInterface hostInterface
 
Tick pioDelay
 
Tick configDelay
 
const int PMCAP_BASE
 The capability list structures and base addresses.
 
const int PMCAP_ID_OFFSET
 
const int PMCAP_PC_OFFSET
 
const int PMCAP_PMCS_OFFSET
 
PMCAP pmcap
 
const int MSICAP_BASE
 
MSICAP msicap
 
const int MSIXCAP_BASE
 
const int MSIXCAP_ID_OFFSET
 
const int MSIXCAP_MXC_OFFSET
 
const int MSIXCAP_MTAB_OFFSET
 
const int MSIXCAP_MPBA_OFFSET
 
int MSIX_TABLE_OFFSET
 
int MSIX_TABLE_END
 
int MSIX_PBA_OFFSET
 
int MSIX_PBA_END
 
MSIXCAP msixcap
 
const int PXCAP_BASE
 
PXCAP pxcap
 
- Protected Attributes inherited from gem5::DmaDevice
DmaPort dmaPort
 
- Protected Attributes inherited from gem5::PioDevice
Systemsys
 
PioPort< PioDevicepioPort
 The pioPort that handles the requests for us and provides us requests that it sees.
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters.
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue.
 

Detailed Description

Device model for an Intel PIIX4 IDE controller.

Definition at line 52 of file ide_ctrl.hh.

Constructor & Destructor Documentation

◆ IdeController()

gem5::IdeController::IdeController ( const Params & p)

Member Function Documentation

◆ BitUnion8()

gem5::IdeController::BitUnion8 ( BMIStatusReg )
private

◆ clearInterrupt()

void gem5::IdeController::clearInterrupt ( bool is_primary)
virtual

Reimplemented in gem5::X86IdeController.

Definition at line 149 of file ide_ctrl.cc.

References gem5::PciDevice::intrClear(), primary, and secondary.

◆ dispatchAccess()

◆ EndBitUnion()

gem5::IdeController::EndBitUnion ( BMIStatusReg )
private

◆ PARAMS()

gem5::IdeController::PARAMS ( IdeController )

◆ postInterrupt()

void gem5::IdeController::postInterrupt ( bool is_primary)
virtual

Reimplemented in gem5::X86IdeController.

Definition at line 140 of file ide_ctrl.cc.

References gem5::PciDevice::intrPost(), primary, and secondary.

Referenced by gem5::IdeController::Channel::postInterrupt().

◆ read()

Tick gem5::IdeController::read ( PacketPtr pkt)
overridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters
pktPacket describing this request
Returns
number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 387 of file ide_ctrl.cc.

References dispatchAccess(), and gem5::PciDevice::pioDelay.

Referenced by gem5::IdeController::Channel::accessBMI(), gem5::IdeController::Channel::accessCommand(), gem5::IdeController::Channel::accessControl(), and dispatchAccess().

◆ readConfig()

Tick gem5::IdeController::readConfig ( PacketPtr pkt)
overridevirtual

Read from the PCI config space data that is stored locally.

This may be overridden by the device but at some point it will eventually call this for normal operations that it does not need to override.

Parameters
pktpacket containing the write the offset into config space

Reimplemented from gem5::PciDevice.

Definition at line 158 of file ide_ctrl.cc.

References gem5::PciDevice::configDelay, configSpaceRegs, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getPtr(), gem5::Packet::getSize(), gem5::Packet::getUintX(), gem5::Packet::makeAtomicResponse(), gem5::ArmISA::offset, PCI_CONFIG_SIZE, PCI_DEVICE_SPECIFIC, and gem5::PciDevice::readConfig().

◆ serialize()

void gem5::IdeController::serialize ( CheckpointOut & cp) const
overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters
cpCheckpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 401 of file ide_ctrl.cc.

References configSpaceRegs, primary, secondary, gem5::IdeController::Channel::serialize(), and gem5::PciDevice::serialize().

◆ unserialize()

void gem5::IdeController::unserialize ( CheckpointIn & cp)
overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters
cpCheckpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 429 of file ide_ctrl.cc.

References configSpaceRegs, primary, secondary, gem5::IdeController::Channel::unserialize(), and gem5::PciDevice::unserialize().

◆ write()

Tick gem5::IdeController::write ( PacketPtr pkt)
overridevirtual

Pure virtual function that the device must implement.

Called when a write command is recieved by the port.

Parameters
pktPacket describing this request
Returns
number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 394 of file ide_ctrl.cc.

References dispatchAccess(), and gem5::PciDevice::pioDelay.

◆ writeConfig()

Tick gem5::IdeController::writeConfig ( PacketPtr pkt)
overridevirtual

Write to the PCI config space data that is stored locally.

This may be overridden by the device but at some point it will eventually call this for normal operations that it does not need to override.

Parameters
pktpacket containing the write the offset into config space

Reimplemented from gem5::PciDevice.

Definition at line 177 of file ide_ctrl.cc.

References gem5::PciDevice::configDelay, configSpaceRegs, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getConstPtr(), gem5::Packet::getSize(), gem5::Packet::getUintX(), gem5::Packet::makeAtomicResponse(), gem5::ArmISA::offset, PCI_CONFIG_SIZE, PCI_DEVICE_SPECIFIC, and gem5::PciDevice::writeConfig().

Member Data Documentation

◆ active

Bitfield<0> gem5::IdeController::active
private

Definition at line 61 of file ide_ctrl.hh.

◆ configSpaceRegs

EndBitUnion (BMICommandReg) class ConfigSpaceRegs ConfigSpaceRegs gem5::IdeController::configSpaceRegs
private

Registers used in device specific PCI configuration.

Definition at line 106 of file ide_ctrl.hh.

Referenced by readConfig(), serialize(), unserialize(), and writeConfig().

◆ ctrlOffset

uint32_t gem5::IdeController::ctrlOffset
private

Definition at line 195 of file ide_ctrl.hh.

Referenced by dispatchAccess().

◆ dmaCap1

Bitfield<5> gem5::IdeController::dmaCap1
private

Definition at line 58 of file ide_ctrl.hh.

◆ dmaError

Bitfield<1> gem5::IdeController::dmaError
private

Definition at line 60 of file ide_ctrl.hh.

◆ intStatus

Bitfield<2> gem5::IdeController::intStatus
private

Definition at line 59 of file ide_ctrl.hh.

◆ ioShift

uint32_t gem5::IdeController::ioShift
private

Definition at line 195 of file ide_ctrl.hh.

Referenced by dispatchAccess().

◆ primary

Channel gem5::IdeController::primary
private

◆ secondary

Channel gem5::IdeController::secondary
private

◆ startStop

Bitfield<0> gem5::IdeController::startStop
private

Definition at line 66 of file ide_ctrl.hh.


The documentation for this class was generated from the following files:

Generated on Tue Jun 18 2024 16:24:12 for gem5 by doxygen 1.11.0