pipeline.hh

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 * Copyright (c) 2013-2014, 2017 ARM Limited
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 * licensed hereunder.  You may use the software subject to the license
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#ifndef __CPU_MINOR_PIPELINE_HH__
#define __CPU_MINOR_PIPELINE_HH__

#include "cpu/minor/activity.hh"
#include "cpu/minor/cpu.hh"
#include "cpu/minor/decode.hh"
#include "cpu/minor/execute.hh"
#include "cpu/minor/fetch1.hh"
#include "cpu/minor/fetch2.hh"
#include "params/MinorCPU.hh"
#include "sim/ticked_object.hh"

namespace Minor
{

class Pipeline : public Ticked
{
  protected:
    MinorCPU &cpu;

    bool allow_idling;

    Latch<ForwardLineData> f1ToF2;
    Latch<BranchData> f2ToF1;
    Latch<ForwardInstData> f2ToD;
    Latch<ForwardInstData> dToE;
    Latch<BranchData> eToF1;

    Execute execute;
    Decode decode;
    Fetch2 fetch2;
    Fetch1 fetch1;

    MinorActivityRecorder activityRecorder;

  public:
    enum StageId
    {
        /* A stage representing wakeup of the whole processor */
        CPUStageId = 0,
        /* Real pipeline stages */
        Fetch1StageId, Fetch2StageId, DecodeStageId, ExecuteStageId,
        Num_StageId /* Stage count */
    };

    bool needToSignalDrained;

  public:
    Pipeline(MinorCPU &cpu_, MinorCPUParams &params);

  public:
    void wakeupFetch(ThreadID tid);

    bool drain();

    void drainResume();

    bool isDrained();

    void evaluate() override;

    void minorTrace() const;

    void regStats();

    MinorCPU::MinorCPUPort &getInstPort();
    MinorCPU::MinorCPUPort &getDataPort();

    MinorActivityRecorder *getActivityRecorder() { return &activityRecorder; }
};

}

#endif /* __CPU_MINOR_PIPELINE_HH__ */