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v20.0.0.3
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arch
riscv
stacktrace.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2005 The Regents of The University of Michigan
3
* Copyright (c) 2007-2008 The Florida State University
4
* Copyright (c) 2009 The University of Edinburgh
5
* All rights reserved.
6
*
7
* Redistribution and use in source and binary forms, with or without
8
* modification, are permitted provided that the following conditions are
9
* met: redistributions of source code must retain the above copyright
10
* notice, this list of conditions and the following disclaimer;
11
* redistributions in binary form must reproduce the above copyright
12
* notice, this list of conditions and the following disclaimer in the
13
* documentation and/or other materials provided with the distribution;
14
* neither the name of the copyright holders nor the names of its
15
* contributors may be used to endorse or promote products derived from
16
* this software without specific prior written permission.
17
*
18
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29
*/
30
31
#ifndef __ARCH_RISCV_STACKTRACE_HH__
32
#define __ARCH_RISCV_STACKTRACE_HH__
33
34
#include "
base/trace.hh
"
35
#include "
cpu/static_inst.hh
"
36
#include "debug/Stack.hh"
37
38
class
ThreadContext
;
39
class
StackTrace;
40
41
namespace
RiscvISA
42
{
43
44
class
ProcessInfo
45
{
46
public
:
47
ProcessInfo
(
ThreadContext
*_tc);
48
49
Addr
task
(
Addr
ksp)
const
;
50
int
pid
(
Addr
ksp)
const
;
51
std::string
name
(
Addr
ksp)
const
;
52
};
53
54
class
StackTrace
55
{
56
private
:
57
ThreadContext
*
tc
;
58
std::vector<Addr>
stack
;
59
60
private
:
61
bool
isEntry(
Addr
addr
);
62
bool
decodePrologue(
Addr
sp
,
Addr
callpc,
Addr
func,
int
&size,
Addr
&
ra
);
63
bool
decodeSave(
MachInst
inst,
int
&
reg
,
int
&disp);
64
bool
decodeStack(
MachInst
inst,
int
&disp);
65
66
void
trace(
ThreadContext
*tc,
bool
is_call);
67
68
public
:
69
StackTrace
();
70
StackTrace
(
ThreadContext
*tc,
const
StaticInstPtr
&inst);
71
~
StackTrace
();
72
73
void
74
clear
()
75
{
76
tc = 0;
77
stack.clear();
78
}
79
80
bool
81
valid
()
const
82
{
83
return
tc !=
nullptr
;
84
}
85
86
bool
trace(
ThreadContext
*tc,
const
StaticInstPtr
&inst);
87
88
public
:
89
const
std::vector<Addr>
&
90
getstack
()
const
91
{
92
return
stack
;
93
}
94
95
static
const
int
user = 1;
96
static
const
int
console = 2;
97
static
const
int
unknown = 3;
98
99
#if TRACING_ON
100
private
:
101
void
dump
();
102
103
public
:
104
void
105
dprintf()
106
{
107
if
(
DTRACE
(Stack))
108
dump
();
109
}
110
#else
111
public
:
112
void
113
dprintf
()
114
{
115
}
116
#endif
117
};
118
119
inline
bool
120
StackTrace::trace
(
ThreadContext
*tc,
const
StaticInstPtr
&inst)
121
{
122
if
(!inst->
isCall
() && !inst->
isReturn
())
123
return
false
;
124
125
if
(valid())
126
clear();
127
128
trace(tc, !inst->
isReturn
());
129
return
true
;
130
}
131
132
}
// namespace RiscvISA
133
134
#endif // __ARCH_RISCV_STACKTRACE_HH__
X86ISA::reg
Bitfield< 5, 3 > reg
Definition:
types.hh:87
RiscvISA::ProcessInfo::ProcessInfo
ProcessInfo(ThreadContext *_tc)
Definition:
stacktrace.cc:39
RiscvISA::StackTrace::getstack
const std::vector< Addr > & getstack() const
Definition:
stacktrace.hh:90
RiscvISA::ProcessInfo::pid
int pid(Addr ksp) const
Definition:
stacktrace.cc:52
RiscvISA::MachInst
uint32_t MachInst
Definition:
types.hh:50
RiscvISA::ProcessInfo::task
Addr task(Addr ksp) const
Definition:
stacktrace.cc:45
addr
ip6_addr_t addr
Definition:
inet.hh:330
RiscvISA::StackTrace::clear
void clear()
Definition:
stacktrace.hh:74
RiscvISA::StackTrace::trace
void trace(ThreadContext *tc, bool is_call)
Definition:
stacktrace.cc:83
StaticInst::isReturn
bool isReturn() const
Definition:
static_inst.hh:177
RefCountingPtr< StaticInst >
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Definition:
thread_context.hh:91
RiscvISA::ProcessInfo
Definition:
stacktrace.hh:44
std::vector< Addr >
trace.hh
RiscvISA::StackTrace::dprintf
void dprintf()
Definition:
stacktrace.hh:113
RiscvISA::sp
Bitfield< 4 > sp
Definition:
pra_constants.hh:267
DTRACE
#define DTRACE(x)
Definition:
trace.hh:223
static_inst.hh
RiscvISA::StackTrace::valid
bool valid() const
Definition:
stacktrace.hh:81
StaticInst::isCall
bool isCall() const
Definition:
static_inst.hh:176
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:140
RiscvISA::StackTrace
Definition:
stacktrace.hh:54
PowerISA::ra
Bitfield< 20, 16 > ra
Definition:
types.hh:45
RiscvISA::ProcessInfo::name
std::string name(Addr ksp) const
Definition:
stacktrace.cc:59
X86ISA::stack
Bitfield< 17, 16 > stack
Definition:
misc.hh:587
RiscvISA::StackTrace::tc
ThreadContext * tc
Definition:
stacktrace.hh:57
RiscvISA::StackTrace::stack
std::vector< Addr > stack
Definition:
stacktrace.hh:58
Stats::dump
void dump()
Dump all statistics data to the registered outputs.
Definition:
statistics.cc:560
RiscvISA
Definition:
fs_workload.cc:36
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