gem5  v20.1.0.0
fs_workload.cc
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40 
41 #include "arch/arm/fs_workload.hh"
42 
43 #include "arch/arm/faults.hh"
45 #include "base/loader/symtab.hh"
46 #include "cpu/thread_context.hh"
47 #include "dev/arm/gic_v2.hh"
48 #include "kern/system_events.hh"
49 #include "params/ArmFsWorkload.hh"
50 
51 namespace ArmISA
52 {
53 
54 void
56 {
57  PCState newPC = tc->pcState();
58  if (inAArch64(tc)) {
59  newPC.set(tc->readIntReg(INTREG_X30));
60  } else {
61  newPC.set(tc->readIntReg(ReturnAddressReg) & ~ULL(1));
62  }
63 
64  CheckerCPU *checker = tc->getCheckerCpuPtr();
65  if (checker) {
66  tc->pcStateNoRecord(newPC);
67  } else {
68  tc->pcState(newPC);
69  }
70 }
71 
73 {
74  if (kernelObj) {
77  }
78 
79  bootLoaders.reserve(p->boot_loader.size());
80  for (const auto &bl : p->boot_loader) {
81  std::unique_ptr<Loader::ObjectFile> bl_obj;
82  bl_obj.reset(Loader::createObjectFile(bl));
83 
84  fatal_if(!bl_obj, "Could not read bootloader: %s", bl);
85  bootLoaders.emplace_back(std::move(bl_obj));
86  }
87 
89 
90  fatal_if(!bootLoaders.empty() && !bootldr,
91  "Can't find a matching boot loader / kernel combination!");
92 
93  if (bootldr)
95 }
96 
97 void
99 {
101 
102  // Reset CP15?? What does that mean -- ali
103 
104  // FPEXC.EN = 0
105 
106  for (auto *tc: system->threads) {
107  Reset().invoke(tc);
108  tc->activate();
109  }
110 
111  auto *arm_sys = dynamic_cast<ArmSystem *>(system);
112 
113  if (bootldr) {
114  bool is_gic_v2 =
117 
118  inform("Using bootloader at address %#x", bootldr->entryPoint());
119 
120  // Put the address of the boot loader into r7 so we know
121  // where to branch to after the reset fault
122  // All other values needed by the boot loader to know what to do
123  fatal_if(!arm_sys->params()->flags_addr,
124  "flags_addr must be set with bootloader");
125 
126  fatal_if(!arm_sys->params()->gic_cpu_addr && is_gic_v2,
127  "gic_cpu_addr must be set with bootloader");
128 
129  for (auto *tc: arm_sys->threads) {
130  if (!arm_sys->highestELIs64())
131  tc->setIntReg(3, kernelEntry);
132  if (is_gic_v2)
133  tc->setIntReg(4, arm_sys->params()->gic_cpu_addr);
134  tc->setIntReg(5, arm_sys->params()->flags_addr);
135  }
136  inform("Using kernel entry physical address at %#x\n", kernelEntry);
137  } else {
138  // Set the initial PC to be at start of the kernel code
139  if (!arm_sys->highestELIs64())
140  arm_sys->threads[0]->pcState(kernelObj->entryPoint());
141  }
142 }
143 
146 {
147  if (obj) {
148  for (auto &bl : bootLoaders) {
149  if (bl->getArch() == obj->getArch())
150  return bl.get();
151  }
152  } else if (!bootLoaders.empty()) {
153  return bootLoaders[0].get();
154  }
155 
156  return nullptr;
157 }
158 
159 } // namespace ArmISA
160 
162 ArmFsWorkloadParams::create()
163 {
164  return new ArmISA::FsWorkload(this);
165 }
ArmISA::FsWorkload::FsWorkload
FsWorkload(Params *p)
Definition: fs_workload.cc:72
Loader::MemoryImage::write
bool write(const PortProxy &proxy) const
Definition: memory_image.cc:50
ArmISA::FsWorkload::getBootLoader
Loader::ObjectFile * getBootLoader(Loader::ObjectFile *const obj)
Get a boot loader that matches the kernel.
Definition: fs_workload.cc:145
ArmISA::SkipFunc::returnFromFuncIn
void returnFromFuncIn(ThreadContext *tc) override
Definition: fs_workload.cc:55
System::physProxy
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
Definition: system.hh:324
KernelWorkload
Definition: kernel_workload.hh:42
fs_workload.hh
KernelWorkload::loadAddrOffset
Addr loadAddrOffset() const
Definition: kernel_workload.hh:84
Loader::createObjectFile
ObjectFile * createObjectFile(const std::string &fname, bool raw)
Definition: object_file.cc:61
ArmISA::FsWorkload::Params
ArmFsWorkloadParams Params
Definition: fs_workload.hh:90
ArmISA::FsWorkload::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: fs_workload.cc:98
Workload::system
System * system
Definition: workload.hh:64
ArmISA::FsWorkload::bootldr
Loader::ObjectFile * bootldr
Pointer to the bootloader object.
Definition: fs_workload.hh:71
Loader::ImageFile::buildImage
virtual MemoryImage buildImage() const =0
CheckerCPU
CheckerCPU class.
Definition: cpu.hh:85
ArmSystem::getGIC
BaseGic * getGIC() const
Get a pointer to the system's GIC.
Definition: system.hh:197
BaseGic::supportsVersion
virtual bool supportsVersion(GicVersion version)=0
Check if version supported.
ArmISA
Definition: ccregs.hh:41
Loader::ObjectFile
Definition: object_file.hh:70
Loader::debugSymbolTable
SymbolTable debugSymbolTable
Global unified debugging symbol table (for target).
Definition: symtab.cc:47
KernelWorkload::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: kernel_workload.cc:86
Loader::ObjectFile::entryPoint
Addr entryPoint() const
Definition: object_file.hh:108
Loader::ObjectFile::symtab
const SymbolTable & symtab() const
Definition: object_file.hh:102
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
ThreadContext::pcStateNoRecord
virtual void pcStateNoRecord(const TheISA::PCState &val)=0
ArmISA::FsWorkload::kernelEntry
Addr kernelEntry
This differs from entry since it takes into account where the kernel is loaded in memory (with loadAd...
Definition: fs_workload.hh:78
ArmISA::FsWorkload::bootLoaders
std::vector< std::unique_ptr< Loader::ObjectFile > > bootLoaders
Bootloaders.
Definition: fs_workload.hh:66
ArmISA::FsWorkload
Definition: fs_workload.hh:62
KernelWorkload::kernelObj
Loader::ObjectFile * kernelObj
Definition: kernel_workload.hh:71
faults.hh
Loader::SymbolTable::globals
SymbolTablePtr globals() const
Definition: symtab.hh:159
ThreadContext::pcState
virtual TheISA::PCState pcState() const =0
ArmSystem
Definition: system.hh:59
System::threads
Threads threads
Definition: system.hh:309
inform
#define inform(...)
Definition: logging.hh:240
Loader::ObjectFile::getArch
Arch getArch() const
Definition: object_file.hh:99
MipsISA::PCState
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
KernelWorkload::loadAddrMask
Addr loadAddrMask() const
Definition: kernel_workload.hh:83
ThreadContext::getCheckerCpuPtr
virtual CheckerCPU * getCheckerCpuPtr()=0
system_events.hh
ArmISA::INTREG_X30
@ INTREG_X30
Definition: intregs.hh:157
BaseGic::GicVersion::GIC_V2
@ GIC_V2
ArmISA::ReturnAddressReg
const int ReturnAddressReg
Definition: registers.hh:115
Loader::SymbolTable::insert
bool insert(const Symbol &symbol)
Definition: symtab.cc:58
symtab.hh
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
ArmISA::inAArch64
bool inAArch64(ThreadContext *tc)
Definition: utility.cc:222
ThreadContext::readIntReg
virtual RegVal readIntReg(RegIndex reg_idx) const =0
gic_v2.hh
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:219
object_file.hh
Ps2::Reset
@ Reset
Definition: types.hh:63
thread_context.hh
ULL
#define ULL(N)
uint64_t constant
Definition: types.hh:50

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