gem5
v20.1.0.0
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DefaultFetch class handles both single threaded and SMT fetch. More...
#include <fetch.hh>
Classes | |
struct | FetchStatGroup |
class | FetchTranslation |
class | FinishTranslationEvent |
class | IcachePort |
IcachePort class for instruction fetch. More... | |
struct | Stalls |
Source of possible stalls. More... | |
Public Types | |
enum | FetchStatus { Active, Inactive } |
Overall fetch status. More... | |
enum | ThreadStatus { Running, Idle, Squashing, Blocked, Fetching, TrapPending, QuiescePending, ItlbWait, IcacheWaitResponse, IcacheWaitRetry, IcacheAccessComplete, NoGoodAddr } |
Individual thread status. More... | |
typedef Impl::CPUPol | CPUPol |
Typedefs from Impl. More... | |
typedef Impl::DynInst | DynInst |
typedef Impl::DynInstPtr | DynInstPtr |
typedef Impl::O3CPU | O3CPU |
typedef CPUPol::FetchStruct | FetchStruct |
Typedefs from the CPU policy. More... | |
typedef CPUPol::TimeStruct | TimeStruct |
typedef TheISA::MachInst | MachInst |
Typedefs from ISA. More... | |
Public Member Functions | |
DefaultFetch (O3CPU *_cpu, DerivO3CPUParams *params) | |
DefaultFetch constructor. More... | |
std::string | name () const |
Returns the name of fetch. More... | |
void | regProbePoints () |
Registers probes. More... | |
void | setTimeBuffer (TimeBuffer< TimeStruct > *time_buffer) |
Sets the main backwards communication time buffer pointer. More... | |
void | setActiveThreads (std::list< ThreadID > *at_ptr) |
Sets pointer to list of active threads. More... | |
void | setFetchQueue (TimeBuffer< FetchStruct > *fq_ptr) |
Sets pointer to time buffer used to communicate to the next stage. More... | |
void | startupStage () |
Initialize stage. More... | |
void | clearStates (ThreadID tid) |
Clear all thread-specific states. More... | |
void | recvReqRetry () |
Handles retrying the fetch access. More... | |
void | processCacheCompletion (PacketPtr pkt) |
Processes cache completion event. More... | |
void | drainResume () |
Resume after a drain. More... | |
void | drainSanityCheck () const |
Perform sanity checks after a drain. More... | |
bool | isDrained () const |
Has the stage drained? More... | |
void | takeOverFrom () |
Takes over from another CPU's thread. More... | |
void | drainStall (ThreadID tid) |
Stall the fetch stage after reaching a safe drain point. More... | |
void | wakeFromQuiesce () |
Tells fetch to wake up from a quiesce instruction. More... | |
void | deactivateThread (ThreadID tid) |
For priority-based fetch policies, need to keep update priorityList. More... | |
void | squash (const TheISA::PCState &newPC, const InstSeqNum seq_num, DynInstPtr squashInst, ThreadID tid) |
Squashes a specific thread and resets the PC. More... | |
void | tick () |
Ticks the fetch stage, processing all inputs signals and fetching as many instructions as possible. More... | |
bool | checkSignalsAndUpdate (ThreadID tid) |
Checks all input signals and updates the status as necessary. More... | |
void | fetch (bool &status_change) |
Does the actual fetching of instructions and passing them on to the next stage. More... | |
Addr | fetchBufferAlignPC (Addr addr) |
Align a PC to the start of a fetch buffer block. More... | |
RequestPort & | getInstPort () |
Public Attributes | |
TheISA::Decoder * | decoder [Impl::MaxThreads] |
The decoder. More... | |
Protected Attributes | |
DefaultFetch::FetchStatGroup | fetchStats |
Private Member Functions | |
void | resetStage () |
Reset this pipeline stage. More... | |
void | switchToActive () |
Changes the status of this stage to active, and indicates this to the CPU. More... | |
void | switchToInactive () |
Changes the status of this stage to inactive, and indicates this to the CPU. More... | |
bool | lookupAndUpdateNextPC (const DynInstPtr &inst, TheISA::PCState &pc) |
Looks up in the branch predictor to see if the next PC should be either next PC+=MachInst or a branch target. More... | |
bool | fetchCacheLine (Addr vaddr, ThreadID tid, Addr pc) |
Fetches the cache line that contains the fetch PC. More... | |
void | finishTranslation (const Fault &fault, const RequestPtr &mem_req) |
bool | checkInterrupt (Addr pc) |
Check if an interrupt is pending and that we need to handle. More... | |
void | doSquash (const TheISA::PCState &newPC, const DynInstPtr squashInst, ThreadID tid) |
Squashes a specific thread and resets the PC. More... | |
void | squashFromDecode (const TheISA::PCState &newPC, const DynInstPtr squashInst, const InstSeqNum seq_num, ThreadID tid) |
Squashes a specific thread and resets the PC. More... | |
bool | checkStall (ThreadID tid) const |
Checks if a thread is stalled. More... | |
FetchStatus | updateFetchStatus () |
Updates overall fetch stage status; to be called at the end of each cycle. More... | |
DynInstPtr | buildInst (ThreadID tid, StaticInstPtr staticInst, StaticInstPtr curMacroop, TheISA::PCState thisPC, TheISA::PCState nextPC, bool trace) |
ThreadID | getFetchingThread () |
Returns the appropriate thread to fetch, given the fetch policy. More... | |
ThreadID | roundRobin () |
Returns the appropriate thread to fetch using a round robin policy. More... | |
ThreadID | iqCount () |
Returns the appropriate thread to fetch using the IQ count policy. More... | |
ThreadID | lsqCount () |
Returns the appropriate thread to fetch using the LSQ count policy. More... | |
ThreadID | branchCount () |
Returns the appropriate thread to fetch using the branch count policy. More... | |
void | pipelineIcacheAccesses (ThreadID tid) |
Pipeline the next I-cache access to the current one. More... | |
void | profileStall (ThreadID tid) |
Profile the reasons of fetch stall. More... | |
Private Attributes | |
FetchStatus | _status |
Fetch status. More... | |
ThreadStatus | fetchStatus [Impl::MaxThreads] |
Per-thread status. More... | |
FetchPolicy | fetchPolicy |
Fetch policy. More... | |
std::list< ThreadID > | priorityList |
List that has the threads organized by priority. More... | |
ProbePointArg< DynInstPtr > * | ppFetch |
Probe points. More... | |
ProbePointArg< RequestPtr > * | ppFetchRequestSent |
To probe when a fetch request is successfully sent. More... | |
O3CPU * | cpu |
Pointer to the O3CPU. More... | |
TimeBuffer< TimeStruct > * | timeBuffer |
Time buffer interface. More... | |
TimeBuffer< TimeStruct >::wire | fromDecode |
Wire to get decode's information from backwards time buffer. More... | |
TimeBuffer< TimeStruct >::wire | fromRename |
Wire to get rename's information from backwards time buffer. More... | |
TimeBuffer< TimeStruct >::wire | fromIEW |
Wire to get iew's information from backwards time buffer. More... | |
TimeBuffer< TimeStruct >::wire | fromCommit |
Wire to get commit's information from backwards time buffer. More... | |
TimeBuffer< FetchStruct >::wire | toDecode |
Wire used to write any information heading to decode. More... | |
BPredUnit * | branchPred |
BPredUnit. More... | |
TheISA::PCState | pc [Impl::MaxThreads] |
Addr | fetchOffset [Impl::MaxThreads] |
StaticInstPtr | macroop [Impl::MaxThreads] |
bool | delayedCommit [Impl::MaxThreads] |
Can the fetch stage redirect from an interrupt on this instruction? More... | |
RequestPtr | memReq [Impl::MaxThreads] |
Memory request used to access cache. More... | |
bool | wroteToTimeBuffer |
Variable that tracks if fetch has written to the time buffer this cycle. More... | |
int | numInst |
Tracks how many instructions has been fetched this cycle. More... | |
Stalls | stalls [Impl::MaxThreads] |
Tracks which stages are telling fetch to stall. More... | |
Cycles | decodeToFetchDelay |
Decode to fetch delay. More... | |
Cycles | renameToFetchDelay |
Rename to fetch delay. More... | |
Cycles | iewToFetchDelay |
IEW to fetch delay. More... | |
Cycles | commitToFetchDelay |
Commit to fetch delay. More... | |
unsigned | fetchWidth |
The width of fetch in instructions. More... | |
unsigned | decodeWidth |
The width of decode in instructions. More... | |
bool | cacheBlocked |
Is the cache blocked? If so no threads can access it. More... | |
PacketPtr | retryPkt |
The packet that is waiting to be retried. More... | |
ThreadID | retryTid |
The thread that is waiting on the cache to tell fetch to retry. More... | |
unsigned int | cacheBlkSize |
Cache block size. More... | |
unsigned | fetchBufferSize |
The size of the fetch buffer in bytes. More... | |
Addr | fetchBufferMask |
Mask to align a fetch address to a fetch buffer boundary. More... | |
uint8_t * | fetchBuffer [Impl::MaxThreads] |
The fetch data that is being fetched and buffered. More... | |
Addr | fetchBufferPC [Impl::MaxThreads] |
The PC of the first instruction loaded into the fetch buffer. More... | |
unsigned | fetchQueueSize |
The size of the fetch queue in micro-ops. More... | |
std::deque< DynInstPtr > | fetchQueue [Impl::MaxThreads] |
Queue of fetched instructions. More... | |
bool | fetchBufferValid [Impl::MaxThreads] |
Whether or not the fetch buffer data is valid. More... | |
int | instSize |
Size of instructions. More... | |
Counter | lastIcacheStall [Impl::MaxThreads] |
Icache stall statistics. More... | |
std::list< ThreadID > * | activeThreads |
List of Active Threads. More... | |
ThreadID | numThreads |
Number of threads. More... | |
ThreadID | numFetchingThreads |
Number of threads that are actively fetching. More... | |
ThreadID | threadFetched |
Thread ID being fetched. More... | |
bool | interruptPending |
Checks if there is an interrupt pending. More... | |
IcachePort | icachePort |
Instruction port. More... | |
bool | issuePipelinedIfetch [Impl::MaxThreads] |
Set to true if a pipelined I-cache request should be issued. More... | |
FinishTranslationEvent | finishTranslationEvent |
Event used to delay fault generation of translation faults. More... | |
DefaultFetch class handles both single threaded and SMT fetch.
Its width is specified by the parameters; each cycle it tries to fetch that many instructions. It supports using a branch predictor to predict direction and targets. It supports the idling functionality of the CPU by indicating to the CPU when it is active and inactive.
typedef Impl::CPUPol DefaultFetch< Impl >::CPUPol |
typedef Impl::DynInst DefaultFetch< Impl >::DynInst |
typedef Impl::DynInstPtr DefaultFetch< Impl >::DynInstPtr |
typedef CPUPol::FetchStruct DefaultFetch< Impl >::FetchStruct |
typedef TheISA::MachInst DefaultFetch< Impl >::MachInst |
typedef Impl::O3CPU DefaultFetch< Impl >::O3CPU |
typedef CPUPol::TimeStruct DefaultFetch< Impl >::TimeStruct |
enum DefaultFetch::FetchStatus |
enum DefaultFetch::ThreadStatus |
DefaultFetch< Impl >::DefaultFetch | ( | O3CPU * | _cpu, |
DerivO3CPUParams * | params | ||
) |
DefaultFetch constructor.
Definition at line 78 of file fetch_impl.hh.
References DefaultFetch< Impl >::branchPred, DefaultFetch< Impl >::cacheBlkSize, DefaultFetch< Impl >::decoder, DefaultFetch< Impl >::delayedCommit, fatal, DefaultFetch< Impl >::fetchBuffer, DefaultFetch< Impl >::fetchBufferPC, DefaultFetch< Impl >::fetchBufferSize, DefaultFetch< Impl >::fetchBufferValid, DefaultFetch< Impl >::fetchOffset, DefaultFetch< Impl >::fetchPolicy, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::fetchWidth, ArmISA::i, DefaultFetch< Impl >::Idle, DefaultFetch< Impl >::instSize, DefaultFetch< Impl >::issuePipelinedIfetch, DefaultFetch< Impl >::lastIcacheStall, DefaultFetch< Impl >::macroop, DefaultFetch< Impl >::memReq, DefaultFetch< Impl >::numThreads, panic_if, DefaultFetch< Impl >::pc, and DefaultFetch< Impl >::stalls.
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Returns the appropriate thread to fetch using the branch count policy.
Definition at line 1553 of file fetch_impl.hh.
References InvalidThreadID, and panic.
Referenced by DefaultFetch< Impl >::getFetchingThread().
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Definition at line 1069 of file fetch_impl.hh.
References DefaultFetch< Impl >::cpu, curTick(), DefaultFetch< Impl >::delayedCommit, DPRINTF, DefaultFetch< Impl >::fetchQueue, DefaultFetch< Impl >::fetchQueueSize, DefaultFetch< Impl >::fetchWidth, and DefaultFetch< Impl >::numInst.
Referenced by DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::finishTranslation().
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Check if an interrupt is pending and that we need to handle.
Definition at line 321 of file fetch.hh.
References DefaultFetch< Impl >::interruptPending.
Referenced by DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::fetchCacheLine().
bool DefaultFetch< Impl >::checkSignalsAndUpdate | ( | ThreadID | tid | ) |
Checks all input signals and updates the status as necessary.
Definition at line 964 of file fetch_impl.hh.
References DefaultFetch< Impl >::Blocked, DefaultFetch< Impl >::branchPred, DefaultFetch< Impl >::checkStall(), DefaultFetch< Impl >::Stalls::decode, DPRINTF, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::fromCommit, DefaultFetch< Impl >::fromDecode, DefaultFetch< Impl >::IcacheWaitResponse, DefaultFetch< Impl >::IcacheWaitRetry, DefaultFetch< Impl >::ItlbWait, DefaultFetch< Impl >::QuiescePending, DefaultFetch< Impl >::Running, BPredUnit::squash(), DefaultFetch< Impl >::squash(), DefaultFetch< Impl >::squashFromDecode(), DefaultFetch< Impl >::Squashing, DefaultFetch< Impl >::stalls, and BPredUnit::update().
Referenced by DefaultFetch< Impl >::tick().
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Checks if a thread is stalled.
Definition at line 793 of file fetch_impl.hh.
References DefaultFetch< Impl >::cpu, DPRINTF, and DefaultFetch< Impl >::stalls.
Referenced by DefaultFetch< Impl >::checkSignalsAndUpdate(), and DefaultFetch< Impl >::processCacheCompletion().
void DefaultFetch< Impl >::clearStates | ( | ThreadID | tid | ) |
Clear all thread-specific states.
Definition at line 299 of file fetch_impl.hh.
References DefaultFetch< Impl >::cpu, DefaultFetch< Impl >::Stalls::decode, DefaultFetch< Impl >::delayedCommit, DefaultFetch< Impl >::Stalls::drain, DefaultFetch< Impl >::fetchBufferPC, DefaultFetch< Impl >::fetchBufferValid, DefaultFetch< Impl >::fetchOffset, DefaultFetch< Impl >::fetchQueue, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::macroop, DefaultFetch< Impl >::memReq, DefaultFetch< Impl >::pc, DefaultFetch< Impl >::Running, and DefaultFetch< Impl >::stalls.
void DefaultFetch< Impl >::deactivateThread | ( | ThreadID | tid | ) |
For priority-based fetch policies, need to keep update priorityList.
Definition at line 512 of file fetch_impl.hh.
References DefaultFetch< Impl >::priorityList.
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Squashes a specific thread and resets the PC.
Definition at line 726 of file fetch_impl.hh.
References DefaultFetch< Impl >::cacheBlocked, DefaultFetch< Impl >::decoder, DefaultFetch< Impl >::delayedCommit, DPRINTF, DefaultFetch< Impl >::fetchOffset, DefaultFetch< Impl >::fetchQueue, DefaultFetch< Impl >::fetchStats, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::IcacheWaitResponse, InvalidThreadID, DefaultFetch< Impl >::ItlbWait, DefaultFetch< Impl >::macroop, DefaultFetch< Impl >::memReq, DefaultFetch< Impl >::pc, DefaultFetch< Impl >::retryPkt, DefaultFetch< Impl >::retryTid, DefaultFetch< Impl >::FetchStatGroup::squashCycles, and DefaultFetch< Impl >::Squashing.
Referenced by DefaultFetch< Impl >::squash(), and DefaultFetch< Impl >::squashFromDecode().
void DefaultFetch< Impl >::drainResume |
Resume after a drain.
Definition at line 398 of file fetch_impl.hh.
References DefaultFetch< Impl >::Stalls::decode, DefaultFetch< Impl >::Stalls::drain, ArmISA::i, DefaultFetch< Impl >::numThreads, and DefaultFetch< Impl >::stalls.
void DefaultFetch< Impl >::drainSanityCheck |
Perform sanity checks after a drain.
Definition at line 408 of file fetch_impl.hh.
References DefaultFetch< Impl >::branchPred, DefaultFetch< Impl >::cacheBlocked, BPredUnit::drainSanityCheck(), DefaultFetch< Impl >::fetchStatus, ArmISA::i, DefaultFetch< Impl >::Idle, DefaultFetch< Impl >::interruptPending, InvalidThreadID, DefaultFetch< Impl >::isDrained(), DefaultFetch< Impl >::memReq, DefaultFetch< Impl >::numThreads, DefaultFetch< Impl >::retryPkt, DefaultFetch< Impl >::retryTid, and DefaultFetch< Impl >::stalls.
void DefaultFetch< Impl >::drainStall | ( | ThreadID | tid | ) |
Stall the fetch stage after reaching a safe drain point.
The CPU uses this method to stop fetching instructions from a thread that has been drained. The drain stall is different from all other stalls in that it is signaled instantly from the commit stage (without the normal communication delay) when it has reached a safe point to drain from.
Definition at line 466 of file fetch_impl.hh.
References DefaultFetch< Impl >::cpu, DPRINTF, DefaultFetch< Impl >::Stalls::drain, and DefaultFetch< Impl >::stalls.
void DefaultFetch< Impl >::fetch | ( | bool & | status_change | ) |
Does the actual fetching of instructions and passing them on to the next stage.
status_change | fetch() sets this variable if there was a status change (ie switching to IcacheMissStall). |
Definition at line 1121 of file fetch_impl.hh.
References DefaultFetch< Impl >::buildInst(), DefaultFetch< Impl >::checkInterrupt(), DefaultFetch< Impl >::cpu, curTick(), DefaultFetch< Impl >::FetchStatGroup::cycles, DefaultFetch< Impl >::decoder, DefaultFetch< Impl >::delayedCommit, DPRINTF, DTRACE, DefaultFetch< Impl >::fetchBuffer, DefaultFetch< Impl >::fetchBufferAlignPC(), DefaultFetch< Impl >::fetchBufferPC, DefaultFetch< Impl >::fetchBufferSize, DefaultFetch< Impl >::fetchBufferValid, DefaultFetch< Impl >::fetchCacheLine(), StaticInst::fetchMicroop(), DefaultFetch< Impl >::fetchOffset, DefaultFetch< Impl >::fetchQueue, DefaultFetch< Impl >::fetchQueueSize, DefaultFetch< Impl >::fetchStats, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::fetchWidth, DefaultFetch< Impl >::getFetchingThread(), DefaultFetch< Impl >::IcacheAccessComplete, DefaultFetch< Impl >::FetchStatGroup::icacheStallCycles, DefaultFetch< Impl >::IcacheWaitResponse, DefaultFetch< Impl >::IcacheWaitRetry, DefaultFetch< Impl >::Idle, DefaultFetch< Impl >::FetchStatGroup::idleCycles, DefaultFetch< Impl >::FetchStatGroup::insts, DefaultFetch< Impl >::instSize, InvalidThreadID, StaticInst::isLastMicroop(), StaticInst::isMacroop(), isRomMicroPC(), DefaultFetch< Impl >::issuePipelinedIfetch, DefaultFetch< Impl >::ItlbWait, DefaultFetch< Impl >::lookupAndUpdateNextPC(), DefaultFetch< Impl >::macroop, DefaultFetch< Impl >::FetchStatGroup::miscStallCycles, ProbePointArg< Arg >::notify(), DefaultFetch< Impl >::numFetchingThreads, DefaultFetch< Impl >::numInst, DefaultFetch< Impl >::numThreads, DefaultFetch< Impl >::pc, BaseCPU::PCMask, DefaultFetch< Impl >::ppFetch, DefaultFetch< Impl >::profileStall(), PseudoInst::quiesce(), DefaultFetch< Impl >::QuiescePending, DefaultFetch< Impl >::Running, DefaultFetch< Impl >::threadFetched, DefaultFetch< Impl >::FetchStatGroup::tlbCycles, and DefaultFetch< Impl >::wroteToTimeBuffer.
Referenced by DefaultFetch< Impl >::FetchStatGroup::FetchStatGroup(), DefaultFetch< Impl >::IcachePort::recvReqRetry(), DefaultFetch< Impl >::IcachePort::recvTimingResp(), and DefaultFetch< Impl >::tick().
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Align a PC to the start of a fetch buffer block.
Definition at line 371 of file fetch.hh.
References addr, and DefaultFetch< Impl >::fetchBufferMask.
Referenced by DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::fetchCacheLine(), and DefaultFetch< Impl >::pipelineIcacheAccesses().
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Fetches the cache line that contains the fetch PC.
Returns any fault that happened. Puts the data into the class variable fetchBuffer, which may not hold the entire fetched cache line.
vaddr | The memory address that is being fetched from. |
ret_fault | The fault reference that will be set to the result of the icache access. |
tid | Thread id. |
pc | The actual PC of the current instruction. |
Definition at line 569 of file fetch_impl.hh.
References DefaultFetch< Impl >::cacheBlocked, DefaultFetch< Impl >::checkInterrupt(), DefaultFetch< Impl >::cpu, DefaultFetch< Impl >::delayedCommit, DPRINTF, BaseTLB::Execute, DefaultFetch< Impl >::fetchBufferAlignPC(), DefaultFetch< Impl >::fetchBufferSize, DefaultFetch< Impl >::fetchStatus, Request::INST_FETCH, DefaultFetch< Impl >::ItlbWait, DefaultFetch< Impl >::memReq, NoFault, DefaultFetch< Impl >::pc, and MipsISA::vaddr.
Referenced by DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::pipelineIcacheAccesses().
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Definition at line 619 of file fetch_impl.hh.
References DefaultFetch< Impl >::_status, DefaultFetch< Impl >::buildInst(), DefaultFetch< Impl >::cacheBlocked, DefaultFetch< Impl >::FetchStatGroup::cacheLines, DefaultFetch< Impl >::cpu, curTick(), Packet::dataDynamic(), DPRINTF, DefaultFetch< Impl >::fetchBufferPC, DefaultFetch< Impl >::fetchBufferSize, DefaultFetch< Impl >::fetchBufferValid, DefaultFetch< Impl >::fetchQueue, DefaultFetch< Impl >::fetchQueueSize, DefaultFetch< Impl >::fetchStats, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::fetchWidth, DefaultFetch< Impl >::finishTranslationEvent, DefaultFetch< Impl >::icachePort, DefaultFetch< Impl >::IcacheWaitResponse, DefaultFetch< Impl >::IcacheWaitRetry, InvalidThreadID, DefaultFetch< Impl >::ItlbWait, DefaultFetch< Impl >::lastIcacheStall, DefaultFetch< Impl >::memReq, NoFault, DefaultFetch< Impl >::NoGoodAddr, StaticInst::nopStaticInstPtr, ProbePointArg< Arg >::notify(), DefaultFetch< Impl >::numInst, DefaultFetch< Impl >::pc, DefaultFetch< Impl >::ppFetchRequestSent, MemCmd::ReadReq, DefaultFetch< Impl >::retryPkt, DefaultFetch< Impl >::retryTid, Event::scheduled(), RequestPort::sendTimingReq(), DefaultFetch< Impl >::FinishTranslationEvent::setFault(), DefaultFetch< Impl >::FinishTranslationEvent::setReq(), DefaultFetch< Impl >::FetchStatGroup::tlbSquashes, DefaultFetch< Impl >::TrapPending, DefaultFetch< Impl >::updateFetchStatus(), warn, and DefaultFetch< Impl >::wroteToTimeBuffer.
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Returns the appropriate thread to fetch, given the fetch policy.
Definition at line 1414 of file fetch_impl.hh.
References DefaultFetch< Impl >::activeThreads, DefaultFetch< Impl >::branchCount(), DefaultFetch< Impl >::fetchPolicy, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::IcacheAccessComplete, DefaultFetch< Impl >::Idle, InvalidThreadID, DefaultFetch< Impl >::iqCount(), DefaultFetch< Impl >::lsqCount(), DefaultFetch< Impl >::numThreads, DefaultFetch< Impl >::roundRobin(), and DefaultFetch< Impl >::Running.
Referenced by DefaultFetch< Impl >::fetch().
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Definition at line 379 of file fetch.hh.
References DefaultFetch< Impl >::icachePort.
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Returns the appropriate thread to fetch using the IQ count policy.
Definition at line 1480 of file fetch_impl.hh.
References DefaultFetch< Impl >::activeThreads, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::fromIEW, DefaultFetch< Impl >::IcacheAccessComplete, DefaultFetch< Impl >::Idle, InvalidThreadID, and DefaultFetch< Impl >::Running.
Referenced by DefaultFetch< Impl >::getFetchingThread().
bool DefaultFetch< Impl >::isDrained |
Has the stage drained?
Definition at line 426 of file fetch_impl.hh.
References DefaultFetch< Impl >::Blocked, DefaultFetch< Impl >::fetchQueue, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::finishTranslationEvent, ArmISA::i, DefaultFetch< Impl >::Idle, DefaultFetch< Impl >::numThreads, Event::scheduled(), and DefaultFetch< Impl >::stalls.
Referenced by DefaultFetch< Impl >::drainSanityCheck().
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Looks up in the branch predictor to see if the next PC should be either next PC+=MachInst or a branch target.
next_PC | Next PC variable passed in by reference. It is expected to be set to the current PC; it will be updated with what the next PC will be. |
next_NPC | Used for ISAs which use delay slots. |
Definition at line 523 of file fetch_impl.hh.
References ArmISA::advancePC(), DefaultFetch< Impl >::FetchStatGroup::branches, DefaultFetch< Impl >::branchPred, DPRINTF, DefaultFetch< Impl >::fetchStats, BPredUnit::predict(), and DefaultFetch< Impl >::FetchStatGroup::predictedBranches.
Referenced by DefaultFetch< Impl >::fetch().
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Returns the appropriate thread to fetch using the LSQ count policy.
Definition at line 1517 of file fetch_impl.hh.
References DefaultFetch< Impl >::activeThreads, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::fromIEW, DefaultFetch< Impl >::IcacheAccessComplete, DefaultFetch< Impl >::Idle, InvalidThreadID, and DefaultFetch< Impl >::Running.
Referenced by DefaultFetch< Impl >::getFetchingThread().
std::string DefaultFetch< Impl >::name |
Returns the name of fetch.
Definition at line 150 of file fetch_impl.hh.
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Pipeline the next I-cache access to the current one.
Definition at line 1561 of file fetch_impl.hh.
References DPRINTF, DefaultFetch< Impl >::fetchBufferAlignPC(), DefaultFetch< Impl >::fetchBufferPC, DefaultFetch< Impl >::fetchBufferValid, DefaultFetch< Impl >::fetchCacheLine(), DefaultFetch< Impl >::fetchOffset, isRomMicroPC(), DefaultFetch< Impl >::issuePipelinedIfetch, DefaultFetch< Impl >::pc, and BaseCPU::PCMask.
Referenced by DefaultFetch< Impl >::tick().
void DefaultFetch< Impl >::processCacheCompletion | ( | PacketPtr | pkt | ) |
Processes cache completion event.
Definition at line 354 of file fetch_impl.hh.
References DefaultFetch< Impl >::Blocked, DefaultFetch< Impl >::checkStall(), DefaultFetch< Impl >::cpu, DPRINTF, DefaultFetch< Impl >::fetchBuffer, DefaultFetch< Impl >::fetchBufferSize, DefaultFetch< Impl >::fetchBufferValid, DefaultFetch< Impl >::fetchStats, DefaultFetch< Impl >::fetchStatus, Packet::getConstPtr(), DefaultFetch< Impl >::IcacheAccessComplete, DefaultFetch< Impl >::FetchStatGroup::icacheSquashes, DefaultFetch< Impl >::IcacheWaitResponse, DefaultFetch< Impl >::memReq, Packet::req, and DefaultFetch< Impl >::switchToActive().
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Profile the reasons of fetch stall.
Definition at line 1591 of file fetch_impl.hh.
References DefaultFetch< Impl >::activeThreads, DefaultFetch< Impl >::Blocked, DefaultFetch< Impl >::FetchStatGroup::blockedCycles, DPRINTF, DefaultFetch< Impl >::fetchStats, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::FetchStatGroup::icacheStallCycles, DefaultFetch< Impl >::IcacheWaitResponse, DefaultFetch< Impl >::IcacheWaitRetry, DefaultFetch< Impl >::FetchStatGroup::icacheWaitRetryStallCycles, DefaultFetch< Impl >::ItlbWait, DefaultFetch< Impl >::FetchStatGroup::noActiveThreadStallCycles, DefaultFetch< Impl >::NoGoodAddr, DefaultFetch< Impl >::FetchStatGroup::pendingDrainCycles, DefaultFetch< Impl >::FetchStatGroup::pendingQuiesceStallCycles, DefaultFetch< Impl >::FetchStatGroup::pendingTrapStallCycles, DefaultFetch< Impl >::QuiescePending, DefaultFetch< Impl >::FetchStatGroup::squashCycles, DefaultFetch< Impl >::Squashing, DefaultFetch< Impl >::stalls, DefaultFetch< Impl >::FetchStatGroup::tlbCycles, and DefaultFetch< Impl >::TrapPending.
Referenced by DefaultFetch< Impl >::fetch().
void DefaultFetch< Impl >::recvReqRetry |
Handles retrying the fetch access.
Definition at line 1383 of file fetch_impl.hh.
References DefaultFetch< Impl >::cacheBlocked, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::icachePort, DefaultFetch< Impl >::IcacheWaitResponse, DefaultFetch< Impl >::IcacheWaitRetry, InvalidThreadID, ProbePointArg< Arg >::notify(), DefaultFetch< Impl >::ppFetchRequestSent, Packet::req, DefaultFetch< Impl >::retryPkt, DefaultFetch< Impl >::retryTid, and RequestPort::sendTimingReq().
void DefaultFetch< Impl >::regProbePoints |
Registers probes.
Definition at line 157 of file fetch_impl.hh.
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Reset this pipeline stage.
Definition at line 319 of file fetch_impl.hh.
References DefaultFetch< Impl >::_status, DefaultFetch< Impl >::cacheBlocked, DefaultFetch< Impl >::cpu, DefaultFetch< Impl >::Stalls::decode, DefaultFetch< Impl >::delayedCommit, DefaultFetch< Impl >::Stalls::drain, DefaultFetch< Impl >::fetchBufferPC, DefaultFetch< Impl >::fetchBufferValid, DefaultFetch< Impl >::fetchOffset, DefaultFetch< Impl >::fetchQueue, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::Inactive, DefaultFetch< Impl >::interruptPending, DefaultFetch< Impl >::macroop, DefaultFetch< Impl >::memReq, DefaultFetch< Impl >::numInst, DefaultFetch< Impl >::numThreads, DefaultFetch< Impl >::pc, DefaultFetch< Impl >::priorityList, DefaultFetch< Impl >::Running, DefaultFetch< Impl >::stalls, and DefaultFetch< Impl >::wroteToTimeBuffer.
Referenced by DefaultFetch< Impl >::startupStage(), and DefaultFetch< Impl >::takeOverFrom().
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Returns the appropriate thread to fetch using a round robin policy.
Definition at line 1450 of file fetch_impl.hh.
References DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::IcacheAccessComplete, DefaultFetch< Impl >::Idle, InvalidThreadID, DefaultFetch< Impl >::numThreads, DefaultFetch< Impl >::priorityList, and DefaultFetch< Impl >::Running.
Referenced by DefaultFetch< Impl >::getFetchingThread().
void DefaultFetch< Impl >::setActiveThreads | ( | std::list< ThreadID > * | at_ptr | ) |
Sets pointer to list of active threads.
Definition at line 272 of file fetch_impl.hh.
References DefaultFetch< Impl >::activeThreads.
void DefaultFetch< Impl >::setFetchQueue | ( | TimeBuffer< FetchStruct > * | fq_ptr | ) |
Sets pointer to time buffer used to communicate to the next stage.
Definition at line 279 of file fetch_impl.hh.
References TimeBuffer< T >::getWire(), and DefaultFetch< Impl >::toDecode.
void DefaultFetch< Impl >::setTimeBuffer | ( | TimeBuffer< TimeStruct > * | time_buffer | ) |
Sets the main backwards communication time buffer pointer.
Definition at line 259 of file fetch_impl.hh.
References DefaultFetch< Impl >::commitToFetchDelay, DefaultFetch< Impl >::decodeToFetchDelay, DefaultFetch< Impl >::fromCommit, DefaultFetch< Impl >::fromDecode, DefaultFetch< Impl >::fromIEW, DefaultFetch< Impl >::fromRename, TimeBuffer< T >::getWire(), DefaultFetch< Impl >::iewToFetchDelay, DefaultFetch< Impl >::renameToFetchDelay, and DefaultFetch< Impl >::timeBuffer.
void DefaultFetch< Impl >::squash | ( | const TheISA::PCState & | newPC, |
const InstSeqNum | seq_num, | ||
DynInstPtr | squashInst, | ||
ThreadID | tid | ||
) |
Squashes a specific thread and resets the PC.
Also tells the CPU to remove any instructions that are not in the ROB. The source of this squash should be the commit stage.
Definition at line 848 of file fetch_impl.hh.
References DefaultFetch< Impl >::cpu, DefaultFetch< Impl >::doSquash(), and DPRINTF.
Referenced by DefaultFetch< Impl >::checkSignalsAndUpdate().
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Squashes a specific thread and resets the PC.
Also tells the CPU to remove any instructions between fetch and decode that should be sqaushed.
Definition at line 778 of file fetch_impl.hh.
References DefaultFetch< Impl >::cpu, DefaultFetch< Impl >::doSquash(), and DPRINTF.
Referenced by DefaultFetch< Impl >::checkSignalsAndUpdate().
void DefaultFetch< Impl >::startupStage |
Initialize stage.
Definition at line 287 of file fetch_impl.hh.
References DefaultFetch< Impl >::priorityList, DefaultFetch< Impl >::resetStage(), and DefaultFetch< Impl >::switchToActive().
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Changes the status of this stage to active, and indicates this to the CPU.
Definition at line 486 of file fetch_impl.hh.
References DefaultFetch< Impl >::_status, DefaultFetch< Impl >::Active, DefaultFetch< Impl >::cpu, DPRINTF, and DefaultFetch< Impl >::Inactive.
Referenced by DefaultFetch< Impl >::processCacheCompletion(), and DefaultFetch< Impl >::startupStage().
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Changes the status of this stage to inactive, and indicates this to the CPU.
Definition at line 499 of file fetch_impl.hh.
References DefaultFetch< Impl >::_status, DefaultFetch< Impl >::Active, DefaultFetch< Impl >::cpu, DPRINTF, and DefaultFetch< Impl >::Inactive.
void DefaultFetch< Impl >::takeOverFrom |
Takes over from another CPU's thread.
Definition at line 457 of file fetch_impl.hh.
References DefaultFetch< Impl >::cpu, and DefaultFetch< Impl >::resetStage().
void DefaultFetch< Impl >::tick |
Ticks the fetch stage, processing all inputs signals and fetching as many instructions as possible.
Definition at line 862 of file fetch_impl.hh.
References DefaultFetch< Impl >::_status, DefaultFetch< Impl >::activeThreads, DefaultFetch< Impl >::checkSignalsAndUpdate(), DefaultFetch< Impl >::cpu, DefaultFetch< Impl >::decodeWidth, DPRINTF, DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::fetchQueue, DefaultFetch< Impl >::fetchStats, DefaultFetch< Impl >::fromCommit, FullSystem, ArmISA::i, DefaultFetch< Impl >::interruptPending, DefaultFetch< Impl >::issuePipelinedIfetch, DefaultFetch< Impl >::FetchStatGroup::nisnDist, DefaultFetch< Impl >::numFetchingThreads, DefaultFetch< Impl >::numInst, DefaultFetch< Impl >::numThreads, DefaultFetch< Impl >::pipelineIcacheAccesses(), Random::random(), random_mt, Stats::DistBase< Derived, Stor >::sample(), TimeBuffer< T >::size, DefaultFetch< Impl >::stalls, DefaultFetch< Impl >::threadFetched, DefaultFetch< Impl >::toDecode, DefaultFetch< Impl >::updateFetchStatus(), and DefaultFetch< Impl >::wroteToTimeBuffer.
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Updates overall fetch stage status; to be called at the end of each cycle.
Definition at line 808 of file fetch_impl.hh.
References DefaultFetch< Impl >::_status, DefaultFetch< Impl >::Active, DefaultFetch< Impl >::activeThreads, DefaultFetch< Impl >::cpu, DPRINTF, DefaultFetch< Impl >::fetchStatus, DefaultFetch< Impl >::IcacheAccessComplete, DefaultFetch< Impl >::Inactive, DefaultFetch< Impl >::Running, and DefaultFetch< Impl >::Squashing.
Referenced by DefaultFetch< Impl >::finishTranslation(), and DefaultFetch< Impl >::tick().
void DefaultFetch< Impl >::wakeFromQuiesce |
Tells fetch to wake up from a quiesce instruction.
Definition at line 476 of file fetch_impl.hh.
References DPRINTF, DefaultFetch< Impl >::fetchStatus, and DefaultFetch< Impl >::Running.
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Fetch status.
Definition at line 202 of file fetch.hh.
Referenced by DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::resetStage(), DefaultFetch< Impl >::switchToActive(), DefaultFetch< Impl >::switchToInactive(), DefaultFetch< Impl >::tick(), and DefaultFetch< Impl >::updateFetchStatus().
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List of Active Threads.
Definition at line 523 of file fetch.hh.
Referenced by DefaultFetch< Impl >::getFetchingThread(), DefaultFetch< Impl >::iqCount(), DefaultFetch< Impl >::lsqCount(), DefaultFetch< Impl >::profileStall(), DefaultFetch< Impl >::setActiveThreads(), DefaultFetch< Impl >::tick(), and DefaultFetch< Impl >::updateFetchStatus().
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Definition at line 432 of file fetch.hh.
Referenced by DefaultFetch< Impl >::checkSignalsAndUpdate(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::drainSanityCheck(), and DefaultFetch< Impl >::lookupAndUpdateNextPC().
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Cache block size.
Definition at line 491 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch().
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Is the cache blocked? If so no threads can access it.
Definition at line 482 of file fetch.hh.
Referenced by DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::drainSanityCheck(), DefaultFetch< Impl >::fetchCacheLine(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::recvReqRetry(), and DefaultFetch< Impl >::resetStage().
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Commit to fetch delay.
Definition at line 473 of file fetch.hh.
Referenced by DefaultFetch< Impl >::setTimeBuffer().
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Pointer to the O3CPU.
Definition at line 410 of file fetch.hh.
Referenced by DefaultFetch< Impl >::buildInst(), DefaultFetch< Impl >::checkStall(), DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::drainStall(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::fetchCacheLine(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::processCacheCompletion(), DefaultFetch< Impl >::resetStage(), DefaultFetch< Impl >::squash(), DefaultFetch< Impl >::squashFromDecode(), DefaultFetch< Impl >::switchToActive(), DefaultFetch< Impl >::switchToInactive(), DefaultFetch< Impl >::takeOverFrom(), DefaultFetch< Impl >::tick(), and DefaultFetch< Impl >::updateFetchStatus().
TheISA::Decoder* DefaultFetch< Impl >::decoder[Impl::MaxThreads] |
The decoder.
Definition at line 377 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::doSquash(), and DefaultFetch< Impl >::fetch().
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Decode to fetch delay.
Definition at line 464 of file fetch.hh.
Referenced by DefaultFetch< Impl >::setTimeBuffer().
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The width of decode in instructions.
Definition at line 479 of file fetch.hh.
Referenced by DefaultFetch< Impl >::tick().
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Can the fetch stage redirect from an interrupt on this instruction?
Definition at line 441 of file fetch.hh.
Referenced by DefaultFetch< Impl >::buildInst(), DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::fetchCacheLine(), and DefaultFetch< Impl >::resetStage().
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The fetch data that is being fetched and buffered.
Definition at line 502 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::processCacheCompletion().
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Mask to align a fetch address to a fetch buffer boundary.
Definition at line 499 of file fetch.hh.
Referenced by DefaultFetch< Impl >::fetchBufferAlignPC().
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The PC of the first instruction loaded into the fetch buffer.
Definition at line 505 of file fetch.hh.
Referenced by DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::pipelineIcacheAccesses(), and DefaultFetch< Impl >::resetStage().
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The size of the fetch buffer in bytes.
The fetch buffer itself may be smaller than a cache line.
Definition at line 496 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::fetchCacheLine(), DefaultFetch< Impl >::finishTranslation(), and DefaultFetch< Impl >::processCacheCompletion().
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Whether or not the fetch buffer data is valid.
Definition at line 514 of file fetch.hh.
Referenced by DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::pipelineIcacheAccesses(), DefaultFetch< Impl >::processCacheCompletion(), and DefaultFetch< Impl >::resetStage().
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Definition at line 436 of file fetch.hh.
Referenced by DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::pipelineIcacheAccesses(), and DefaultFetch< Impl >::resetStage().
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Fetch policy.
Definition at line 208 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch(), and DefaultFetch< Impl >::getFetchingThread().
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Queue of fetched instructions.
Per-thread to prevent HoL blocking.
Definition at line 511 of file fetch.hh.
Referenced by DefaultFetch< Impl >::buildInst(), DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::isDrained(), DefaultFetch< Impl >::resetStage(), and DefaultFetch< Impl >::tick().
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The size of the fetch queue in micro-ops.
Definition at line 508 of file fetch.hh.
Referenced by DefaultFetch< Impl >::buildInst(), DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::finishTranslation().
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Per-thread status.
Definition at line 205 of file fetch.hh.
Referenced by DefaultFetch< Impl >::checkSignalsAndUpdate(), DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::drainSanityCheck(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::fetchCacheLine(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::getFetchingThread(), DefaultFetch< Impl >::iqCount(), DefaultFetch< Impl >::isDrained(), DefaultFetch< Impl >::lsqCount(), DefaultFetch< Impl >::processCacheCompletion(), DefaultFetch< Impl >::profileStall(), DefaultFetch< Impl >::recvReqRetry(), DefaultFetch< Impl >::resetStage(), DefaultFetch< Impl >::roundRobin(), DefaultFetch< Impl >::updateFetchStatus(), and DefaultFetch< Impl >::wakeFromQuiesce().
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The width of fetch in instructions.
Definition at line 476 of file fetch.hh.
Referenced by DefaultFetch< Impl >::buildInst(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::finishTranslation().
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Event used to delay fault generation of translation faults.
Definition at line 546 of file fetch.hh.
Referenced by DefaultFetch< Impl >::finishTranslation(), and DefaultFetch< Impl >::isDrained().
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Wire to get commit's information from backwards time buffer.
Definition at line 425 of file fetch.hh.
Referenced by DefaultFetch< Impl >::checkSignalsAndUpdate(), DefaultFetch< Impl >::setTimeBuffer(), and DefaultFetch< Impl >::tick().
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Wire to get decode's information from backwards time buffer.
Definition at line 416 of file fetch.hh.
Referenced by DefaultFetch< Impl >::checkSignalsAndUpdate(), and DefaultFetch< Impl >::setTimeBuffer().
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Wire to get iew's information from backwards time buffer.
Definition at line 422 of file fetch.hh.
Referenced by DefaultFetch< Impl >::iqCount(), DefaultFetch< Impl >::lsqCount(), and DefaultFetch< Impl >::setTimeBuffer().
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Wire to get rename's information from backwards time buffer.
Definition at line 419 of file fetch.hh.
Referenced by DefaultFetch< Impl >::setTimeBuffer().
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Instruction port.
Note that it has to appear after the fetch stage.
Definition at line 540 of file fetch.hh.
Referenced by DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::getInstPort(), and DefaultFetch< Impl >::recvReqRetry().
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IEW to fetch delay.
Definition at line 470 of file fetch.hh.
Referenced by DefaultFetch< Impl >::setTimeBuffer().
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Size of instructions.
Definition at line 517 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch(), and DefaultFetch< Impl >::fetch().
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Checks if there is an interrupt pending.
If there is, fetch must stop once it is not fetching PAL instructions.
Definition at line 537 of file fetch.hh.
Referenced by DefaultFetch< Impl >::checkInterrupt(), DefaultFetch< Impl >::drainSanityCheck(), DefaultFetch< Impl >::resetStage(), and DefaultFetch< Impl >::tick().
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Set to true if a pipelined I-cache request should be issued.
Definition at line 543 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::pipelineIcacheAccesses(), and DefaultFetch< Impl >::tick().
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Icache stall statistics.
Definition at line 520 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch(), and DefaultFetch< Impl >::finishTranslation().
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Definition at line 438 of file fetch.hh.
Referenced by DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::resetStage().
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Memory request used to access cache.
Definition at line 444 of file fetch.hh.
Referenced by DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::drainSanityCheck(), DefaultFetch< Impl >::fetchCacheLine(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::processCacheCompletion(), and DefaultFetch< Impl >::resetStage().
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Number of threads that are actively fetching.
Definition at line 529 of file fetch.hh.
Referenced by DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::tick().
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Tracks how many instructions has been fetched this cycle.
Definition at line 452 of file fetch.hh.
Referenced by DefaultFetch< Impl >::buildInst(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::resetStage(), and DefaultFetch< Impl >::tick().
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Number of threads.
Definition at line 526 of file fetch.hh.
Referenced by DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::drainResume(), DefaultFetch< Impl >::drainSanityCheck(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::getFetchingThread(), DefaultFetch< Impl >::isDrained(), DefaultFetch< Impl >::resetStage(), DefaultFetch< Impl >::roundRobin(), and DefaultFetch< Impl >::tick().
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Definition at line 434 of file fetch.hh.
Referenced by DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::fetchCacheLine(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::pipelineIcacheAccesses(), and DefaultFetch< Impl >::resetStage().
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To probe when a fetch request is successfully sent.
Definition at line 216 of file fetch.hh.
Referenced by DefaultFetch< Impl >::finishTranslation(), and DefaultFetch< Impl >::recvReqRetry().
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List that has the threads organized by priority.
Definition at line 211 of file fetch.hh.
Referenced by DefaultFetch< Impl >::deactivateThread(), DefaultFetch< Impl >::resetStage(), DefaultFetch< Impl >::roundRobin(), and DefaultFetch< Impl >::startupStage().
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Rename to fetch delay.
Definition at line 467 of file fetch.hh.
Referenced by DefaultFetch< Impl >::setTimeBuffer().
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The packet that is waiting to be retried.
Definition at line 485 of file fetch.hh.
Referenced by DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::drainSanityCheck(), DefaultFetch< Impl >::finishTranslation(), and DefaultFetch< Impl >::recvReqRetry().
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The thread that is waiting on the cache to tell fetch to retry.
Definition at line 488 of file fetch.hh.
Referenced by DefaultFetch< Impl >::doSquash(), DefaultFetch< Impl >::drainSanityCheck(), DefaultFetch< Impl >::finishTranslation(), and DefaultFetch< Impl >::recvReqRetry().
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Tracks which stages are telling fetch to stall.
Definition at line 461 of file fetch.hh.
Referenced by DefaultFetch< Impl >::checkSignalsAndUpdate(), DefaultFetch< Impl >::checkStall(), DefaultFetch< Impl >::clearStates(), DefaultFetch< Impl >::DefaultFetch(), DefaultFetch< Impl >::drainResume(), DefaultFetch< Impl >::drainSanityCheck(), DefaultFetch< Impl >::drainStall(), DefaultFetch< Impl >::isDrained(), DefaultFetch< Impl >::profileStall(), DefaultFetch< Impl >::resetStage(), and DefaultFetch< Impl >::tick().
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Thread ID being fetched.
Definition at line 532 of file fetch.hh.
Referenced by DefaultFetch< Impl >::fetch(), and DefaultFetch< Impl >::tick().
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Time buffer interface.
Definition at line 413 of file fetch.hh.
Referenced by DefaultFetch< Impl >::setTimeBuffer().
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Wire used to write any information heading to decode.
Definition at line 429 of file fetch.hh.
Referenced by DefaultFetch< Impl >::setFetchQueue(), and DefaultFetch< Impl >::tick().
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Variable that tracks if fetch has written to the time buffer this cycle.
Used to tell CPU if there is activity this cycle.
Definition at line 449 of file fetch.hh.
Referenced by DefaultFetch< Impl >::fetch(), DefaultFetch< Impl >::finishTranslation(), DefaultFetch< Impl >::resetStage(), and DefaultFetch< Impl >::tick().