gem5  v20.1.0.0
pseudo_inst.cc
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42 
43 #include "sim/pseudo_inst.hh"
44 
45 #include <fcntl.h>
46 #include <unistd.h>
47 
48 #include <array>
49 #include <cerrno>
50 #include <fstream>
51 #include <string>
52 #include <vector>
53 
54 #include "base/debug.hh"
55 #include "base/output.hh"
56 #include "config/the_isa.hh"
57 #include "cpu/base.hh"
58 #include "cpu/thread_context.hh"
59 #include "debug/Loader.hh"
60 #include "debug/Quiesce.hh"
61 #include "debug/WorkItems.hh"
62 #include "dev/net/dist_iface.hh"
63 #include "params/BaseCPU.hh"
64 #include "sim/full_system.hh"
65 #include "sim/process.hh"
66 #include "sim/serialize.hh"
67 #include "sim/sim_events.hh"
68 #include "sim/sim_exit.hh"
69 #include "sim/stat_control.hh"
70 #include "sim/stats.hh"
71 #include "sim/system.hh"
72 
73 using namespace std;
74 using namespace Stats;
75 
76 namespace PseudoInst
77 {
78 
85 namespace InitParamKey
86 {
87 
91 const std::string DEFAULT = "";
95 const std::string DIST_RANK = "dist-rank";
99 const std::string DIST_SIZE = "dist-size";
100 
101 } // namespace InitParamKey
102 
103 static inline void
105 {
106  panic("Pseudo inst \"%s\" is only available in Full System mode.");
107 }
108 
109 void
111 {
112  DPRINTF(PseudoInst, "PseudoInst::arm()\n");
113  if (!FullSystem)
114  panicFsOnlyPseudoInst("arm");
115 
116  auto *workload = tc->getSystemPtr()->workload;
117  if (workload)
118  workload->recordArm();
119 }
120 
121 void
123 {
124  DPRINTF(PseudoInst, "PseudoInst::quiesce()\n");
125  tc->quiesce();
126 }
127 
128 void
130 {
131  DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n");
132  tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1);
133 }
134 
135 void
136 quiesceNs(ThreadContext *tc, uint64_t ns)
137 {
138  DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns);
140 }
141 
142 void
143 quiesceCycles(ThreadContext *tc, uint64_t cycles)
144 {
145  DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles);
146  tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles)));
147 }
148 
149 uint64_t
151 {
152  DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n");
153 
154  return (tc->readLastActivate() - tc->readLastSuspend()) /
156 }
157 
158 uint64_t
160 {
161  DPRINTF(PseudoInst, "PseudoInst::rpns()\n");
162  return curTick() / SimClock::Int::ns;
163 }
164 
165 void
167 {
168  DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid);
169  System *sys = tc->getSystemPtr();
170 
171  if (sys->threads.size() <= cpuid) {
172  warn("PseudoInst::wakeCPU(%i), cpuid greater than number of contexts"
173  "(%i)\n", cpuid, sys->threads.size());
174  return;
175  }
176 
177  ThreadContext *other_tc = sys->threads[cpuid];
178  if (other_tc->status() == ThreadContext::Suspended)
179  other_tc->activate();
180 }
181 
182 void
184 {
185  DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
186  if (DistIface::readyToExit(delay)) {
187  Tick when = curTick() + delay * SimClock::Int::ns;
188  exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
189  }
190 }
191 
192 // m5sum is for sanity checking the gem5 op interface.
193 uint64_t
194 m5sum(ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c,
195  uint64_t d, uint64_t e, uint64_t f)
196 {
197  DPRINTF(PseudoInst, "PseudoInst::m5sum(%#x, %#x, %#x, %#x, %#x, %#x)\n",
198  a, b, c, d, e, f);
199  return a + b + c + d + e + f;
200 }
201 
202 void
203 m5fail(ThreadContext *tc, Tick delay, uint64_t code)
204 {
205  DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
206  Tick when = curTick() + delay * SimClock::Int::ns;
207  exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
208 }
209 
210 void
212 {
213  DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n");
214  if (!FullSystem)
215  panicFsOnlyPseudoInst("loadsymbol");
216 
217  const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
218  if (filename.empty()) {
219  return;
220  }
221 
222  std::string buffer;
223  ifstream file(filename.c_str());
224 
225  if (!file)
226  fatal("file error: Can't open symbol table file %s\n", filename);
227 
228  while (!file.eof()) {
229  getline(file, buffer);
230 
231  if (buffer.empty())
232  continue;
233 
234  string::size_type idx = buffer.find(' ');
235  if (idx == string::npos)
236  continue;
237 
238  string address = "0x" + buffer.substr(0, idx);
239  eat_white(address);
240  if (address.empty())
241  continue;
242 
243  // Skip over letter and space
244  string symbol = buffer.substr(idx + 3);
245  eat_white(symbol);
246  if (symbol.empty())
247  continue;
248 
249  Addr addr;
250  if (!to_number(address, addr))
251  continue;
252 
253  if (!tc->getSystemPtr()->workload->insertSymbol(
254  { Loader::Symbol::Binding::Global, symbol, addr })) {
255  continue;
256  }
257 
258 
259  DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
260  }
261  file.close();
262 }
263 
264 void
266 {
267  DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
268  addr, symbolAddr);
269  if (!FullSystem)
270  panicFsOnlyPseudoInst("addSymbol");
271 
272  std::string symbol;
273  tc->getVirtProxy().readString(symbol, symbolAddr);
274 
275  DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
276 
281 }
282 
283 uint64_t
284 initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
285 {
286  DPRINTF(PseudoInst, "PseudoInst::initParam() key:%s%s\n", (char *)&key_str1,
287  (char *)&key_str2);
288  if (!FullSystem) {
289  panicFsOnlyPseudoInst("initParam");
290  return 0;
291  }
292 
293  // The key parameter string is passed in via two 64-bit registers. We copy
294  // out the characters from the 64-bit integer variables here, and
295  // concatenate them in the key character buffer
296  const int len = 2 * sizeof(uint64_t) + 1;
297  char key[len];
298  memset(key, '\0', len);
299 
300  std::array<uint64_t, 2> key_regs = {{ key_str1, key_str2 }};
301  key_regs = letoh(key_regs);
302  memcpy(key, key_regs.data(), sizeof(key_regs));
303 
304  // Check key parameter to figure out what to return.
305  const std::string key_str(key);
306  if (key == InitParamKey::DEFAULT)
307  return tc->getCpuPtr()->system->init_param;
308  else if (key == InitParamKey::DIST_RANK)
309  return DistIface::rankParam();
310  else if (key == InitParamKey::DIST_SIZE)
311  return DistIface::sizeParam();
312  else
313  panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str);
314 }
315 
316 
317 void
318 resetstats(ThreadContext *tc, Tick delay, Tick period)
319 {
320  DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period);
321  if (!tc->getCpuPtr()->params()->do_statistics_insts)
322  return;
323 
324 
325  Tick when = curTick() + delay * SimClock::Int::ns;
326  Tick repeat = period * SimClock::Int::ns;
327 
328  Stats::schedStatEvent(false, true, when, repeat);
329 }
330 
331 void
332 dumpstats(ThreadContext *tc, Tick delay, Tick period)
333 {
334  DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period);
335  if (!tc->getCpuPtr()->params()->do_statistics_insts)
336  return;
337 
338 
339  Tick when = curTick() + delay * SimClock::Int::ns;
340  Tick repeat = period * SimClock::Int::ns;
341 
342  Stats::schedStatEvent(true, false, when, repeat);
343 }
344 
345 void
347 {
348  DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period);
349  if (!tc->getCpuPtr()->params()->do_statistics_insts)
350  return;
351 
352 
353  Tick when = curTick() + delay * SimClock::Int::ns;
354  Tick repeat = period * SimClock::Int::ns;
355 
356  Stats::schedStatEvent(true, true, when, repeat);
357 }
358 
359 void
360 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
361 {
362  DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period);
363  if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
364  return;
365 
366  if (DistIface::readyToCkpt(delay, period)) {
367  Tick when = curTick() + delay * SimClock::Int::ns;
368  Tick repeat = period * SimClock::Int::ns;
369  exitSimLoop("checkpoint", 0, when, repeat);
370  }
371 }
372 
373 uint64_t
374 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
375 {
376  DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
377  vaddr, len, offset);
378  if (!FullSystem) {
379  panicFsOnlyPseudoInst("readfile");
380  return 0;
381  }
382 
383  const string &file = tc->getSystemPtr()->params()->readfile;
384  if (file.empty()) {
385  return ULL(0);
386  }
387 
388  uint64_t result = 0;
389 
390  int fd = ::open(file.c_str(), O_RDONLY, 0);
391  if (fd < 0)
392  panic("could not open file %s\n", file);
393 
394  if (::lseek(fd, offset, SEEK_SET) < 0)
395  panic("could not seek: %s", strerror(errno));
396 
397  char *buf = new char[len];
398  char *p = buf;
399  while (len > 0) {
400  int bytes = ::read(fd, p, len);
401  if (bytes <= 0)
402  break;
403 
404  p += bytes;
405  result += bytes;
406  len -= bytes;
407  }
408 
409  close(fd);
410  tc->getVirtProxy().writeBlob(vaddr, buf, result);
411  delete [] buf;
412  return result;
413 }
414 
415 uint64_t
416 writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
417  Addr filename_addr)
418 {
419  DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
420  vaddr, len, offset, filename_addr);
421 
422  // copy out target filename
423  std::string filename;
424  tc->getVirtProxy().readString(filename, filename_addr);
425 
426  OutputStream *out;
427  if (offset == 0) {
428  // create a new file (truncate)
429  out = simout.create(filename, true, true);
430  } else {
431  // do not truncate file if offset is non-zero
432  // (ios::in flag is required as well to keep the existing data
433  // intact, otherwise existing data will be zeroed out.)
434  out = simout.open(filename, ios::in | ios::out | ios::binary, true);
435  }
436 
437  ostream *os(out->stream());
438  if (!os)
439  panic("could not open file %s\n", filename);
440 
441  if (offset != 0) {
442  // seek to offset
443  os->seekp(offset);
444  }
445 
446  // copy out data and write to file
447  char *buf = new char[len];
448  tc->getVirtProxy().readBlob(vaddr, buf, len);
449  os->write(buf, len);
450  if (os->fail() || os->bad())
451  panic("Error while doing writefile!\n");
452 
453  simout.close(out);
454 
455  delete [] buf;
456 
457  return len;
458 }
459 
460 void
462 {
463  DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n");
465 }
466 
467 void
469 {
470  DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n");
471  exitSimLoop("switchcpu");
472 }
473 
474 /*
475  * This function is executed when the simulation is executing the syscall
476  * handler in System Emulation mode.
477  */
478 void
480 {
481  DPRINTF(PseudoInst, "PseudoInst::m5Syscall()\n");
482  tc->syscall();
483 }
484 
485 void
487 {
488  DPRINTF(PseudoInst, "PseudoInst::togglesync()\n");
490 }
491 
492 //
493 // This function is executed when annotated work items begin. Depending on
494 // what the user specified at the command line, the simulation may exit and/or
495 // take a checkpoint when a certain work item begins.
496 //
497 void
498 workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
499 {
500  DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid);
501  System *sys = tc->getSystemPtr();
502  const System::Params *params = sys->params();
503 
504  if (params->exit_on_work_items) {
505  exitSimLoop("workbegin", static_cast<int>(workid));
506  return;
507  }
508 
509  DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
510  threadid);
511  tc->getCpuPtr()->workItemBegin();
512  sys->workItemBegin(threadid, workid);
513 
514  //
515  // If specified, determine if this is the specific work item the user
516  // identified
517  //
518  if (params->work_item_id == -1 || params->work_item_id == workid) {
519 
520  uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
521  int cpuId = tc->getCpuPtr()->cpuId();
522 
523  if (params->work_cpus_ckpt_count != 0 &&
524  sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
525  //
526  // If active cpus equals checkpoint count, create checkpoint
527  //
528  exitSimLoop("checkpoint");
529  }
530 
531  if (systemWorkBeginCount == params->work_begin_ckpt_count) {
532  //
533  // Note: the string specified as the cause of the exit event must
534  // exactly equal "checkpoint" inorder to create a checkpoint
535  //
536  exitSimLoop("checkpoint");
537  }
538 
539  if (systemWorkBeginCount == params->work_begin_exit_count) {
540  //
541  // If a certain number of work items started, exit simulation
542  //
543  exitSimLoop("work started count reach");
544  }
545 
546  if (cpuId == params->work_begin_cpu_id_exit) {
547  //
548  // If work started on the cpu id specified, exit simulation
549  //
550  exitSimLoop("work started on specific cpu");
551  }
552  }
553 }
554 
555 //
556 // This function is executed when annotated work items end. Depending on
557 // what the user specified at the command line, the simulation may exit and/or
558 // take a checkpoint when a certain work item ends.
559 //
560 void
561 workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
562 {
563  DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid);
564  System *sys = tc->getSystemPtr();
565  const System::Params *params = sys->params();
566 
567  if (params->exit_on_work_items) {
568  exitSimLoop("workend", static_cast<int>(workid));
569  return;
570  }
571 
572  DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
573  tc->getCpuPtr()->workItemEnd();
574  sys->workItemEnd(threadid, workid);
575 
576  //
577  // If specified, determine if this is the specific work item the user
578  // identified
579  //
580  if (params->work_item_id == -1 || params->work_item_id == workid) {
581 
582  uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
583  int cpuId = tc->getCpuPtr()->cpuId();
584 
585  if (params->work_cpus_ckpt_count != 0 &&
586  sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
587  //
588  // If active cpus equals checkpoint count, create checkpoint
589  //
590  exitSimLoop("checkpoint");
591  }
592 
593  if (params->work_end_ckpt_count != 0 &&
594  systemWorkEndCount == params->work_end_ckpt_count) {
595  //
596  // If total work items completed equals checkpoint count, create
597  // checkpoint
598  //
599  exitSimLoop("checkpoint");
600  }
601 
602  if (params->work_end_exit_count != 0 &&
603  systemWorkEndCount == params->work_end_exit_count) {
604  //
605  // If total work items completed equals exit count, exit simulation
606  //
607  exitSimLoop("work items exit count reached");
608  }
609  }
610 }
611 
612 } // namespace PseudoInst
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:183
PseudoInst::debugbreak
void debugbreak(ThreadContext *tc)
Definition: pseudo_inst.cc:461
ArmISA::ns
Bitfield< 0 > ns
Definition: miscregs_types.hh:328
SimClock::Int::ns
Tick ns
nanosecond
Definition: core.cc:65
X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:803
warn
#define warn(...)
Definition: logging.hh:239
system.hh
PseudoInst::workbegin
void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
Definition: pseudo_inst.cc:498
ThreadContext::activate
virtual void activate()=0
Set the status to Active.
MipsISA::cpuid
Bitfield< 28, 21 > cpuid
Definition: dt_constants.hh:92
serialize.hh
ThreadContext::quiesce
void quiesce()
Quiesce thread context.
Definition: thread_context.cc:129
Debug::breakpoint
void breakpoint()
Definition: debug.cc:62
sim_events.hh
System::workItemEnd
void workItemEnd(uint32_t tid, uint32_t workid)
Definition: system.cc:509
PseudoInst::InitParamKey::DIST_RANK
const std::string DIST_RANK
Unique key for "rank" param (distributed gem5 runs)
Definition: pseudo_inst.cc:95
PseudoInst::m5Syscall
void m5Syscall(ThreadContext *tc)
Definition: pseudo_inst.cc:479
PseudoInst::m5exit
void m5exit(ThreadContext *tc, Tick delay)
Definition: pseudo_inst.cc:183
ArmISA::fd
Bitfield< 14, 12 > fd
Definition: types.hh:159
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
PseudoInst::rpns
uint64_t rpns(ThreadContext *tc)
Definition: pseudo_inst.cc:159
OutputDirectory::create
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition: output.cc:209
DistIface::toggleSync
static void toggleSync(ThreadContext *tc)
Trigger the primary to start/stop synchronization.
Definition: dist_iface.cc:851
FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition: root.cc:132
System::Params
SystemParams Params
Definition: system.hh:564
System::markWorkItem
int markWorkItem(int index)
Called by pseudo_inst to mark the cpus actively executing work items.
Definition: system.hh:546
System::workItemBegin
void workItemBegin(uint32_t tid, uint32_t workid)
Definition: system.hh:552
PseudoInst::quiesceTime
uint64_t quiesceTime(ThreadContext *tc)
Definition: pseudo_inst.cc:150
sim_exit.hh
output.hh
System::incWorkItemsEnd
uint64_t incWorkItemsEnd()
Called by pseudo_inst to track the number of work items completed by this system.
Definition: system.hh:535
Loader::Symbol::Binding::Global
@ Global
PseudoInst
Definition: pseudo_inst.cc:76
PortProxy::writeBlob
void writeBlob(Addr addr, const void *p, int size) const
Same as tryWriteBlob, but insists on success.
Definition: port_proxy.hh:187
PseudoInst::dumpstats
void dumpstats(ThreadContext *tc, Tick delay, Tick period)
Definition: pseudo_inst.cc:332
ThreadContext::readLastSuspend
virtual Tick readLastSuspend()=0
to_number
bool to_number(const std::string &value, VecPredRegContainer< NumBits, Packed > &p)
Helper functions used for serialization/de-serialization.
Definition: vec_pred_reg.hh:379
stats.hh
PseudoInst::readfile
uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
Definition: pseudo_inst.cc:374
Loader
Definition: process.hh:39
pseudo_inst.hh
ThreadContext::readLastActivate
virtual Tick readLastActivate()=0
PseudoInst::switchcpu
void switchcpu(ThreadContext *tc)
Definition: pseudo_inst.cc:468
letoh
T letoh(T value)
Definition: byteswap.hh:141
Loader::debugSymbolTable
SymbolTable debugSymbolTable
Global unified debugging symbol table (for target).
Definition: symtab.cc:47
PseudoInst::togglesync
void togglesync(ThreadContext *tc)
Definition: pseudo_inst.cc:486
PseudoInst::InitParamKey::DIST_SIZE
const std::string DIST_SIZE
Unique key for "size" param (distributed gem5 runs)
Definition: pseudo_inst.cc:99
DistIface::rankParam
static uint64_t rankParam()
Getter for the dist rank param.
Definition: dist_iface.cc:917
System::workload
Workload * workload
OS kernel.
Definition: system.hh:327
BaseCPU::workItemBegin
void workItemBegin()
Definition: base.hh:209
ArmISA::a
Bitfield< 8 > a
Definition: miscregs_types.hh:62
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
PortProxy::readString
void readString(std::string &str, Addr addr) const
Same as tryReadString, but insists on success.
Definition: port_proxy.hh:255
System::init_param
uint64_t init_param
Definition: system.hh:320
System
Definition: system.hh:73
OutputStream::stream
std::ostream * stream() const
Get the output underlying output stream.
Definition: output.hh:59
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
PseudoInst::initParam
uint64_t initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
Definition: pseudo_inst.cc:284
PseudoInst::workend
void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
Definition: pseudo_inst.cc:561
ArmISA::d
Bitfield< 9 > d
Definition: miscregs_types.hh:60
MipsISA::vaddr
vaddr
Definition: pra_constants.hh:275
PseudoInst::dumpresetstats
void dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
Definition: pseudo_inst.cc:346
process.hh
dist_iface.hh
debug.hh
PseudoInst::quiesceSkip
void quiesceSkip(ThreadContext *tc)
Definition: pseudo_inst.cc:129
OutputDirectory::close
void close(OutputStream *file)
Closes an output file and free the corresponding OutputFile.
Definition: output.cc:146
Workload::insertSymbol
virtual bool insertSymbol(const Loader::Symbol &symbol)=0
exitSimLoop
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Definition: sim_events.cc:88
System::Threads::size
int size() const
Definition: system.hh:204
System::incWorkItemsBegin
uint64_t incWorkItemsBegin()
Called by pseudo_inst to track the number of work items started by this system.
Definition: system.hh:525
PseudoInst::m5sum
uint64_t m5sum(ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c, uint64_t d, uint64_t e, uint64_t f)
Definition: pseudo_inst.cc:194
PseudoInst::panicFsOnlyPseudoInst
static void panicFsOnlyPseudoInst(const char *name)
Definition: pseudo_inst.cc:104
ThreadContext::status
virtual Status status() const =0
PseudoInst::m5fail
void m5fail(ThreadContext *tc, Tick delay, uint64_t code)
Definition: pseudo_inst.cc:203
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
BaseCPU::params
const Params * params() const
Definition: base.hh:296
PseudoInst::writefile
uint64_t writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, Addr filename_addr)
Definition: pseudo_inst.cc:416
name
const std::string & name()
Definition: trace.cc:50
ThreadContext::quiesceTick
void quiesceTick(Tick resume)
Quiesce, suspend, and schedule activate at resume.
Definition: thread_context.cc:136
DistIface::readyToExit
static bool readyToExit(Tick delay)
Initiate the exit from the simulation.
Definition: dist_iface.cc:892
eat_white
void eat_white(std::string &s)
Definition: str.hh:64
Stats::schedStatEvent
void schedStatEvent(bool dump, bool reset, Tick when, Tick repeat)
Schedule statistics dumping.
Definition: stat_control.cc:237
full_system.hh
ArmISA::e
Bitfield< 9 > e
Definition: miscregs_types.hh:61
ThreadContext::getVirtProxy
virtual PortProxy & getVirtProxy()=0
stat_control.hh
ThreadContext::syscall
virtual void syscall()=0
System::threads
Threads threads
Definition: system.hh:309
ThreadContext::Suspended
@ Suspended
Temporarily inactive.
Definition: thread_context.hh:106
PseudoInst::quiesce
void quiesce(ThreadContext *tc)
Definition: pseudo_inst.cc:122
PseudoInst::quiesceCycles
void quiesceCycles(ThreadContext *tc, uint64_t cycles)
Definition: pseudo_inst.cc:143
ArmISA::b
Bitfield< 7 > b
Definition: miscregs_types.hh:376
base.hh
std
Overload hash function for BasicBlockRange type.
Definition: vec_reg.hh:587
BaseCPU::system
System * system
Definition: base.hh:371
OutputStream
Definition: output.hh:53
PseudoInst::InitParamKey::DEFAULT
const std::string DEFAULT
The default key (empty string)
Definition: pseudo_inst.cc:91
ArmISA::len
Bitfield< 18, 16 > len
Definition: miscregs_types.hh:439
addr
ip6_addr_t addr
Definition: inet.hh:423
PseudoInst::wakeCPU
void wakeCPU(ThreadContext *tc, uint64_t cpuid)
Definition: pseudo_inst.cc:166
DistIface::readyToCkpt
static bool readyToCkpt(Tick delay, Tick period)
Initiate taking a checkpoint.
Definition: dist_iface.cc:820
Cycles
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:83
PseudoInst::arm
void arm(ThreadContext *tc)
Definition: pseudo_inst.cc:110
PseudoInst::m5checkpoint
void m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
Definition: pseudo_inst.cc:360
ArmISA::c
Bitfield< 29 > c
Definition: miscregs_types.hh:50
Stats
Definition: statistics.cc:61
PseudoInst::quiesceNs
void quiesceNs(ThreadContext *tc, uint64_t ns)
Definition: pseudo_inst.cc:136
Stats::size_type
unsigned int size_type
Definition: types.hh:54
PseudoInst::addsymbol
void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
Definition: pseudo_inst.cc:265
Loader::SymbolTable::insert
bool insert(const Symbol &symbol)
Definition: symtab.cc:58
PseudoInst::loadsymbol
void loadsymbol(ThreadContext *tc)
Definition: pseudo_inst.cc:211
simout
OutputDirectory simout
Definition: output.cc:61
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
PseudoInst::resetstats
void resetstats(ThreadContext *tc, Tick delay, Tick period)
Definition: pseudo_inst.cc:318
BaseCPU::workItemEnd
void workItemEnd()
Definition: base.hh:210
OutputDirectory::open
OutputStream * open(const std::string &name, std::ios_base::openmode mode, bool recreateable=true, bool no_gz=false)
Open a file in this directory (optionally compressed).
Definition: output.cc:223
PortProxy::readBlob
void readBlob(Addr addr, void *p, int size) const
Higher level interfaces based on the above.
Definition: port_proxy.hh:177
ThreadContext::getCpuPtr
virtual BaseCPU * getCpuPtr()=0
Workload::recordArm
void recordArm()
Definition: workload.hh:62
System::params
const Params * params() const
Definition: system.hh:579
DistIface::sizeParam
static uint64_t sizeParam()
Getter for the dist size param.
Definition: dist_iface.cc:930
thread_context.hh
ULL
#define ULL(N)
uint64_t constant
Definition: types.hh:50
BaseCPU::cpuId
int cpuId() const
Reads this CPU's ID.
Definition: base.hh:178
ThreadContext::getSystemPtr
virtual System * getSystemPtr()=0
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:171
ArmISA::f
Bitfield< 6 > f
Definition: miscregs_types.hh:64
curTick
Tick curTick()
The current simulated tick.
Definition: core.hh:45
ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:153

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