gem5  v20.1.0.0
gem5_to_tlm.cc
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38  * 2. Redistributions in binary form must reproduce the above copyright
39  * notice, this list of conditions and the following disclaimer in the
40  * documentation and/or other materials provided with the distribution.
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43  * contributors may be used to endorse or promote products derived from
44  * this software without specific prior written permission.
45  *
46  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
47  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
48  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
49  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
50  * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
51  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
52  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
53  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
54  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
55  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
56  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57  */
58 
60 
61 #include "params/Gem5ToTlmBridge32.hh"
62 #include "params/Gem5ToTlmBridge64.hh"
63 #include "sim/system.hh"
66 
67 namespace sc_gem5
68 {
69 
75 
82 {
84  trans->acquire();
85 
86  trans->set_address(packet->getAddr());
87 
88  /* Check if this transaction was allocated by mm */
89  sc_assert(trans->has_mm());
90 
91  unsigned int size = packet->getSize();
92  unsigned char *data = packet->getPtr<unsigned char>();
93 
94  trans->set_data_length(size);
95  trans->set_streaming_width(size);
96  trans->set_data_ptr(data);
97 
98  if ((packet->req->getFlags() & Request::NO_ACCESS) != 0) {
99  /* Do nothing */
101  } else if (packet->isRead()) {
103  } else if (packet->isWrite()) {
105  } else {
107  }
108 
109  // Attach the packet pointer to the TLM transaction to keep track.
110  auto *extension = new Gem5SystemC::Gem5Extension(packet);
111  trans->set_auto_extension(extension);
112 
113  return trans;
114 }
115 
116 template <unsigned int BITWIDTH>
117 void
119  tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase)
120 {
121  sc_core::sc_time delay;
122 
123  if (phase == tlm::END_REQ ||
124  (&trans == blockingRequest && phase == tlm::BEGIN_RESP)) {
125  sc_assert(&trans == blockingRequest);
126  blockingRequest = nullptr;
127 
128  // Did another request arrive while blocked, schedule a retry.
129  if (needToSendRequestRetry) {
130  needToSendRequestRetry = false;
131  bridgeResponsePort.sendRetryReq();
132  }
133  }
134  if (phase == tlm::BEGIN_RESP) {
135  auto &extension = Gem5SystemC::Gem5Extension::getExtension(trans);
136  auto packet = extension.getPacket();
137 
138  sc_assert(!blockingResponse);
139 
140  bool need_retry = false;
141 
142  /*
143  * If the packet was piped through and needs a response, we don't need
144  * to touch the packet and can forward it directly as a response.
145  * Otherwise, we need to make a response and send the transformed
146  * packet.
147  */
148  if (extension.isPipeThrough()) {
149  if (packet->isResponse()) {
150  need_retry = !bridgeResponsePort.sendTimingResp(packet);
151  }
152  } else if (packet->needsResponse()) {
153  packet->makeResponse();
154  need_retry = !bridgeResponsePort.sendTimingResp(packet);
155  }
156 
157  if (need_retry) {
158  blockingResponse = &trans;
159  } else {
160  if (phase == tlm::BEGIN_RESP) {
161  // Send END_RESP and we're finished:
162  tlm::tlm_phase fw_phase = tlm::END_RESP;
164  socket->nb_transport_fw(trans, fw_phase, delay);
165  // Release the transaction with all the extensions.
166  trans.release();
167  }
168  }
169  }
170 }
171 
172 template <unsigned int BITWIDTH>
175 {
176  sc_dt::uint64 start = trans.get_address();
177  sc_dt::uint64 end = start + trans.get_data_length();
178 
179  // Check for a back door we already know about.
180  AddrRange r(start, end);
181  auto it = backdoorMap.contains(r);
182  if (it != backdoorMap.end())
183  return it->second;
184 
185  // If not, ask the target for one.
186  tlm::tlm_dmi dmi_data;
187  if (!socket->get_direct_mem_ptr(trans, dmi_data))
188  return nullptr;
189 
190  // If the target gave us one, translate it to a gem5 MemBackdoor and
191  // store it in our cache.
192  AddrRange dmi_r(dmi_data.get_start_address(), dmi_data.get_end_address());
193  auto backdoor = new MemBackdoor(
194  dmi_r, dmi_data.get_dmi_ptr(), MemBackdoor::NoAccess);
195  backdoor->readable(dmi_data.is_read_allowed());
196  backdoor->writeable(dmi_data.is_write_allowed());
197 
198  backdoorMap.insert(dmi_r, backdoor);
199 
200  return backdoor;
201 }
202 
203 // Similar to TLM's blocking transport (LT)
204 template <unsigned int BITWIDTH>
205 Tick
207 {
208  panic_if(packet->cacheResponding(),
209  "Should not see packets where cache is responding");
210 
211  // Prepare the transaction.
212  auto *trans = packet2payload(packet);
213 
215 
216  if (trans->get_command() != tlm::TLM_IGNORE_COMMAND) {
217  // Execute b_transport:
218  socket->b_transport(*trans, delay);
219  }
220 
221  if (packet->needsResponse())
222  packet->makeResponse();
223 
224  trans->release();
225 
226  return delay.value();
227 }
228 
229 template <unsigned int BITWIDTH>
230 Tick
232  PacketPtr packet, MemBackdoorPtr &backdoor)
233 {
234  panic_if(packet->cacheResponding(),
235  "Should not see packets where cache is responding");
236 
238 
239  // Prepare the transaction.
240  auto *trans = packet2payload(packet);
241 
242  if (trans->get_command() != tlm::TLM_IGNORE_COMMAND) {
243  // Execute b_transport:
244  socket->b_transport(*trans, delay);
245  // If the hint said we could use DMI, set that up.
246  if (trans->is_dmi_allowed())
247  backdoor = getBackdoor(*trans);
248  } else {
249  // There's no transaction to piggy back on, so just request the
250  // backdoor normally.
251  backdoor = getBackdoor(*trans);
252  }
253 
254  if (packet->needsResponse())
255  packet->makeResponse();
256 
257  trans->release();
258 
259  return delay.value();
260 }
261 
262 template <unsigned int BITWIDTH>
263 void
265 {
266  // Snooping should be implemented with tlm_dbg_transport.
267  SC_REPORT_FATAL("Gem5ToTlmBridge",
268  "unimplemented func.: recvFunctionalSnoop");
269 }
270 
271 // Similar to TLM's non-blocking transport (AT).
272 template <unsigned int BITWIDTH>
273 bool
275 {
276  panic_if(packet->cacheResponding(),
277  "Should not see packets where cache is responding");
278 
279  // We should never get a second request after noting that a retry is
280  // required.
281  sc_assert(!needToSendRequestRetry);
282 
283  // Remember if a request comes in while we're blocked so that a retry
284  // can be sent to gem5.
285  if (blockingRequest) {
286  needToSendRequestRetry = true;
287  return false;
288  }
289 
290  /*
291  * NOTE: normal tlm is blocking here. But in our case we return false
292  * and tell gem5 when a retry can be done. This is the main difference
293  * in the protocol:
294  * if (requestInProgress)
295  * {
296  * wait(endRequestEvent);
297  * }
298  * requestInProgress = trans;
299  */
300 
301  // Prepare the transaction.
302  auto *trans = packet2payload(packet);
303 
304  /*
305  * Pay for annotated transport delays.
306  *
307  * The header delay marks the point in time, when the packet first is seen
308  * by the transactor. This is the point in time when the transactor needs
309  * to send the BEGIN_REQ to the SystemC world.
310  *
311  * NOTE: We drop the payload delay here. Normally, the receiver would be
312  * responsible for handling the payload delay. In this case, however,
313  * the receiver is a SystemC module and has no notion of the gem5
314  * transport protocol and we cannot simply forward the
315  * payload delay to the receiving module. Instead, we expect the
316  * receiving SystemC module to model the payload delay by deferring
317  * the END_REQ. This could lead to incorrect delays, if the XBar
318  * payload delay is longer than the time the receiver needs to accept
319  * the request (time between BEGIN_REQ and END_REQ).
320  *
321  * TODO: We could detect the case described above by remembering the
322  * payload delay and comparing it to the time between BEGIN_REQ and
323  * END_REQ. Then, a warning should be printed.
324  */
325  auto delay = sc_core::sc_time::from_value(packet->payloadDelay);
326  // Reset the delays
327  packet->payloadDelay = 0;
328  packet->headerDelay = 0;
329 
330  // Starting TLM non-blocking sequence (AT) Refer to IEEE1666-2011 SystemC
331  // Standard Page 507 for a visualisation of the procedure.
334  status = socket->nb_transport_fw(*trans, phase, delay);
335  // Check returned value:
336  if (status == tlm::TLM_ACCEPTED) {
337  sc_assert(phase == tlm::BEGIN_REQ);
338  // Accepted but is now blocking until END_REQ (exclusion rule).
339  blockingRequest = trans;
340  } else if (status == tlm::TLM_UPDATED) {
341  // The Timing annotation must be honored:
342  sc_assert(phase == tlm::END_REQ || phase == tlm::BEGIN_RESP);
343  auto cb = [this, trans, phase]() { pec(*trans, phase); };
344  system->schedule(new EventFunctionWrapper(cb, "pec", true),
345  curTick() + delay.value());
346  } else if (status == tlm::TLM_COMPLETED) {
347  // Transaction is over nothing has do be done.
348  sc_assert(phase == tlm::END_RESP);
349  trans->release();
350  }
351 
352  return true;
353 }
354 
355 template <unsigned int BITWIDTH>
356 bool
358 {
359  // Snooping should be implemented with tlm_dbg_transport.
360  SC_REPORT_FATAL("Gem5ToTlmBridge",
361  "unimplemented func.: recvTimingSnoopResp");
362  return false;
363 }
364 
365 template <unsigned int BITWIDTH>
366 bool
368 {
369  panic("tryTiming(PacketPtr) isn't implemented.");
370 }
371 
372 template <unsigned int BITWIDTH>
373 void
375 {
376  /* Retry a response */
377  sc_assert(blockingResponse);
378 
379  tlm::tlm_generic_payload *trans = blockingResponse;
380  blockingResponse = nullptr;
381  PacketPtr packet =
383 
384  bool need_retry = !bridgeResponsePort.sendTimingResp(packet);
385 
386  sc_assert(!need_retry);
387 
390  socket->nb_transport_fw(*trans, phase, delay);
391  // Release transaction with all the extensions
392  trans->release();
393 }
394 
395 // Similar to TLM's debug transport.
396 template <unsigned int BITWIDTH>
397 void
399 {
400  // Prepare the transaction.
401  auto *trans = packet2payload(packet);
402 
403  /* Execute Debug Transport: */
404  unsigned int bytes = socket->transport_dbg(*trans);
405  if (bytes != trans->get_data_length()) {
406  SC_REPORT_FATAL("Gem5ToTlmBridge",
407  "debug transport was not completed");
408  }
409 
410  trans->release();
411 }
412 
413 template <unsigned int BITWIDTH>
416  tlm::tlm_phase &phase, sc_core::sc_time &delay)
417 {
418  auto cb = [this, &trans, phase]() { pec(trans, phase); };
419  system->schedule(new EventFunctionWrapper(cb, "pec", true),
420  curTick() + delay.value());
421  return tlm::TLM_ACCEPTED;
422 }
423 
424 template <unsigned int BITWIDTH>
425 void
427  sc_dt::uint64 start_range, sc_dt::uint64 end_range)
428 {
429  AddrRange r(start_range, end_range);
430 
431  for (;;) {
432  auto it = backdoorMap.intersects(r);
433  if (it == backdoorMap.end())
434  break;
435 
436  it->second->invalidate();
437  delete it->second;
438  backdoorMap.erase(it);
439  };
440 }
441 
442 template <unsigned int BITWIDTH>
444  Params *params, const sc_core::sc_module_name &mn) :
446  bridgeResponsePort(std::string(name()) + ".gem5", *this),
447  socket("tlm_socket"),
448  wrapper(socket, std::string(name()) + ".tlm", InvalidPortID),
449  system(params->system), blockingRequest(nullptr),
450  needToSendRequestRetry(false), blockingResponse(nullptr),
451  addrRanges(params->addr_ranges.begin(), params->addr_ranges.end())
452 {
453 }
454 
455 template <unsigned int BITWIDTH>
456 ::Port &
457 Gem5ToTlmBridge<BITWIDTH>::gem5_getPort(const std::string &if_name, int idx)
458 {
459  if (if_name == "gem5")
460  return bridgeResponsePort;
461  else if (if_name == "tlm")
462  return wrapper;
463 
464  return sc_core::sc_module::gem5_getPort(if_name, idx);
465 }
466 
467 template <unsigned int BITWIDTH>
468 void
470 {
471  bridgeResponsePort.sendRangeChange();
472 
473  socket.register_nb_transport_bw(this, &Gem5ToTlmBridge::nb_transport_bw);
474  socket.register_invalidate_direct_mem_ptr(
477 }
478 
479 } // namespace sc_gem5
480 
482 Gem5ToTlmBridge32Params::create()
483 {
484  return new sc_gem5::Gem5ToTlmBridge<32>(
485  this, sc_core::sc_module_name(name.c_str()));
486 }
487 
489 Gem5ToTlmBridge64Params::create()
490 {
491  return new sc_gem5::Gem5ToTlmBridge<64>(
492  this, sc_core::sc_module_name(name.c_str()));
493 }
sc_gem5::Gem5ToTlmBridge::Gem5ToTlmBridge
Gem5ToTlmBridge(Params *p, const sc_core::sc_module_name &mn)
Definition: gem5_to_tlm.cc:443
ArmISA::status
Bitfield< 5, 0 > status
Definition: miscregs_types.hh:417
sc_core::sc_time::from_value
static sc_time from_value(sc_dt::uint64)
Definition: sc_time.cc:210
tlm::tlm_generic_payload::set_data_length
void set_data_length(const unsigned int length)
Definition: gp.hh:210
MemBackdoor
Definition: backdoor.hh:38
system.hh
Packet::cacheResponding
bool cacheResponding() const
Definition: packet.hh:619
data
const char data[]
Definition: circlebuf.test.cc:42
Packet::getAddr
Addr getAddr() const
Definition: packet.hh:754
Gem5SystemC::MemoryManager
Definition: sc_mm.hh:45
tlm::tlm_phase
Definition: phase.hh:47
sc_gem5::Gem5ToTlmBridge::before_end_of_elaboration
void before_end_of_elaboration() override
Definition: gem5_to_tlm.cc:469
Packet::payloadDelay
uint32_t payloadDelay
The extra pipelining delay from seeing the packet until the end of payload is transmitted by the comp...
Definition: packet.hh:412
InvalidPortID
const PortID InvalidPortID
Definition: types.hh:238
sc_gem5::Gem5ToTlmBridge::recvAtomic
Tick recvAtomic(PacketPtr packet)
Definition: gem5_to_tlm.cc:206
tlm::TLM_COMPLETED
@ TLM_COMPLETED
Definition: fw_bw_ifs.hh:65
Request::NO_ACCESS
@ NO_ACCESS
The request should not cause a memory access.
Definition: request.hh:135
gem5_to_tlm.hh
tlm::tlm_dmi
Definition: dmi.hh:46
tlm::TLM_WRITE_COMMAND
@ TLM_WRITE_COMMAND
Definition: gp.hh:102
tlm::TLM_UPDATED
@ TLM_UPDATED
Definition: fw_bw_ifs.hh:65
sc_gem5::packet2payload
tlm::tlm_generic_payload * packet2payload(PacketPtr packet)
Convert a gem5 packet to a TLM payload by copying all the relevant information to new tlm payload.
Definition: gem5_to_tlm.cc:81
Packet::isRead
bool isRead() const
Definition: packet.hh:556
sc_ext.hh
tlm::END_REQ
@ END_REQ
Definition: phase.hh:42
MemBackdoor::NoAccess
@ NoAccess
Definition: backdoor.hh:48
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
sc_core::SC_ZERO_TIME
const sc_time SC_ZERO_TIME
Definition: sc_time.cc:290
SC_REPORT_FATAL
#define SC_REPORT_FATAL(msg_type, msg)
Definition: sc_report_handler.hh:131
sc_gem5::Gem5ToTlmBridge::recvTimingSnoopResp
bool recvTimingSnoopResp(PacketPtr packet)
Definition: gem5_to_tlm.cc:357
Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:340
Gem5SystemC::Gem5Extension::getPacket
PacketPtr getPacket()
Definition: sc_ext.cc:63
Packet::getSize
unsigned getSize() const
Definition: packet.hh:764
tlm::tlm_generic_payload::release
void release()
Definition: gp.hh:147
sc_gem5::Gem5ToTlmBridge::recvRespRetry
void recvRespRetry()
Definition: gem5_to_tlm.cc:374
sc_assert
#define sc_assert(expr)
Definition: sc_report_handler.hh:135
Packet::headerDelay
uint32_t headerDelay
The extra delay from seeing the packet until the header is transmitted.
Definition: packet.hh:394
EventFunctionWrapper
Definition: eventq.hh:1101
X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:997
sc_gem5::Gem5ToTlmBridge::gem5_getPort
::Port & gem5_getPort(const std::string &if_name, int idx=-1) override
Definition: gem5_to_tlm.cc:457
sc_core::sc_module::gem5_getPort
virtual ::Port & gem5_getPort(const std::string &if_name, int idx=-1)
Definition: sc_module.cc:117
tlm::tlm_generic_payload::set_command
void set_command(const tlm_command command)
Definition: gp.hh:198
tlm::tlm_dmi::is_read_allowed
bool is_read_allowed() const
Definition: dmi.hh:100
tlm::tlm_generic_payload::get_data_length
unsigned int get_data_length() const
Definition: gp.hh:209
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The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition: addr_range.hh:68
sc_dt::uint64
uint64_t uint64
Definition: sc_nbdefs.hh:206
Packet::needsResponse
bool needsResponse() const
Definition: packet.hh:570
MipsISA::r
r
Definition: pra_constants.hh:95
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Definition: sc_time.hh:49
sc_core::sc_time::value
sc_dt::uint64 value() const
Definition: sc_time.cc:115
tlm::tlm_dmi::get_end_address
sc_dt::uint64 get_end_address() const
Definition: dmi.hh:94
tlm::TLM_READ_COMMAND
@ TLM_READ_COMMAND
Definition: gp.hh:101
tlm::tlm_dmi::is_write_allowed
bool is_write_allowed() const
Definition: dmi.hh:105
tlm::tlm_dmi::get_start_address
sc_dt::uint64 get_start_address() const
Definition: dmi.hh:93
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Definition: sc_module_name.hh:41
mm
Definition: mm.h:8
sc_gem5::Gem5ToTlmBridge::Params
Gem5ToTlmBridgeBaseParams Params
Definition: gem5_to_tlm.hh:191
tlm::tlm_generic_payload::acquire
void acquire()
Definition: gp.hh:140
tlm::tlm_generic_payload::set_streaming_width
void set_streaming_width(const unsigned int streaming_width)
Definition: gp.hh:230
sc_gem5::Gem5ToTlmBridge
Definition: gem5_to_tlm.hh:85
sc_gem5::Gem5ToTlmBridge::nb_transport_bw
tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &t)
Definition: gem5_to_tlm.cc:415
tlm::END_RESP
@ END_RESP
Definition: phase.hh:44
Packet::makeResponse
void makeResponse()
Take a request packet and modify it in place to be suitable for returning as a response to that reque...
Definition: packet.hh:1004
tlm::TLM_IGNORE_COMMAND
@ TLM_IGNORE_COMMAND
Definition: gp.hh:103
name
const std::string & name()
Definition: trace.cc:50
tlm::tlm_dmi::get_dmi_ptr
unsigned char * get_dmi_ptr() const
Definition: dmi.hh:92
mm::allocate
gp_t * allocate()
Definition: mm.h:55
sc_gem5::Gem5ToTlmBridge::recvAtomicBackdoor
Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &backdoor)
Definition: gem5_to_tlm.cc:231
tlm::BEGIN_REQ
@ BEGIN_REQ
Definition: phase.hh:41
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:197
tlm::tlm_generic_payload
Definition: gp.hh:133
Gem5SystemC::Gem5Extension::getExtension
static Gem5Extension & getExtension(const tlm::tlm_generic_payload *payload)
Definition: sc_ext.cc:48
std
Overload hash function for BasicBlockRange type.
Definition: vec_reg.hh:587
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
sc_mm.hh
sc_core::sc_module::before_end_of_elaboration
virtual void before_end_of_elaboration()
Definition: sc_module.hh:248
sc_gem5::Gem5ToTlmBridge::recvFunctional
void recvFunctional(PacketPtr packet)
Definition: gem5_to_tlm.cc:398
tlm::tlm_generic_payload::set_address
void set_address(const sc_dt::uint64 address)
Definition: gp.hh:202
sc_gem5::Gem5ToTlmBridge::recvFunctionalSnoop
void recvFunctionalSnoop(PacketPtr packet)
Definition: gem5_to_tlm.cc:264
sc_gem5::Gem5ToTlmBridge::recvTimingReq
bool recvTimingReq(PacketPtr packet)
Definition: gem5_to_tlm.cc:274
tlm::tlm_generic_payload::has_mm
bool has_mm() const
Definition: gp.hh:157
Packet::isWrite
bool isWrite() const
Definition: packet.hh:557
tlm::tlm_sync_enum
tlm_sync_enum
Definition: fw_bw_ifs.hh:48
sc_gem5::Port
Definition: port.hh:50
Packet::getPtr
T * getPtr()
get a pointer to the data ptr.
Definition: packet.hh:1157
tlm::tlm_generic_payload::set_auto_extension
T * set_auto_extension(T *ext)
Definition: gp.hh:370
sc_gem5::Gem5ToTlmBridge::getBackdoor
MemBackdoorPtr getBackdoor(tlm::tlm_generic_payload &trans)
Definition: gem5_to_tlm.cc:174
sc_gem5::Gem5ToTlmBridge::invalidate_direct_mem_ptr
void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, sc_dt::uint64 end_range)
Definition: gem5_to_tlm.cc:426
sc_gem5
Definition: sc_clock.cc:42
Gem5SystemC::Gem5Extension
Definition: sc_ext.hh:43
sc_gem5::mm
Gem5SystemC::MemoryManager mm
Instantiate a tlm memory manager that takes care about all the tlm transactions in the system.
Definition: gem5_to_tlm.cc:74
sc_gem5::Gem5ToTlmBridge::tryTiming
bool tryTiming(PacketPtr packet)
Definition: gem5_to_tlm.cc:367
tlm::tlm_generic_payload::get_address
sc_dt::uint64 get_address() const
Definition: gp.hh:201
sc_gem5::Gem5ToTlmBridge::pec
void pec(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase)
Definition: gem5_to_tlm.cc:118
sc_gem5::Gem5ToTlmBridgeBase
Definition: gem5_to_tlm.hh:78
tlm::BEGIN_RESP
@ BEGIN_RESP
Definition: phase.hh:43
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:171
curTick
Tick curTick()
The current simulated tick.
Definition: core.hh:45
tlm::tlm_generic_payload::set_data_ptr
void set_data_ptr(unsigned char *data)
Definition: gp.hh:206
tlm::TLM_ACCEPTED
@ TLM_ACCEPTED
Definition: fw_bw_ifs.hh:65

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