gem5  v20.1.0.0
gpu_command_processor.hh
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35 
47 #ifndef __DEV_HSA_GPU_COMMAND_PROCESSOR_HH__
48 #define __DEV_HSA_GPU_COMMAND_PROCESSOR_HH__
49 
50 #include "dev/hsa/hsa_device.hh"
52 
53 struct GPUCommandProcessorParams;
54 class GPUDispatcher;
55 class Shader;
56 
58 {
59  public:
60  typedef GPUCommandProcessorParams Params;
61 
62  GPUCommandProcessor() = delete;
64 
65  void setShader(Shader *shader);
66  Shader* shader();
67 
68  void submitDispatchPkt(void *raw_pkt, uint32_t queue_id,
69  Addr host_pkt_addr) override;
70  void submitVendorPkt(void *raw_pkt, uint32_t queue_id,
71  Addr host_pkt_addr) override;
72  void dispatchPkt(HSAQueueEntry *task);
73 
74  Tick write(PacketPtr pkt) override { return 0; }
75  Tick read(PacketPtr pkt) override { return 0; }
76  AddrRangeList getAddrRanges() const override;
77  System *system();
78 
79  private:
82 
83  void initABI(HSAQueueEntry *task);
84 
98  {
99  public:
101  HSAQueueEntry *task)
102  : DmaCallback(), readDispIdOffset(0), gpuCmdProc(gpu_cmd_proc),
103  _task(task)
104  {
105  }
106 
107  void
108  process() override
109  {
120 
125  auto *mqdDmaEvent = new MQDDmaEvent(gpuCmdProc, _task);
127  sizeof(_amd_queue_t), mqdDmaEvent,
128  &_task->amdQueue);
129  }
130 
132 
133  private:
136  };
137 
145  class MQDDmaEvent : public DmaCallback
146  {
147  public:
149  : DmaCallback(), gpuCmdProc(gpu_cmd_proc), _task(task)
150  {
151  }
152 
153  void
154  process() override
155  {
157  }
158 
159  private:
162  };
163 };
164 
165 #endif // __DEV_HSA_GPU_COMMAND_PROCESSOR_HH__
HSADevice::hsaPP
HSAPacketProcessor * hsaPP
Definition: hsa_device.hh:92
hsa_queue_entry.hh
GPUCommandProcessor::ReadDispIdOffsetDmaEvent::process
void process() override
Callback function invoked on completion of all chunks.
Definition: gpu_command_processor.hh:108
GPUCommandProcessor::dispatchPkt
void dispatchPkt(HSAQueueEntry *task)
Once the CP has finished extracting all relevant information about a task and has initialized the ABI...
Definition: gpu_command_processor.cc:176
GPUCommandProcessor::dispatcher
GPUDispatcher & dispatcher
Definition: gpu_command_processor.hh:81
GPUCommandProcessor
Definition: gpu_command_processor.hh:57
GPUCommandProcessor::_shader
Shader * _shader
Definition: gpu_command_processor.hh:80
Shader
Definition: shader.hh:87
HSAPacketProcessor::getQueueDesc
HSAQueueDescriptor * getQueueDesc(uint32_t queId)
Definition: hsa_packet_processor.hh:295
GPUCommandProcessor::getAddrRanges
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
Definition: gpu_command_processor.cc:207
GPUCommandProcessor::ReadDispIdOffsetDmaEvent
Perform a DMA read of the read_dispatch_id_field_base_byte_offset field, which follows directly after...
Definition: gpu_command_processor.hh:97
GPUCommandProcessor::ReadDispIdOffsetDmaEvent::readDispIdOffset
uint32_t readDispIdOffset
Definition: gpu_command_processor.hh:131
GPUCommandProcessor::GPUCommandProcessor
GPUCommandProcessor()=delete
GPUCommandProcessor::submitDispatchPkt
void submitDispatchPkt(void *raw_pkt, uint32_t queue_id, Addr host_pkt_addr) override
submitDispatchPkt() is the entry point into the CP from the HSAPP and is only meant to be used with A...
Definition: gpu_command_processor.cc:67
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
GPUCommandProcessor::MQDDmaEvent
Perform a DMA read of the MQD that corresponds to a hardware queue descriptor (HQD).
Definition: gpu_command_processor.hh:145
GPUCommandProcessor::MQDDmaEvent::process
void process() override
Callback function invoked on completion of all chunks.
Definition: gpu_command_processor.hh:154
GPUCommandProcessor::ReadDispIdOffsetDmaEvent::_task
HSAQueueEntry * _task
Definition: gpu_command_processor.hh:135
HSADevice::dmaReadVirt
void dmaReadVirt(Addr host_addr, unsigned size, DmaCallback *cb, void *data, Tick delay=0)
Definition: hsa_device.cc:51
HSAQueueEntry
Definition: hsa_queue_entry.hh:60
GPUCommandProcessor::shader
Shader * shader()
Definition: gpu_command_processor.cc:220
GPUDispatcher
Definition: dispatcher.hh:60
HSAQueueEntry::amdQueue
_amd_queue_t amdQueue
Keep a copy of the AMD HSA queue because we need info from some of its fields to initialize register ...
Definition: hsa_queue_entry.hh:308
HSAQueueEntry::queueId
uint32_t queueId() const
Definition: hsa_queue_entry.hh:148
HSAQueueDescriptor::hostReadIndexPtr
uint64_t hostReadIndexPtr
Definition: hsa_packet_processor.hh:79
HSAQueueEntry::hostAMDQueueAddr
Addr hostAMDQueueAddr
Host-side addr of the amd_queue_t on which this task was queued.
Definition: hsa_queue_entry.hh:301
GPUCommandProcessor::Params
GPUCommandProcessorParams Params
Definition: gpu_command_processor.hh:60
System
Definition: system.hh:73
GPUCommandProcessor::MQDDmaEvent::MQDDmaEvent
MQDDmaEvent(GPUCommandProcessor &gpu_cmd_proc, HSAQueueEntry *task)
Definition: gpu_command_processor.hh:148
GPUCommandProcessor::setShader
void setShader(Shader *shader)
Definition: gpu_command_processor.cc:214
GPUCommandProcessor::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: gpu_command_processor.hh:75
GPUCommandProcessor::MQDDmaEvent::_task
HSAQueueEntry * _task
Definition: gpu_command_processor.hh:161
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
GPUCommandProcessor::MQDDmaEvent::gpuCmdProc
GPUCommandProcessor & gpuCmdProc
Definition: gpu_command_processor.hh:160
_amd_queue_s
Definition: hsa_queue.hh:65
GPUCommandProcessor::submitVendorPkt
void submitVendorPkt(void *raw_pkt, uint32_t queue_id, Addr host_pkt_addr) override
submitVendorPkt() is for accepting vendor-specific packets from the HSAPP.
Definition: gpu_command_processor.cc:163
GPUCommandProcessor::system
System * system()
Definition: gpu_command_processor.cc:201
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
DmaCallback
DMA callback class.
Definition: dma_device.hh:220
GPUCommandProcessor::ReadDispIdOffsetDmaEvent::gpuCmdProc
GPUCommandProcessor & gpuCmdProc
Definition: gpu_command_processor.hh:134
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
GPUCommandProcessor::initABI
void initABI(HSAQueueEntry *task)
The CP is responsible for traversing all HSA-ABI-related data structures from memory and initializing...
Definition: gpu_command_processor.cc:188
hsa_device.hh
HSADevice
Definition: hsa_device.hh:46
GPUCommandProcessor::ReadDispIdOffsetDmaEvent::ReadDispIdOffsetDmaEvent
ReadDispIdOffsetDmaEvent(GPUCommandProcessor &gpu_cmd_proc, HSAQueueEntry *task)
Definition: gpu_command_processor.hh:100
DmaDevice::Params
DmaDeviceParams Params
Definition: dma_device.hh:171
GPUCommandProcessor::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: gpu_command_processor.hh:74

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