gem5  v20.1.0.0
mshr.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited
3  * All rights reserved.
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Copyright (c) 2002-2005 The Regents of The University of Michigan
15  * All rights reserved.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions are
19  * met: redistributions of source code must retain the above copyright
20  * notice, this list of conditions and the following disclaimer;
21  * redistributions in binary form must reproduce the above copyright
22  * notice, this list of conditions and the following disclaimer in the
23  * documentation and/or other materials provided with the distribution;
24  * neither the name of the copyright holders nor the names of its
25  * contributors may be used to endorse or promote products derived from
26  * this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39  */
40 
46 #ifndef __MEM_CACHE_MSHR_HH__
47 #define __MEM_CACHE_MSHR_HH__
48 
49 #include <cassert>
50 #include <iosfwd>
51 #include <list>
52 #include <string>
53 #include <vector>
54 
55 #include "base/printable.hh"
56 #include "base/types.hh"
57 #include "mem/cache/queue_entry.hh"
58 #include "mem/packet.hh"
59 #include "mem/request.hh"
60 #include "sim/core.hh"
61 
62 class BaseCache;
63 
69 class MSHR : public QueueEntry, public Printable
70 {
71 
75  template<typename Entry>
76  friend class Queue;
77  friend class MSHRQueue;
78 
79  private:
80 
83 
109 
112 
115 
116  public:
117 
120 
122  bool isForward;
123 
124  class Target : public QueueEntry::Target {
125  public:
126 
127  enum Source {
131  };
132 
133  const Source source;
134 
151 
152  const bool allocOnFill;
153 
155  Target(PacketPtr _pkt, Tick _readyTime, Counter _order,
156  Source _source, bool _markedPending, bool alloc_on_fill)
157  : QueueEntry::Target(_pkt, _readyTime, _order), source(_source),
158  markedPending(_markedPending), allocOnFill(alloc_on_fill)
159  {}
160  };
161 
162  class TargetList : public std::list<Target> {
163 
164  public:
174 
175  TargetList();
176 
185  void updateFlags(PacketPtr pkt, Target::Source source,
186  bool alloc_on_fill);
187 
194  void init(Addr blk_addr, Addr blk_size) {
195  blkAddr = blk_addr;
196  blkSize = blk_size;
197  writesBitmap.resize(blk_size);
198 
199  resetFlags();
200  }
201 
202  void resetFlags() {
203  canMergeWrites = true;
204  std::fill(writesBitmap.begin(), writesBitmap.end(), false);
205 
206  needsWritable = false;
207  hasUpgrade = false;
208  allocOnFill = false;
209  hasFromCache = false;
210  }
211 
218  void populateFlags();
219 
227  void updateWriteFlags(PacketPtr pkt);
228 
235  bool isReset() const {
236  return !needsWritable && !hasUpgrade && !allocOnFill &&
238  }
239 
253  Target::Source source, bool markPending, bool alloc_on_fill);
254 
259  void replaceUpgrades();
260 
261  void clearDownstreamPending();
262  void clearDownstreamPending(iterator begin, iterator end);
264  void print(std::ostream &os, int verbosity,
265  const std::string &prefix) const;
266 
274  bool isWholeLineWrite() const
275  {
276  return std::all_of(writesBitmap.begin(), writesBitmap.end(),
277  [](bool i) { return i; });
278  }
279 
280  private:
283 
286 
289 
290  // NOTE: std::vector<bool> might not meet satisfy the
291  // ForwardIterator requirement and therefore cannot be used
292  // for writesBitmap.
298  };
299 
303  typedef List::iterator Iterator;
304 
311  bool needsWritable() const { return targets.needsWritable; }
312 
313  bool isCleaning() const {
314  PacketPtr pkt = targets.front().pkt;
315  return pkt->isClean();
316  }
317 
318  bool isPendingModified() const {
319  assert(inService); return pendingModified;
320  }
321 
322  bool hasPostInvalidate() const {
323  assert(inService); return postInvalidate;
324  }
325 
326  bool hasPostDowngrade() const {
327  assert(inService); return postDowngrade;
328  }
329 
330  bool sendPacket(BaseCache &cache) override;
331 
332  bool allocOnFill() const {
333  return targets.allocOnFill;
334  }
335 
341  bool hasFromCache() const {
342  return targets.hasFromCache;
343  }
344 
345  private:
355  void promoteIf(const std::function<bool (Target &)>& pred);
356 
362 
368 
371 
373 
374  public:
382  bool isWholeLineWrite() const {
383  return targets.isWholeLineWrite();
384  }
385 
395  void allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt,
396  Tick when_ready, Counter _order, bool alloc_on_fill);
397 
398  void markInService(bool pending_modified_resp);
399 
400  void clearDownstreamPending();
401 
405  void deallocate();
406 
411  void allocateTarget(PacketPtr target, Tick when, Counter order,
412  bool alloc_on_fill);
413  bool handleSnoop(PacketPtr target, Counter order);
414 
416  MSHR();
417 
422  int getNumTargets() const
423  { return targets.size() + deferredTargets.size(); }
424 
437  TargetList extractServiceableTargets(PacketPtr pkt);
438 
443  bool hasTargets() const { return !targets.empty(); }
444 
450  {
451  assert(hasTargets());
452  return &targets.front();
453  }
454 
458  void popTarget()
459  {
460  targets.pop_front();
461  }
462 
463  bool promoteDeferredTargets();
464 
473  void promoteReadable();
474 
482  void promoteWritable();
483 
485 
490  void delay(Tick delay_ticks)
491  {
492  assert(readyTime <= curTick());
493  readyTime = curTick() + delay_ticks;
494  }
495 
499  void print(std::ostream &os,
500  int verbosity = 0,
501  const std::string &prefix = "") const override;
508  std::string print() const;
509 
510  bool matchBlockAddr(const Addr addr, const bool is_secure) const override;
511  bool matchBlockAddr(const PacketPtr pkt) const override;
512  bool conflictAddr(const QueueEntry* entry) const override;
513 };
514 
515 #endif // __MEM_CACHE_MSHR_HH__
MSHR::Target::FromPrefetcher
@ FromPrefetcher
Definition: mshr.hh:130
MSHR::allocIter
Iterator allocIter
Pointer to this MSHR on the allocated list.
Definition: mshr.hh:367
MSHR::Target::FromCPU
@ FromCPU
Definition: mshr.hh:128
MSHR::TargetList::trySatisfyFunctional
bool trySatisfyFunctional(PacketPtr pkt)
Definition: mshr.cc:254
MSHR::deferredTargets
TargetList deferredTargets
Definition: mshr.hh:372
queue_entry.hh
MSHR::Target::source
const Source source
Request from cpu, memory, or prefetcher?
Definition: mshr.hh:133
X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:803
MSHR::clearDownstreamPending
void clearDownstreamPending()
Definition: mshr.cc:324
MSHR::matchBlockAddr
bool matchBlockAddr(const Addr addr, const bool is_secure) const override
Check if entry corresponds to the one being looked for.
Definition: mshr.cc:735
QueueEntry::Target
A queue entry is holding packets that will be serviced as soon as resources are available.
Definition: queue_entry.hh:83
MSHR::TargetList::blkSize
Addr blkSize
Size of the cache block.
Definition: mshr.hh:285
MSHR::needsWritable
bool needsWritable() const
The pending* and post* flags are only valid if inService is true.
Definition: mshr.hh:311
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
MSHR::getNumTargets
int getNumTargets() const
Returns the current number of allocated targets.
Definition: mshr.hh:422
MSHR::TargetList::updateFlags
void updateFlags(PacketPtr pkt, Target::Source source, bool alloc_on_fill)
Use the provided packet and the source to update the flags of this TargetList.
Definition: mshr.cc:74
MSHR::TargetList::resetFlags
void resetFlags()
Definition: mshr.hh:202
MSHR::markInService
void markInService(bool pending_modified_resp)
Definition: mshr.cc:334
MSHR::hasTargets
bool hasTargets() const
Returns true if there are targets left.
Definition: mshr.hh:443
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
MSHR::TargetList::populateFlags
void populateFlags()
Goes through the list of targets and uses them to populate the flags of this TargetList.
Definition: mshr.cc:102
MSHR::conflictAddr
bool conflictAddr(const QueueEntry *entry) const override
Check if given entry's packets conflict with this' entries packets.
Definition: mshr.cc:749
MSHR::TargetList::replaceUpgrades
void replaceUpgrades()
Convert upgrades to the equivalent request if the cache line they refer to would have been invalid (U...
Definition: mshr.cc:212
MSHR::allocOnFill
bool allocOnFill() const
Definition: mshr.hh:332
MSHR::readyIter
Iterator readyIter
Pointer to this MSHR on the ready list.
Definition: mshr.hh:361
std::vector< char >
MSHR::hasFromCache
bool hasFromCache() const
Determine if there are non-deferred requests from other caches.
Definition: mshr.hh:341
MSHR::print
std::string print() const
A no-args wrapper of print(std::ostream...) meant to be invoked from DPRINTFs avoiding string overhea...
Definition: mshr.cc:727
MSHR::Target::allocOnFill
const bool allocOnFill
Should the response servicing this target list allocate in the cache?
Definition: mshr.hh:152
MSHR::promoteWritable
void promoteWritable()
Promotes deferred targets that do not require writable.
Definition: mshr.cc:653
request.hh
MSHR::targets
TargetList targets
List of all requests that match the address.
Definition: mshr.hh:370
MSHR::List
std::list< MSHR * > List
A list of MSHRs.
Definition: mshr.hh:301
MSHR::extractServiceableTargets
TargetList extractServiceableTargets(PacketPtr pkt)
Extracts the subset of the targets that can be serviced given a received response.
Definition: mshr.cc:536
printable.hh
MSHR::trySatisfyFunctional
bool trySatisfyFunctional(PacketPtr pkt)
Definition: mshr.cc:680
MSHR::TargetList::clearDownstreamPending
void clearDownstreamPending()
Definition: mshr.cc:247
packet.hh
MSHR::promoteIf
void promoteIf(const std::function< bool(Target &)> &pred)
Promotes deferred targets that satisfy a predicate.
Definition: mshr.cc:609
MSHR::isPendingModified
bool isPendingModified() const
Definition: mshr.hh:318
MSHR::Target::markedPending
bool markedPending
We use this flag to track whether we have cleared the downstreamPending flag for the MSHR of the cach...
Definition: mshr.hh:150
MSHR::postInvalidate
bool postInvalidate
Did we snoop an invalidate while waiting for data?
Definition: mshr.hh:111
Counter
int64_t Counter
Statistics counter type.
Definition: types.hh:58
MSHR::Target::Target
Target(PacketPtr _pkt, Tick _readyTime, Counter _order, Source _source, bool _markedPending, bool alloc_on_fill)
Definition: mshr.hh:155
MSHR::TargetList::allocOnFill
bool allocOnFill
Set when the response should allocate on fill.
Definition: mshr.hh:168
MSHR::promoteDeferredTargets
bool promoteDeferredTargets()
Definition: mshr.cc:570
MSHR::Iterator
List::iterator Iterator
MSHR list iterator.
Definition: mshr.hh:303
MSHR::handleSnoop
bool handleSnoop(PacketPtr target, Counter order)
Definition: mshr.cc:412
MSHR::TargetList::isWholeLineWrite
bool isWholeLineWrite() const
Check if this list contains writes that cover an entire cache line.
Definition: mshr.hh:274
MSHR::popTarget
void popTarget()
Pop first target.
Definition: mshr.hh:458
MSHR::TargetList::add
void add(PacketPtr pkt, Tick readyTime, Counter order, Target::Source source, bool markPending, bool alloc_on_fill)
Add the specified packet in the TargetList.
Definition: mshr.cc:156
MSHR::TargetList::updateWriteFlags
void updateWriteFlags(PacketPtr pkt)
Add the specified packet in the TargetList.
Definition: mshr.cc:111
MSHR::postDowngrade
bool postDowngrade
Did we snoop a read while waiting for data?
Definition: mshr.hh:114
Printable
Abstract base class for objects which support being printed to a stream for debugging.
Definition: printable.hh:44
MSHR::TargetList
Definition: mshr.hh:162
BaseCache
A basic cache interface.
Definition: base.hh:89
MSHR::TargetList::init
void init(Addr blk_addr, Addr blk_size)
Reset state.
Definition: mshr.hh:194
core.hh
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
QueueEntry::readyTime
Tick readyTime
Tick when ready to issue.
Definition: queue_entry.hh:70
MSHR::Target::Source
Source
Definition: mshr.hh:127
QueueEntry::order
Counter order
Order number assigned to disambiguate writes and misses.
Definition: queue_entry.hh:108
MSHR::TargetList::hasFromCache
bool hasFromCache
Determine whether there was at least one non-snooping target coming from another cache.
Definition: mshr.hh:173
MSHR::getTarget
QueueEntry::Target * getTarget() override
Returns a reference to the first target.
Definition: mshr.hh:449
MSHR::TargetList::needsWritable
bool needsWritable
Definition: mshr.hh:165
MipsISA::fill
fill
Definition: pra_constants.hh:54
MSHR::isCleaning
bool isCleaning() const
Definition: mshr.hh:313
MSHR::downstreamPending
bool downstreamPending
Flag set by downstream caches.
Definition: mshr.hh:82
MSHR::TargetList::TargetList
TargetList()
Definition: mshr.cc:67
MSHR::wasWholeLineWrite
bool wasWholeLineWrite
Track if we sent this as a whole line write or not.
Definition: mshr.hh:119
QueueEntry::inService
bool inService
True if the entry has been sent downstream.
Definition: queue_entry.hh:105
MSHR::allocateTarget
void allocateTarget(PacketPtr target, Tick when, Counter order, bool alloc_on_fill)
Add a request to the list of targets.
Definition: mshr.cc:367
MSHR::Target::FromSnoop
@ FromSnoop
Definition: mshr.hh:129
MSHR::hasPostDowngrade
bool hasPostDowngrade() const
Definition: mshr.hh:326
MSHR::sendPacket
bool sendPacket(BaseCache &cache) override
Send this queue entry as a downstream packet, with the exact behaviour depending on the specific entr...
Definition: mshr.cc:695
MSHR::deallocate
void deallocate()
Mark this MSHR as free.
Definition: mshr.cc:355
MSHR::TargetList::print
void print(std::ostream &os, int verbosity, const std::string &prefix) const
Definition: mshr.cc:267
types.hh
Packet::isClean
bool isClean() const
Definition: packet.hh:573
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
MSHR::TargetList::writesBitmap
std::vector< char > writesBitmap
Track which bytes are written by requests in this target list.
Definition: mshr.hh:297
addr
ip6_addr_t addr
Definition: inet.hh:423
Queue
A high-level queue interface, to be used by both the MSHR queue and the write buffer.
Definition: queue.hh:66
MSHR::TargetList::hasUpgrade
bool hasUpgrade
Definition: mshr.hh:166
QueueEntry
A queue entry base class, to be used by both the MSHRs and write-queue entries.
Definition: queue_entry.hh:58
MSHR::hasPostInvalidate
bool hasPostInvalidate() const
Definition: mshr.hh:322
MSHR::isWholeLineWrite
bool isWholeLineWrite() const
Check if this MSHR contains only compatible writes, and if they span the entire cache line.
Definition: mshr.hh:382
std::list
STL list class.
Definition: stl.hh:51
MSHR::isForward
bool isForward
True if the entry is just a simple forward from an upper level.
Definition: mshr.hh:122
MSHR::allocate
void allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt, Tick when_ready, Counter _order, bool alloc_on_fill)
Allocate a miss to this MSHR.
Definition: mshr.cc:294
MSHR::promoteReadable
void promoteReadable()
Promotes deferred targets that do not require writable.
Definition: mshr.cc:632
MSHR::pendingModified
bool pendingModified
Here we use one flag to track both if:
Definition: mshr.hh:108
MSHRQueue
A Class for maintaining a list of pending and allocated memory requests.
Definition: mshr_queue.hh:58
MSHR::TargetList::canMergeWrites
bool canMergeWrites
Indicates whether we can merge incoming write requests.
Definition: mshr.hh:288
MSHR::MSHR
MSHR()
A simple constructor.
Definition: mshr.cc:60
MSHR::TargetList::blkAddr
Addr blkAddr
Address of the cache block for this list of targets.
Definition: mshr.hh:282
MSHR::TargetList::isReset
bool isReset() const
Tests if the flags of this TargetList have their default values.
Definition: mshr.hh:235
MSHR::delay
void delay(Tick delay_ticks)
Adds a delay relative to the current tick to the current MSHR.
Definition: mshr.hh:490
MSHR
Miss Status and handling Register.
Definition: mshr.hh:69
curTick
Tick curTick()
The current simulated tick.
Definition: core.hh:45
MSHR::Target
Definition: mshr.hh:124

Generated on Wed Sep 30 2020 14:02:12 for gem5 by doxygen 1.8.17